Formal MethodsEducational Resources| Maintained By | Adnan Aziz |
| Description | The designs are digital, synchronous, and control dominated; portions are synthesizable. Examples include: PCI/Pi/PowerPC bus protocols, MESI/MSI cache coherency protocols, an MPEG decoder, a DLX processor, and an IF decode unit. |
| Formats | Verilog, blif-mv |
| Also Included | CTL specifications, project writeups |
| Maintained By | Jørgen Staunstrup, Thomas Kropf |
| Description | Circuits of varying size, suitable for verification. Examples include arbiters, systolic arrays, microprocessors, and other basic hardware devices. |
| Formats | VHDL, schematics (postscript) |
| Also Included | circuit descriptions |
| Maintained By | INRIA/VASY and CWI/SEN2 |
| Description | The VLTS benchmark suite is a collection of Labelled Transition Systems obtained from various case studies about the modelling of communication protocols and concurrent systems. |
| Formats | labelled transition systems, BCG |
| Also Included |
| This site is currently maintained by Kathi Fisler Department of Computer Science, Worcester Polytechnic Institute Last updated on Saturday, 24-Jun-2006 21:46:22 EDT Acknowledgements |