Project Description
335cpu: an illustration of CPU architecture
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Supervisor:
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Steven D. Johnson
(sjohnson@cs.indiana.edu)
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Technical Support:
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Bryce Himebaugh
(bhimebau@cs.indiana.edu)
Caleb Hess
(hess@cs.indiana.edu)
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Participants:
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Nita Desai (ndesai@cs.indiana.edu) (Summer 2001)
Jon Gladieux (Spring and Summer 2000)
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Credit:
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Y391: 1-3 cr.
C790: 1-3 cr.
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Background:
| computer organization (c335), digital hardware design (b441),
microcode, Xilinx prototyping, programming.
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The project:
In his C335 course, Prof. Frank Prosser developed an instructional
module building up a microcoded architecture for a simple CPU, starting
with digital logic gates and flipflops. The intent of this illustration
is to give beginning students a grounding in how the basic hardware elements
can be used to build an instruction interpreter.
Prosser's design involves a microcode sequencer, providing additional
lessons about nested levels of interpretation.
This project involves designing and building the the illustrative CPU and
providing an environment to visualize its execution. Although actual
hardware is the central concern, its use as a teaching tool is its central
purpose. The main goals are:
- provide a working version of the CPU with enough support to demonstrate
its operation. Such support includes facilities for single-stepping
at both instruction-interpretation and microinstruction interpretation
levels.
- provide a model (e.g. simulation model) of the machine for off-line
study.
- provide clear and complete explanation of the design, so that beginning
students can understand the construction of the machine down to the
gate and flip-flop level.
- construct a robust prototype for demonstrating the hardware.
Supplementary goals include, but are not limited to:
- Expanding the instruction set, or providing tools for instruction
design (e.g. a microcode assembler).
- Refining the architecture; for example, introducing a pipeline,
cache, or function unit.
More information:
More information: