%T Performance Estimates for the DADO Machine: A Comparison of TREAT and RETE %K Algorithms and Performance Analyses %K R DADO %I Columbia University %T An Overview of the DADO Parallel Computer %K Overview and Goals of Project R DADO %I Columbia University %T DADO: A Parallel Computer for Artificial Intelligence %K Overview and Goals of Project R DADO %I Columbia University %T DADO: A Parallel Processor for Expert Systems %K Overview and Goals of Project R DADO %I Columbia University %T Architecture and Applications of DADO: A Large-Scale Parallel computer for Artificial Intelligence %K Overview and Goals of Project R DADO %I Columbia University %T Specialized Hardware for Production Systems %K Overview and Goals of Project, R DADO, %I Columbia University %T DADO: A Tree-Structured Architecture for Artificial Intelligence Computation %K Overview and Goals of Project R DADO %I Columbia University %T Five Parallel Algorithms for Production System Execution of the DADO Machine %K Algorithms and Performance Analyses R DADO %I Columbia University %T LPS Algorithms %K Algorithms and Performance Analyses, R DADO, %I Columbia University %T LPS Algorithms: A Detailed Examination %K Algorithms and Performance Analyses, R DADO, %I Columbia University %T LPS Algorithms: A Critical Analysis %K Algorithms and Performance Analyses, R DADO, %I Columbia University %T A Note on Implementing OPS5 Production Systems on DADO %K Algorithms and Performance Analyses R DADO %I Columbia University %T Unification in a Parallel Environment %K Algorithms and Performance Analyses, R DADO, %I Columbia University %T Analyzing Prolog Programs %K Algorithms and Performance Analyses, R DADO %I Columbia University %T On the Design of Parallel Production System Machines: What's in a LIP? %K Algorithms and Performance Analyses, R DADO, %I Columbia University %T Performance Analysis of Two Competing DADO PE Designs %K Algorithms and Performance Analyses R DADO %I Columbia University %T DADO: A Tree-Structured Machine Architecture for Production Systems %K Algorithms and Performance Analyses R DADO %I Columbia University %T The DADO Parallel Computer %K Algorithms and Performance Analyses R DADO %I Columbia University %T Learning Control for Production Systems %K Algorithms and Performance Analyses, R DADO %I Columbia University %T IIPL: A Parallel Lisp for the DADO Machine %K Software Systems R DADO %I Columbia University %T A LISP Compiler for the DADO Parallel Computer %K Software Systems R DADO %I Columbia University %T PPL/M: The System Level for Programming the DADO Machine %K Software Systems R DADO %I Columbia University %T The Do-Loop Considered Harmful in Production System Programming %K Software Systems, R DADO %I Columbia University %T The Application of AI and DADO Parallel Technology to Future Unmanned Vehicle Systems %K Applications, R DADO %I Columbia University %T Are Maintenance Expert Systems Practical Now? %K Applications, R DADO %I Columbia University %T Is CAD/CAM Ready for AI? %K Applications, R DADO %I Columbia University %T Knowledge Engineering: Theory and Practice %K Applications, R DADO %I Columbia University %T ACE: An Expert System for Telephone Cable Maintenance %K Applications, R DADO, %I Columbia University %E M. Rubinoff %I MacMillan %C London %T Toward a National Information System %O From the Second Annual National Colloquium on Information Retrieval, Philadelphia, PA %D Second Edition, April 1965 %K SIGIR, IR, large system, Book %Z Call number Z 699 A1N3 1965 %T Survey on Macrocellular Research %R GJ-723 %I University of Iowa %D December 1972 %K btartar %T Distributed Processing Workshop, Part I, Sessions 0, 1, 2 %J Computer Architecture News, (SIGARCH) %I ACM %V 5 %N 5 %D December 1976 %P 10-28 %X Good dialogue between researchers studying multiprocessors and networks. Workshop was at Brown U, sponsored by DOD and NSF. Systems covered include: C.mmp, Cm*, HXDP, MININET, NSW, ICOPS, DCS, and a number of smaller systems internal to the organizations that produced them. Follow up was in CAN v5, #6, Feb. 1977. %T Distributed Processing Workshop Transcript, Part II, Sessions 3, 4, and 5 %J Computer Architecture News (SIGARCH) %I ACM %V 5 %N 6 %D February 1977 %P 8-24 %X Well covered interaction between researchers doing distributed processing from multiprocessors to networks. Part I was in CAN, v5, #5, Dec. 1976. %I Scientific American %T Special issue on microelectronics %J Scientific American %V 237 %N 3 %P 62-245 %D September 1977 %K Rdpsdis.bib Rsingh historical %X Probably too light a survey and obsolete. %T Array Processors Give Computers `Number Crunching' Power %J Digital Design %V 8 %N 7 %D July 1978 %P 84-85 %K blouie %T Array processor does shape recognition %J Electronic Design %V 26 %N 18 %D September 1 1978 %P 146 %K blouie %T Programmable Array Processors Offer New Options %V Digital Design %V 9 %N 7 %D July 1979 %P 70-74 %K blouie %T Parallel processing architecture and parallel algorithms for NATO conference %I NATO Advanced Studies Institute %B New Advances in Distributed Computer Systems %C BONAS, France %D June 1981 %K Rdap, %T SIGCOMM 84 Tutorials and Symposium on Communications, Architectures and Protocols %J Comput. Communication Rev. (USA) %V 14 %N 2 %C Montreal, Quebec, Canada %D 6-8 June 1984 Treatment APPLICATIONS, PRACTICAL %K computer networks network topology protocols Universe Network protocol design multicasting specification verification local area networks network topology satellites performance %X The following topics were dealt with: the Universe Network; protocol design methodologies; multicasting; protocol specification and verification; local area networks; network topology and protocol testing; satellites performance. 37 papers were presented, of which 36 are published in full in the present proceedings and one as abstract only. Abstracts of individual papers can be found under the relevant classification codes in this or other issues %T Proceedings of the IEEE INFOCOM 84 %C San Francisco, CA, USA %I IEEE Comput. Soc. Press, (IEEE Cat. No. 84CH2012-3), ISBN: 0-8186-0530-8 %D 9-12 April 1984 %K protocols reliability telecommunication networks LAN medium access units computer network reliability flow congestion control multiaccess protocols distributed control algorithms high performance LAN architectures LAN performance evaluation distributed database systems integrated services networks CCITT activities routing packet switched networks formal methods communication protocols packet radio networks computer communication systems %X The following topics are dealt with: design of LAN medium access units; computer network reliability; flow and congestion control; multiaccess protocols; distributed control algorithms; high-performance LAN architectures; LAN performance evaluation; distributed database systems; performance of integrated services networks; CCITT activities; routing in packet-switched networks; formal methods for communication protocols; packet radio networks; and design of computer communication systems. 48 papers were presented, all of which are published in full in the present proceedings. Abstracts of individual papers can be found under the relevant classification codes in this or other issues %T Caltech Concurrent Computation Project Programmer's Manual %D August 1984 %I California Institute of Technology %C Pasadena, CA %K Caltech Cosmic Cube, hypercube, C^3P, NNCP, Rcccp, %T Caltech Concurrent Computation Project - List of memos/ papers %R Hm 0 %D Currently 1984 %I California Institute of Technology %C Pasadena, CA %K Caltech Cosmic Cube, hypercube, C^3P, Rcccp, %T The Transputer spawns a radically new computer: A matrix of the new microprocessors runs engine at 750 MIPS %J Electronics %D 7 Oct. 1985 %P 43-45 %T A Model for the Basic Block Protocol of the Cambridge Ring %J IEEE Transactions on Software Engineering %V SE-11 %N 1 %P 130-135 %D January 1985 %T Transputer computer system blazes at 3000 MIPS %J Electronics %D 21 Aug. 1986 %P 21 %T How Meiko is getting an instant supercomputer %J Electronics %D 27 Nov. 1986 %P 56-57 %K transputer, %T This CPU does floating point faster than any two-chip set %J Electronics %D 27 Nov. 1986 %P 51-55 %K transputer, %T Dynamic optical interconnections for parallel processors %J Proceedings of the Optical Computing Symposium %I SPIE %D January 1986 %K optics, optical crossbars %T Network Support of Supercomputers: Conference Report. %J Future Generation Computer Systems %V 2 %N 1 %D MAR 1986 %P 65 %K H04 %T Parallel Processing Startup will Take on the Big Players %J Electronic News %D NOV 13, 1986 %V 59 %N 35 %P 21 %K AT02 H03 Dado Columbia tree %X The Dado, a tree structure architecture, implemented at Columbia University is being developed by a startup company. It consists of 16 to 64 68020 processors and will cost $90,000. It will work as an accelerator in conjunction with a SUN work station. %T Approach to Remote Access %B Distributed Ada for the Ada Language System/Navy %D 1987 %R Technical Report %T Optical crossbar interconnections using variable grating mode devices %J Applied Optics %D 15 January 1987 %K optics, optical crossbars %T Design tricks speed up Inmos's SRAMS %J Electronics %D 16 Apr. 1987 %P 34 %K transputer, %T A downsized Inmos is on its way back %J Electronics %D 25 June 1987 %P 34-35 %K transputer, %T Fiber-optic crossbar switch with broadcast capability %J Optical Engineering %D November 1988 %K optics, optical crossbars %E ? Soren. Brunak, Benny. Lautrup. %T Neural networks: computers with intuition %C Singapore ; Teaneck, N.J., USA %I World Scientific %D 1990 %K book, text, AI, artificial intelligence, %T Mini-Symposium on Concurrent Simulation Paradigms %J Proceedings of the Fifth Distributed Memory Computing Conference %V I, Applications %I IEEE %C Charleston, SC %D April 1990 %P 574 %K trade-off, DMCC5, %T Cray Channels %J Cray Channels %D 19xx %X We have a complete index of all articles from Cray Channels. They have not been converted into refer and it is not clear, because of their lack of technical details, whether they will be included. Ask if you want to see. ENM. %T Systolic Arrays %J Systolic Arrays %D 19xx %X H. T. Kungs' systolic array biblio (in bibtex or Scribe) is available. Many reference are inside the parallel biblio, but you should ask Kung to FTP his biblio. ENM. %T Parallel Debugging and Monitoring %J Parallel Debugging and Monitoring %D 19xx %X Paula Honing's parallel debugging biblio is available from her via anonymous FTP. Most portions have been incorporated into the parallel biblio. ENM. %T A Fiber-based Crosspoint Switch using High-refractive Index Interlay Materials %J IEEE J. on Selected Areas in Commun. %V 6 %N 7 %D 8/1988 %P 1160-1167 %K optics, optical crossbars %A %T The Convex C240 Architecture %J Proceedings Supercomputing'88 %I IEEE and ACM SIGARCH %C Orlando, FL %D November 1988 %P 321-329 %K supercomputer architecture, ASAP (automatic self-allocating processors), %A U. Trottenberg (ed.) %T Supercomputing based on parallel computer architectures %J Proceedings of the 2nd International Suprenum Colloquium, Parallel Computing %V 7 %N 3 %D 1988 %K Suprenum (SUPerREchner fuer NUMerische Anwendungen), Cluster, MIMD/SIMD, %X Introductory remarks. %A ? %T A simple definition for parallel composition of prime event structures %C Amsterdam %D 1989 %M f 4,-- %R CWI. Department of Computer Science ; R 8903 %A ? %Z Hirosaki U. %T Complexity of Parallel Matrix Computations %J Parallel Processing in Scientific Computation %I Keio University %D 16 March 1990 %A ?? %T Report on Programming Language Haskell: A Non-strict, Purely Functional Language, Version 1.2 %J ACM SIGPLAN Notices %V 27 %N 5 %D May 1992 %K dataflow, %A ??? %T Experience with Distributed Systems %S Lecture Notes in Computer Science %V 309 %C Kaiserslautern, FRG %D Sep. 1987 %X international workshop proceedings %A ??? %T Parallel Inference System Research in the FGCS Project %J Proceedings - 1987 Symposium on Logic Programming %I IEEE Computer Society Press %P 274-276 %D September 1987 %A ??? %T Parallel Version of the FMM %J Computers Math Applications %V 20 %N 7 %D 1990 %P 63 %K fast multipole method, benchmarking, %A ???, eds. %T Fourth ACM SIGOPS European Workshop-- Fault Tolerance Support in Distributed Systems %I Univ. of Bologna %D Sept. 1990 %A ??? %T The Multiflow Trace Scheduling Compiler %J The Journal of Supercomputing %V 7 %D 1993 %P 51-142 %A A. A. Aaby %A K. T. Narayana %Z PennSU %T A Distributed Implementation Scheme for Communicating Processes %J Proceedings of the 1986 International Conference on Parallel Processing %I IEEE %D August 1986 %P 942-949 %K Distributed processing, CSP, ANa scheme, algorithms, synchronization, %A Yeturu Aahlad %A J. C. Browne %T Balanced Protocols for Sequencing Distributed Computations %R TR-87-39 %I University of Texas, CS Dept. %C Austin, TX %D October 1987 %X 50 pages "Optimistic" and "pessimistic" protocols [Jefferson] and [Schneider] respectively, represent end-points of a spectrum of protocols which we call "balanced." %A IJsbrand Jan Aalbersberg %A Frans Sijstermans %T High-Quality and High-Performance Full-Text Document Retrieval: the Parallel InfoGuide System %J Proc. First Intl. Conference on Parallel and Distributed Information Systems %I IEEE Computer Society Press %C Los Alamitos, CA %D December 1991 %P 142-150 %K PDIS, retrieval, POOMA, %A S.J. Aarseth %A E. Bettwieser %T A Unified N-Body Method %B The Use of Supercomputers in Stellar Dynamics %I Springer-Verlag %C Berlin %D 1986 %E P. Hut %E S. McMillan %V 267 %K Poster Session %P 201-202 %X Possible DAMAGE here. See next paper %A S.J. Aarseth %A S. Inagaki %T A Unified N-Body Method %B The Use of Supercomputers in Stellar Dynamics %I Springer-Verlag %C Berlin %D 1986 %E P. Hut %E S. McMillan %V 267 %K Poster Session %P 203-205 %X Possible DAMAGE here. See previous paper. %A E.H.L. Aarts %A P.J.M. van\ Laarhoven %T Statistical Cooling: A General Approach to Combinatorial Optimization Problems %J Philips Journal of Research %V 40 %D 1985 %P 193-226 %K simulated annealing, %A E. H. L. Aarts %A J van\ Leeuwen %A M. Rem, eds %T PARLE'91: Parallel Architectures and Languages Europe %S LNCS %V 506, Volume II, Parallel Languages %I Springer-Verlag %C Berlin %D 1991 %K book, text, %A Emile H. L. Aarts %A Frans M. J. de Bont %A Erik H. A. Habers %A Peter J. M. van\ Laarhoven %T A Parallel Statistical Cooling Algorithm %J Proceedings of the Symposium on the Theoretical Aspects of Computer Science %V 210 %P 87-97 %D jan 1986 %K simulated annealing, %A Emile H. L. Aarts %A Frans M. J. de\ Bont %A Erik H. A. Habers %A Peter J. M. van\ Laarhoven %T Parallel Implementations of the Statistical Cooling Algorithm %J Integration, the VLSI Journal %I North-Holland %V 4 %N 3 %D sep 1986 %P 209-238 %K simulated annealing, %A Emile H. L. Aarts %A Jan H. M. Korst %A Peter J. M. van\ Laarhoven %T A Quantitative Analysis of the Simulated Annealing Algorithm: A Case Study for the Traveling Salesman Problem %J Journal of Statistical Physics %V 50 %N 1/2 %D jan 1988 %P 187-206 %K TSP, %A Emile H. L. Aarts %A Jan Korst %T Simulated Annealing and Boltzmann Machines: A Stochastic Approach to Combinatorial Optimization and Neural Computing %I Wiley %C Chichester %D 1989 %K parallel algorithms, book, text, %X Review for will appear in J. Stat. Physics, in August, by Michael Mascagni. Highly recommended. %A Emile H. L. Aarts %A Jan H. M. Korst %T Computation in Massively Parallel Networks based on the Boltzmann Machine: A Review %J Parallel Computing %V 9 %N 2 %D January 1989 %P 129-145 %K PARLE: conference on parallel architectures and languages -- Europe, Boltzmann machines, simulated annealing, combinatorial optimization, connectionist networks, neural networks, learning, %K simulated annealing, parallel algorithms, %A M. Abadi %A M. Burrows %A B. Lampson %A G. Plotkin %T A Calculus for Access Control in Distributed Systems %I DEC SRC %R TR 70 %D February 28, 1991 %A Bulent Abali %A Fusun Ozguner %A Abdulla Bataineh %T Balanced Parallel Sort on Hypercube Multiprocessors %R Technical Report %I Ohio State University %D 1990 %A Bulent Abali %A Fusun Ozguner %A Abdulla Bataineh %T Load Balanced Sort on Hypercube Multiprocessors %J Proceedings of the Fifth Distributed Memory Computing Conference %V I, Applications %I IEEE %C Charleston, SC %D April 1990 %P 230-236 %K Sorting, DMCC5, %A Bulent Abali %A Bruce D. Gavril %A Richard W. Hadsell %A Linh Lam %A Brion Shimamoto %T Many/370: A Parallel Computer Prototype for I/O Intensive Applications %J Sixth Distributed Memory Computing Conference Proceedings %I IEEE %C Portland, OR %D April/May 1991 %P 728-730 %K DMCC6, architecture, short papers, high performance I/O, %K parallel I/O, multiprocessor file system, %X Describes a parallel IBM/370, where they attach several small 370s to a switch, and several disks to each 370. But they don't seem to have much in the way of striping. [David.Kotz@Dartmouth.edu] %A Russell J. Abbot %Z Aerospace Corp. %T Resourceful Systems for Fault Tolerance, Reliability, and Safety %J Computing Surveys %I ACM %V 22 %N 1 %D March 1990 %P 35-68 %X Included for software reliability, not much about multiprocessors specifically, but it's needed for that reliability. Survey appears weak. %A Curtis Abbott %T Intervention Schedules for Real-Time Programming %J IEEE Transactions on Software Engineering %V SE-10 %N 3 %D May 1984 %P 268-274 %K Concurrency, multiprogramming, nonpreemptive scheduling, parallel programming, programming models, real-time programming, real-time systems, systems implementation %A Robert Abbott %A Rafael Alonso %A Daniel Barbara %A Ricardo Cordon %A Hector Garcia-Molina %A Philip Goldman %A Mark Karol %A Jack Kent %A Boris Kogan %A Frank Pittelli %A Peter Potrebic %A Stuart Scheartz %A Patricia Simpson %A Annemarie Spauster %A Michael Sotessl %A Sergio Verdu %T Distributed Computing Research at Princeton 1985 %I Princeton University %C Princeton, NJ %R CS-TR-029-86 %D 1986 %A T. K. Abdel-Hamid %A S. E. Madnick %T A study of the multicache-consistency problem in multi-processor computer systems %I Center for Information Research, M.I.T. %R 16 %D 1981 %K cache consistency, coherence, %T A Bit-Sliced Special Purpose Unit for Relational Database Aggregation Operations %P I-601--I-602 %A M. Abdelguer %A H. Munaf %J Proceedings of the 1990 International Conference on Parallel Processing %V I, Architecture %I Penn State U. Press %C University Park, Penn %D August 1990 %K poster session, Application-Specific Parallel Architectures and Systems, %A Tarek S. Abdelrahman %A Trevor N. Mudge %Z U. MI %T Parallel Branch and Bound Algorithms on Hypercube Multiprocessors %J The 3rd Conference on Hypercube Concurrent Computers and Applications %V II, Applications %I ACM %C Pasadena, CA %D January 1988 %P 1492-1499 %K branch and bound, BB, PBB, 0-1 integer linear programming (ILP), NCUBE implementation, distributed, centralized lists, %A Akram Abdennadher %A Tse-yun Feng %T On Rearrangeability of Omega-Omega Networks %J Proceedings of the 1992 International Conference on Parallel Processing %V I, Architecture %I CRC Press %C Boca Raton, FL %D August 1992 %P I-159--I-165 %K multistage IC networks, %A F. Abdollahzadeh %A M. Badii %A D. J. Cooke %T A New Grammar for Arithmetic Expressions in a Parallel Processing Environment %J Proceedings of the IEEE Conference %D 1986 %A Fatemah Abdollahzadeh %A Medhi Badii %A D. J. Cooke %T A New Grammar for Arithmetic Expressions in a Parallel Processing Environment %J Proceedings of the 1986 International Conference on Parallel Processing %I IEEE %D August 1986 %P 75-83 %K Mathematical analysis and computation, ambiguous context free grammars, context sensitive grammars, phrase structure grammar, parsing, %A George Abe %A Kunio Hane %Z Keio U. %T The Preconditioned Conjugate Gradient Method on the Hypercube %J The 3rd Conference on Hypercube Concurrent Computers and Applications %V II, Applications %I ACM %C Pasadena, CA %D January 1988 %P 1676-1686 %K differential equations and associated matrix algorithms, hypercube, concurrent processing, preconditioned conjugate gradient, Poisson's solvers, load balancing, iPSC, BCG, SCG, CG, SOR, ICCG, %A S. Abe %A T. Bandoh %A S. Yamaguchi %A K. Kurosawa %A K. Kiriyama %T High Performance Integrated Prolog Processor IPP %J Proc. 14th Annual Symposium on Computer Architecture, Computer Architecture News %I ACM %V 15 %N 2 %D June 1987 %P 100-107 %K integrated Prolog processor (IPP) %A S. Abe %A M. Kayama %A H. Takenaga %Z Hitachi %T How Neural Networks for Pattern Recognition Can Be Synthesized %J JOURNAL OF INFORMATION PROCESSING %V 14 %N 3 %D 1991 %P 344-350 %A Yoshihiko Abe %T Present Status of Computer Simulation at IPP %E Joanne L. Martin %E Stephen F. Lundstrom %B Science and Applications: Supercomputing'88 %V II %I IEEE %C Orlando, FL %D 1988 %P 72-80 %K computational physics, institute for plasma physics, VP-100, fusion, MHD, vectorization, %A N. A. Abel %A P. B. Budnik %A D. J. Kuck %A Y. Muraoka %A R. H. Wilhelmson %A R. S. Northcote %T TRANQUIL: A Language for an Array Processing Computer %J Conference Proceedings 1969 SJCC %P 57-73 %V 35 %I AFIPS Press %D 1969 %K bhibbard, Rhighnam, %K ILLIAC-IV, %X Overview in BARNES68. %A V. Abell %T The Purdue Dual MACE Operating System %I Purdue University %D NOV 1978 %K Abell1 %A Harold Abelson %T Lower Bounds on Information Transfer in Distributed Computations %J Symposium on Foundations of Computer Science %D October 1978 %P 151-158 %K Rdpsdis.bib Rsingh %X Also, see the JACM paper of same title, v 27, #2, April 1980, pp 384-392. %A Harold Abelson %T Lower Bounds on Information Transfer in Distributed Computations %J Journal of the Association for Computing Machinery %V 27 %N 2 %D April 1980 %P 384-392 %K Rdpsdis.bib Rsingh %K maeder biblio: general work, %X Aargh! Very mathematical treatment. Also published in the Symp. on Foundations of Computer Science, Oct 1978. %A Harold Abelson %A Michael Eisenberg %A Mathew Halfant %A Jacob Katzenelson %A Elisha Sacks %A Gerald Jay Sussman %A Jack Wisdom %A Ken Yip %T Intelligence in Scientific Computing %R AIM 1094 %I MIT %C Cambridge, MA %D November 1988 %O pages 35 %$ 3.25 %X Also published in Communications of the ACM, vol. 32, no. 5, May 1989. %X Combining numerical techniques with ideas from symbolic computation and with methods incorporating knowledge of science and mathematics leads to a new category of intelligent computational tools for scientists and engineers. These tools autonomously prepare simulation experiments from high-level specifications of physical models. For computationally intensive experiments, they automatically design special-purpose numerical engines optimized to perform the necessary computations. They actively monitor numerical and physical experiments. They interpret experimental data and formulate numerical results in qualitative terms. They enable their human users to control computational experiments in terms of high-level behavioral descriptions. %A Harold Abelson %A Andrew A. Berlin %A Jacob Katzenelson %A William H. McAllister %A Guillermo J. Rozas %A Gerald Jay Sussman %T The Supercomputer Toolkit and its Applications %R AI Memo 1249 %I MIT AI Lab %D July 1990 %K dynamicist's workbench, BIT, digital orrey, VLIW, %X Jerusalem Conference on Information Technology V, Oct. 1990. %X This paper (funded by H-P) incredibly naive. It might solve a bunch of problems, but they are not supercomputer problems. The modules are potentially interesting, but the problem is specialized. Misleading title. %A Oliver Aberth %T A Multiple Computer Linkage %J IEEE Transactions on Computers %V C-18 %N 12 %D December 1969 %P 1132-1134 %K digital computer, memory unit positioner, multiple computer system, shared memory, switched memory units Short notes, logical design %A M. Abida %A J. M. Andrade %T Update Consistency and Parallelism in Distributed Databases %J 2nd International Conference on Distributed Computing Systems %I IEEE %C Paris, France %D April 1981 %P 180-187 %K Distributed databases %J Proceedings of the 1979 International Conference on Parallel Processing %D August 1979 %T On conflict-Free Permutations in Multi-Stage Interconnection Networks %A Mohammad A. Abidi %A Dharma P. Agrawal %P 159 %K Interconnection Networks %X Summary only. %A A. Abnous %A R. Potasman %A N. Bagherzadeh %A A. Nicolau %T A Percolation Based VLIW Architecture %J Proceedings of the 1991 International Conference on Parallel Processing %V I, Architecture %I CRC Press %C Boca Raton, FL %D August 1991 %P I-144--I-148 %K processor architectures, concise papers, %A Jacob A. Abraham %A Daniel P. Siewiorek %T An Algorithm for the Accurate Reliability Evaluation of Triple Modular Redundancy Networks %J IEEE Transactions on Computers %V C-23 %N 7 %D July 1974 %P 682-692 %K Coherent system, N-tuple modular redundancy, reliability modeling, serial cell, triple modular redundancy (TMR). Special issue on fault tolerant computing %A Jacob A. Abraham %A Prithviraj Banerjee %A Chien-Yi Chen %A W. Kent Fuchs %A Sy-Yen Kuo %Z U. Ill. %T Fault Tolerance Techniques for Systolic Arrays %J IEEE Computer %V 20 %N 7 %D July 1987 %P 65-75 %K Special issue on systolic arrays, concurrent redundant computation design, error detection and correction, reconfiguration, %A S. Abraham %A K. Padmanahhan %T An Analysis of the Twisted Cube Topology %J Proceedings of the 1989 International Conference on Parallel Processing %V I - Architecture (Hardware) %I Penn State %C University Park, Penn %D August 1989 %P I-116--I-120 %K Networks %A S. M. Abraham %A Y. K. Dalal %T Techniques for decentralized management of distributed systems %J Compcon Spring '80. VLSI: new architectural horizons %P 430-437 %D 25-28 Feb. 1980 %C San Francisco, CA, USA %I IEEE, New York, USA xvi+504 pp. %O 19 Refs. treatment: applic, general, review %K e.d.p. management multiprocessing systems decentralized management distributed systems loosely coupled system %X Considers techniques for dealing with dynamic reconfiguration that allow a distributed system to be managed in a decentralized fashion at reasonable cost. In particular, how binding strategies impact the degree to which the system can automatically cope with dynamic reconfiguration is discussed. %A Santosh G. Abraham %A Edward S. Davidson %Z CSRD U Ill. %T A Communication Model for Optimizing Hierarchical Multiprocessor Systems %J Proceedings of the 1986 International Conference on Parallel Processing %I IEEE %D August 1986 %P 467-474 %r CSRD Report No. 557 %K Multiprocessors, interconnection, extensibility, models, tradeoffs, utilization, clusters, emulation, ring, hypercube, mesh, %A Santosh G. Abraham %A Edward S. Davidson %T Task Assignment Using Network Flow Methods for Minimizing Communication in n-Processor Systems %I University of Illinois %C Urbana-Champaign, IL %D September 1986 %R 598 %K algorithms, architecture, compilers, networks, performance-evaluation, interprocessor communication, network flow algorithms %K RCedar, %A Santosh G. Abraham %A Janak H. Patel %T Parallel Garbage Collection on a Virtual Memory System %J Proceedings of the 1987 International Conference on Parallel Processing %I Penn State %C University Park, Penn. %D August 1987 %P 243-246 %K Compiler Techniques %r CSRD TR #620 %d January 1987 %A Santosh G. Abraham %A Timothy A. Davis %T Blocking for Parallel Sparse Linear System Solvers %J Proceedings of the 1988 International Conference on Parallel Processing %V I, Architecture %I Penn State %C University Park, Penn %D August 1988 %P 166-173 %r CSRD 742 %d January 1988 %K Multiprocessor Performance, Alliant FX/8, block solve algorithm, shared memory, global communication delays, %X Contrasted to pairwise solve (Psolve) and Given's reduction. %A Santosh George Abraham %T Reducing Interprocessor Communication in Parallel Architectures: System Configuration and Task Assignment %R CSRD TR #726 %I Ctr. for Supercomputing Res. and Develop., U. Ill. %C Urbana, Ill. %D January 1988 %K PhD thesis, %A Seth Abraham %A Allan Gottlieb %A Clyde Kruskal %R ULTRACOMPUTER NOTE #70 %T Simulating Shared-Memory Parallel Computers %I Courant Institute of Mathematical Sciences, Computer Science Dept., New York University %D April 1984 %A Seth Abraham %A D. D. Gajski %T A communication algorithm for a wafer scale integrated multiprocessor %J Proceedings of the 1984 International Conference on Parallel Processing %I IEEE %D August 1984 %P 147-154 %K VLSI, WSI, routing algorithms, tree flooding, fault tolerance %X A proposal for communications between processing elements. A 16x16 processor is simulated. %A Seth Abraham %A Krishnan Padmanabhan %Z U Ill and ATT BL %T Performance of the Direct Binary n-Cube Network for Multiprocessors %J Proceedings of the 1986 International Conference on Parallel Processing %I IEEE %D August 1986 %P 636-639 %K Hypercube architecture, communication, interconnection, unbuffered and buffered networks, model, packet-switching, %A Seth Abraham %A Krishnan Padmanabhan %T Reliability of the Hypercube %J Proceedings of the 1988 International Conference on Parallel Processing %V I, Architecture %I Penn State %C University Park, Penn %D August 1988 %P 90-94 %K Meshes, binary d-cube, node failure, link failure, combined failure, remapping topologies, MTTF, state diagram, paper study, %A Seth Abraham %A Krishnan Padmanabhan %T Constraint Based Evaluation of Multicomputer Networks %J Proceedings of the 1990 International Conference on Parallel Processing %V I, Architecture %I Penn State U. Press %C University Park, Penn %D August 1990 %P I-521--I-525 %K Multicomputer Network Design, %r CSRD TR #959 %d January 1990 %A Seth Abraham %T Issues in the Archiecture of Direct Interconnection Schemes for Multiprocessors %R CSRD Report #977 %I U. Ill. %C Urbana-Champaign %D March 1990 %K PhD thesis, %A Seth Abraham %A Krishnan Padmanabhan %T Effect of Data Access Delays and System Partitionability on the Dynamic Performance of a Shared Memory Multiprocessor %J Proceedings Supercomputing'92 %I IEEE %C Minn., MN %D November 1992 %P 674-682 %K distributed computing, %A Paul Abrahams %T The Limits of Software Safety %J Spring 1987 Proceedings Cray User Group Meeting %I CUG %C New York, NY? %D Spring 1987 %P 13-14? %K keynote speech, %A Karl Abrahamson %A Andrew Adler %A Lisa Higham %A David Kirkpatrick %T Probabilistic Solitude Verification on a Ring %J Proceedings of the Fifth Annual ACM Symposium on Principles of Distributed Computing %C Calgary, Alberta, Canada %D August 1986 %P 161-173 %A Karl Abrahamson %T On Achieving Consensus Using A Shared Memory %R CS-88-184 %I Computer Science Department, Washington State University %D 1988 %A Santosh G. Abrahma %T Parallel Simulation of Shared Memory Multiprocessors %J Proceedings Supercomputing '88: Supercomputer Design: Hardware & Software %V 3 %I International Supercomputing Institute, Inc. %C St. Petersburg, Florida %D 1988 %P 313-321 %K The Use of Supercomputers for Architectural and Logic Simulation %A Greg D. Abram %A Henry Fuchs %T VLSI Architectures for Computer Graphics %B Advances in Computer Graphics I, (EUROGRAPHICS 1986) %P 189-204 %X Good review of the work that has been done in this field, both in industry and academia. They classify Clark's Geometry Engine and Fuchs' Pixel-Planes as operating in image space, while Kedem and Cohen's work is in object space. Defines a general graphics computing model and how it has been implemented in various devices and their architectures. VLSI for line drawing, bit-blitting. VLSI for systems: TI's 4161 row-scan memory chip, Clark's Geometry Engine, NEC's 7220 raster fill and scan chip, TI's TMS9118. Also different VLSI architectures: Clark and Hannah's screen segmentation, the Pixel-Planes approach, Kedem's CSG machine, Cohen and Demetrescu's processor per polygon. %A S. M. Abramov %A A. I. Adamowich %A I. A. Nesterov %A S. P. Pimenov %A Yu. V. Shevchuck %T Autotransformation of evaluation network as a basis for automatic dynamic parallelizing %J ??? %C Canada %D May 1993 %X Abstract. The paper described a computation model designed to organize parallel computing. The computation is represented as an autotransformation of an evaluation network consisting of processes and data. This model can be used as a basis for a programming system with automatic dynamic parallelizing of programs. It is supposed that the source language of the system should be similar in its syntax to the conventional languages C, Pascal, Fortran without side effects. Languages are imperative inside functions and are functional - outside functions. The grains of parallelism are the function of the source language. The programming system is intended for parallel equipment based of Intel microprocessors, Inmos Transputers, and the Texas Instruments parallel DSPs. %A Marc Abrams %A Ashok K. Agrawala %T Performance Study of Distributed Resource Sharing Algorithms %R TR-1521 %I University of Maryland %C College Park, MD %D July 1985 %A Marshall Abrams %A Ira W. Cotton, eds. %T Computer Networks: A Tutorial (4th edition) %I IEEE %D 1984 %X This IEEE tutorial's papers are either enumerated or of such low-level content as to be uninteresting to most: e.g. a paper on what a modem is... It also lacks some significant papers such as the original Ethernet paper. %A S. Abramsky %T Reasoning About Concurrent Systems %B Distributed Computing - Part V Modelling and Verification %E Fred B. Chambers %E David A. Duce %E Gillian P. Jones %I Academic Press %S APIC Studies in Data Processing %V 20 %D 1984 %P 307-319 %A Samson Abramsky %A Richard Bornat %T Pascal-m: a Language for Loosely Coupled Distributed Systems %E Y. Paker %E J.-P. Verjus %B Distributed Computing Systems (Synchronization, Control and Communication) %I Academic Press %D 1983 %P 163-189 %K Pascal-m, [mail box]. %A B. Abramson %A M. Young %T Divide and conquer under global constraints: a solution to the n-queens problem %J Journal of Automated Reasoning %N 61 %P 649-662 %D 1989 %K parallel benchmarking, %X The article gives a fairly easy algorithm to give at least one solution to the n-queens problem for all N where N not is one of <2,3,8,9,14,15,26,27,38,39>. Those can easily be solved with some other algorithm. %X As a matter of fact the paper show how to solve the n-superqueens problem. In this problem the board is closed in a toroidal shape. It is easy to see that a solution to the n-superqueens problem also is a solution to the n-queens problem. %A Bruce Abramson %A Moti Yung %T Divide And Conquer Under Global Constraints: A Solution To The N-Queens Problem %J Journal of Parallel and Distributed Computing %V 6 %N 3 %D June 1989 %P 649-662 %K Research Notes %A D. Abramson %T Using a Dataflow Multiprocessor for Functional Logic Simulation %J Proceedings Supercomputing '88: Supercomputer Design: Hardware & Software %V 3 %I International Supercomputing Institute, Inc. %C St. Petersburg, Florida %D 1988 %P 288-297 %K The Use of Supercomputers for Architectural and Logic Simulation %A D. A. Abramson %A J. L. Keedy %T Implementing a large virtual memory in a distributed computing system %B Proceedings of the Eighteenth Annual Hawaii International Conference on System Sciences %V 2 %E Bruce D. Shriver %C Honolulu, Hawaii %D 1985 %P 515-522 %A Harvey Abramson %T Sequential and concurrent deterministic logic grammars %E Ehud Shapiro %B Proceedings of the Third International Conference on Logic Programming %I Springer %C Berlin %D 1986 %P 389-395 %A N. Abramson %A Frank Kuo %T Computer-Communication Networks %I Prentice-Hall %C Englewood Cliffs, New Jersey %D 1973 %K rwa, book, text, packet switching, %A N. Abramson %T The Aloha system %B Computer-Communication Networks %E N. Abramson %E Frank Kuo %I Prentice-Hall %C Englewood Cliffs, New Jersey %D 1973 %P 501-518 %K rwa, %X Could be page 508 not 518. %A J. R. Abrial %T A Practical Approach to the Analysis of Concurrent Systems %E B. T. Denvir %E W. T. Harwood %E M. I. Jackson %E M. J. Wray %B The Analysis of Concurrent Systems %S Lecture Notes in Computer Science %V 207 %I Springer-Verlag %C Berlin %D 1985 %P 66-96 %K tutorial, %A Vadim Abrosimov %A Francois Armand %A Maria Ines Ortega %Z Chorus Systemes, France %T A Distributed Consistency Server for the CHORUS System %J Symposium for Experiences with Distributed and Multiprocessor Systems %I Usenix %D March 1992 %P 129-148 %K SEDMS III, Distributed Shared Memory, %A V. Abrossimov %T Generic virtual memory management for operating system kernels %J Procs of "progress in distributed operating systems and distributed systems management" %C Berlin %D April 1989 %I Springer Verlag %r CS-TR-89-18 %K Chorus distributed operating system, %A Vadim Abrossimov %A Marc Rozier %A Marc Shapiro %T Generic Virtual Memory Management for Operating System Kernels %J Proc. Twelfth ACM Symposium on Operating Systems, Operating Systems Review %V 23 %N 5 %D December 1989 %P 123-136 %r CS-TR-89-30 %K Structural Issues %K Chorus distributed operating system, %X Chorus.fr: GVM-12sosp90.ps.Z %A I. Absar %T Vectorization of a Penalty Function Algorithm for Well Scheduling %J CYBER 200 Applications Seminar %R NASA Conference Publication 2295 %D October 1983 %E J. Patrick Gary, Compiler %I NASA Goddard Space Flight Center %C Greenbelt, Maryland %P 363-370 %A W. Abu-Sufah %A D. J. Kuck %A D. H. Lawrie %T On the Performance Enhancement of Paging Systems Through Program Analysis and Transformations %J IEEE Transactions on Computers %V C-30 %N 5 %D May 1981 %P 341-355 %K Rhighnam, compiler, optimization, Parafrase, FORTRAN, %A Walid Abu-Sufah %A Harlan Husmann %A David Kuck %T On Input/Output Speed-Up in Tightly-Coupled Multiprocessors %I University of Illinois %C Urbana-Champaign, IL %R UIUCDCS-R-84-1182 %D August 1984 %A Walid Abu-Sufah %A Alex Y. Kwok %T Performance Prediction Tools for Cedar: A Multiprocessor Supercomputer %J Proceedings of the 12th International Symposium on Computer Architecture %I IEEE %D June 1985 %C Boston, MA %P 406-413 %r Cedar Rept. No 58 %K Multiprocessor Performance, Cedar performance prediction package (CPPP), Parafrase, TCEDAR, cedar simulator CSIM, %A Walid Abu-Sufah %A Allen D. Malony %Z CSRD U Ill. %T Vector Processing on the Alliant FX/8 Multiprocessor %J Proceedings of the 1986 International Conference on Parallel Processing %I IEEE %D August 1986 %P 559-566 %r CSRD TR 541 %K Multiprocessors, LLNL loops, LANL kernels, experimental study, %X They used 1 and 8 computational elements and looked at startup overheads, and other processing rates. %A Walid Abu-Sufah %A Allen D. Malony %T Experimental Results for Vector Processing on the Alliant FX/8 %R CSRD Rpt. 539 %I University of Illinois %C Urbana-Champaign, IL %D February 1986 %K RCedar, %A Walid Abu-Sufah %A Harlan E. Husmann %A David J. Kuck %T On Input/Output Speedup in Tightly Coupled Multiprocessors %J IEEE Transactions on Computers %V C-35 %N 6 %D June 1986 %P 520-530 %r CSRD Rpt. 452 %d July 1986 %K parallel I/O, I/O, %X Also TR UIUCDCS-R-84-1182 from CS at UIUC. Derives formulas for the speedup with and without I/O considered and with parallel software and hardware format conversion. Considering I/O gives a more optimistic view of the speedup of a program {\em assuming} that the parallel version can use its I/O bandwidth as effectively as the serial processor. Concludes that, for a given number of processors, increasing the I/O bandwaidth is the most effective way to speed up the program (over the format conversion improvements). [David.Kotz@Dartmouth.edu] %A A. S. Acampora %A M. G. Hluchyj %A C. D. Tsao %T A centralized-bus architecture for local area networks %J IEEE International Conference on Communications: Integrating Communication for World Progress (ICC '83) %C Boston, MA, USA %P 932-938 %V 2 %O 13 Refs Treatment APPLICATIONS, PRACTICAL. %D 19-22 June 1983. %K communication networks computer networks data communication systems. circuit switching data communication networks centralized bus architecture local area networks access protocol real time synchronous data voice administration maintenance bus contention packet switching remote concentrators optical fibers. %X A local area network architecture based upon a centrally located short bus is described. This architecture enjoys several distinct advantages relative to bus architectures of a distributed nature. Among these are the ability to operate the short bus at high data rates and traffic loads, independent of the geographical separation among interconnected devices, a simple media access protocol that permits the integration of widely disparate traffic types, including real-time synchronous data and voice, and centralized administration and maintenance. The bus contention mechanism results in a flexible distributed scheduling of packets that not only provides low contention delay under heavy traffic load conditions, but also permits the integration of circuit-and packet-switching features on a common bus. Traffic is collected by a system of geographically distributed remote concentrators that interconnect with the centrally located short bus by means of high capacity point-to-point links such as optical fibers. With its modular construction, the centralized-bus architecture provides necessary flexibility to serve new needs and take advantage of new technologies. %A A. S. Acampora %A M. G. Hluchyj %A C. D. Tsao %T Performance of a centralized-bus local area network %J Local Networks. Distributed Office and Factory Systems. Proceedings of Localnet '83 %C New York, USA %I Online Publications, Pinner, England xii+524 %P 159-169 %O 7 Refs Treatment PRACTICAL. %D 27-29 June 1983 %K computer networks data communication systems packet switching. centralized bus local area network performance media access scheme packet transmissions packet switching. %X The performance of the media access scheme employed by a centralized-bus local area network is examined. This scheme, owing to the short centralized bus, achieves a perfect scheduling of packet transmissions. That is, there are neither destructive collisions nor periods when the bus is idle with packets awaiting transmission. Furthermore, the scheduling of packet transmission is both distributed and flexible, allowing for multiple priority classes, round-robin-like scheduling within a priority class, and even integrated circuit-and packet switching. Performance comparisons are made with respect to other popular contention schemes. The results clearly show the superior performance of the proposed bus contention scheme. %A Mike Accetta %A Robert Baron %A William Bolosky %A David Golub %A Richard Rashid %A Avadis Tevanian %A Michael Young %T Mach: A New Kernel Foundation for UNIX Development %J USENIX 1986 Technical Conference %C Atlanta, Georgia %D June 9-13, 1986 %P 93-112 %K Mach-One, VAX 784, %A A. Acharya %A M. Tambe %Z CMU %T Production Systems on Message Passing Computers: Simulation Results and Analysis %J Proceedings of the 1989 International Conference on Parallel Processing %V II - Software %I Penn State %C University Park, Penn %D August 1989 %P II-246--II-254 %K rule-based programming, Rete, %X We modified the original mapping which was intended for fine-grained machines for medium-grained machines (that is machines with 2-25 processors). We performed simulations to evaluate the mapping and study the effect of varying the computation/communication ratio on the speedups. The simulations assumed a crossbar interconnection network and Sparc-based processing elements. Results indicated that it was possible to achieve reasonable speedups (where reasonable means between 4 and 10 fold) on such machines. A more detailed version of the report is soon going to be published in the IEEE transaction on parallel and distributed systems. %A W. B. Ackerman %T A Structure Memory for Data Flow Computers %I Laboratory for Computer Science, MIT %R TR-186 %C Cambridge, MA %D August 1977 %K Rdf, %A W. B. Ackerman %T Data Flow Languages %J AFIPS Proc. of the NCC %V 48 %P 1087-1095 %I AFIPS Press %D 1979 %K bhibbard %X This paper is reproduced in Kuhn and Padua's (1981, IEEE) survey "Tutorial on Parallel Processing." %A W. B. Ackerman %Z MIT %T Data flow languages %J Computer %V 15 %N 2 %D February 1982 %P 15-25 %K grecommended (3), programming languages, special issue on data flow, %K bmiya, %X Very good summary of data flow, and changes made to traditional languages to accommodate parallelism [e.g. outlawing side-effects] Reproduced in "Selected Reprints on Dataflow and Reduction Architectures" ed. S. S. Thakkar, IEEE, 1987, pp. 179-188. %A William B. Ackerman %T A Structure Processing Facility for Data Flow Computers %J Proceedings of the 1978 International Conference on Parallel Processing %I IEEE %D August 1978 %P 166-172 %K Algorithms: memory management, packet communication, tree structures, Data Flow %X Paper that proposed the SELECT and APPEND instructions and their semantic implementation. Memory management is performed: creation, allocation, and collection. %A William B. Ackerman %A Jack B. Dennis %T VAL \(em A Value Oriented Algorithmic Language %R MIT Laboratory for Computer Science Tech. Report TR-218 %C MIT, Cambridge, MA %D June 1979 %K bhibbard %A William Beekley Ackerman %T Efficient Implementation of Applicative Languages %R MIT/LCS/TR-323, PhD thesis %I MIT %C Cambridge, MA %D April 1984 %K applicative programming, parallel computation, optimizing compilers, data flow computation %K Rdf, %A B. D. Ackland %A N. Weste %A D. J. Burr %T An Integrated Multiprocessing Array for Time Warp Pattern Matching %J Proceedings of 8th Annual International Symposium on Computer Architecture, SIGARCH Newsletter %V 9 %N 3 %D May 1981 %P 197-215 %K Rhighnam, architecture, matching, warping %A David H. Ackley %Z CMU %T A Connectionist Machine for Genetic Hillclimbing %I Kluwer Academic Press %C Boston %D 1987 %K book, text, PhD thesis, %X Unable to view this book in depth. %Q ACM %T Coping with the Imprecision of the Real World: An Interview with Lofti A. Zadeh %J Communications of the ACM %V 27 %N 4 %D April 1984 %P 304-311 %K Fuzzy logic, AI %X Indirectly references supercomputers and multiprocessors. Also reprinted in the text compiled by Kai Hwang: "Supercomputers: Design and Application," IEEE, 1984, pp. 602-609. %Q ACM %T 3rd Conference on Hypercube Concurrent Computers and Applications %V I, Architecture, Software, Computer Systems and General Issues %I ACM %C Pasadena, CA %D January 1988 %K soft bound book, conference proceedings, %X Third hypercube conference. Could also be called the 3rd HCCA3 or 3rd DMCC3. %Q ACM %T 3rd Conference on Hypercube Concurrent Computers and Applications %V II, Applications %I ACM %C Pasadena, CA %D January 1988 %K soft bound book, conference proceedings, %X Third hypercube conference. Could also be called the 3rd HCCA3 or 3rd DMCC3. %A Alex Acosta %Z U.S. Geological Survey %T Fast Fourier Transform Techniques in Normalized Cross-Correlation %J Proceedings of 1983 Array Conference %C Monterey, California %D April 1983 %$ 25.00 %X In some digital signal processing applications, it is necessary to determine if a finite length sequence of numbers occurs within a larger sequence of numbers. For example, in an image processing application involving the automated registration of two digital images with common areal scene coverage, it is necessary to determine where a two-dimensional subscene extracted from one image (called a template) is located within a search area in a second image. One method used in determining the template location is through the use of the normalized cross correlated function. The function measures the similarity or correlation between the template and underlying subscenes extracted from the search area. The location of the template within the search area is taken to be the location where the normalized cross correlation function is at a maximum. %X The function requires a great amount of computation for large sequences of numbers which is a major disadvantage of its use. Analysis of the standard one-dimensional expression yielded a new equivalent expression which defined the function in terms of correlation sums. Correlated sums can be easily derived through the use of the Fast Fourier Transform and the application of the discrete Fourier correlation theorem. %X Three computer programs were written which implemented the standard expression, a second known equivalent expression, and the new equivalent expression, on a digital computer. Execution times obtained by executing the three programs on the same numerical sequences indicated that the new expression is optimal when the length of the numerical sequences used in the expression is large (> 2048). The one-dimensional expression was implemented on a FPS 120B array processor and used in a two-dimensional image processing application to exemplify the use of the one-dimensional expression with two-dimensional data. %Q Active Memory Technology %T Developing and Using DAP Programs %I Active Memory Technology %C Irvine, CA %R man003.02 %D 1987 %K Fortran Plus, APAL, mesh connected computer, processor array, formerly with ICL, %A T. L. Adam %A K. M. Chandy %A J. Dickson %T A Comparison of List Schedules for Parallel Processing Systems %J Communications of the ACM %V 17 %N 12 %D December 1974 %P 685-690 %A J. M. Adamo %T PASCAL + CSP, Merging PASCAL and CSP in a parallel processing oriented language %J 3rd International Conference on Distributed Computing Systems %C Miami, FL %D October 1982 %I IEEE %P 542-547 %K High Level Languages for Distributed Processing %A J. M. Adamo %A J. Bonneville %A C. Bonello %A L. Trejo %T Fault Tolerant Communication in the C_NET High Level Programming Environment %J Sixth Distributed Memory Computing Conference Proceedings %I IEEE %C Portland, OR %D April/May 1991 %P 715-718 %K DMCC6, architecture, fault tolerance, %A C. G. Adams %T The array processor \(em an answer in search of a scientist's question %J Proc. Soc. Photooptical Instrumentation Engineers %V 149 %D 1978 %P 140-144 %K blouie %A D. A. Adams %T A computation model with data flow sequencing %R Tech. Rep. CS 117 %I Computer Science Dept., Stanford Univ. %C Stanford, CA %D December 1968 %A Duane A. Adams %T A Model for Parallel Computation %E L. C. Hobbs %E D. J. Theis %E J. Trimble %E H. Titus %E I. Highberg %B Parallel Processor Systems, Technologies, and Applications %I Spartan Books %C New York, NY %D 1970 %P 311-333 %K Programming and software techniques %K Rdf, data flow, %A E. J. Adams %A C. W. Lillie %A D. H. Vines, Jr. %T A Dataflow Methodology for Processing Distributed Queries %J Computer Software and Applications Conference (COMPSAC80) %I IEEE %D October 1980 %P 281-287 %K Distributed systems %A G. Adams %A T. Rolander %T Design Motivations for Multiple Processor Microcomputer Systems %J Computer Design %V 17 %N 3 %D March 1978 %P 81-89 %K maeder biblio: general, architecture, %A G. B. Adams, III %A H. J. Siegel %T The use of 4X4 switching elements in the multistage cube network %J First International Conference on Computers and Applications %D June 1984 %P 585-592 %K R PASM %K Interconnection Network-Multistage Cube, %A George B. Adams, III %A Howard Jay Siegel %T On the Number of Permutations Performable by the Augmented Data Manipulator Network %J IEEE Transactions on Computers %V C-31 %N 4 %D April 1982 %P 270-277 %K Augmented Data Manipulator (ADM) network, Generalized Cube network, parallel processing, PASM, permutation network, SIMD machines Interconnection networks %A George B. Adams, III %A Howard Jay Siegel %T The Extra Stage Cube: A Fault-Tolerant Interconnection Network for Supersystems %J IEEE Transactions on Computers %V C-31 %N 5 %D May 1982 %P 443-454 %K R PASM %K Distributed processing, Extra Stage Cube, fault tolerance, Generalized Cube, indirect binary n-cube, interconnection network, omega, parallel processing, PASM, PUMPS, shuffle-exchange, supersystems Special issue on supersystems %K Interconnection Network-Multistage Cube %X Reproduced in the 1984 tutorial: "Interconnection Networks for parallel and distributed processing" by Wu and Feng. %A George B. Adams, III %A Howard Jay Siegel %T Modifications to improve the fault tolerance of the extra stage cube interconnection network %J Proceedings of the 1984 International Conference on Parallel Processing %I IEEE %D August 1984 %P 169-173 %K multistaged network, single fault, two faults fault tolerance %K Multistage Cube, PASM, %A George B. Adams, III %A Howard Jay Siegel %T A survey of fault-tolerant multistage networks and comparison to the extra stage cube %J Seventeenth Hawaii Conference on System Sciences %D January 1984 %P 268-277 %K R PASM %K grecommended, Interconnection Network-Multistage Cube/ADM Comparisons, %A George B. Adams %A Robert L. Brown %A Peter J. Denning %T Report on an Evaluation Study of Data Flow Computation %I RIACS, NASA Ames Research Center %C Moffett Field, CA %R RIACS TR 85.2 %D April 1985 %K VAL, CFD, AI, numeric supercomputing %A George B. Adams, III %A Robert L. Brown %A Peter J. Denning %T On Evaluating Parallel Computer Systems %R RIACS TR 85.3 %D September 1985 %K Experimental methods, data flow, concurrent, performance analysis, useability, %X Observation based on two studies. %A George B. Adams, III %A Dharma P. Agrawal %A Howard Jay Siegel %T A Survey and Comparison of Fault-Tolerant Multistage Interconnection Networks %J Computer %V 20 %N 6 %D June 1987 %P 14-29 %K MINs, Omega, Banyan, %A J. C. Adams %A K. V. S. Ramarao %T Distributed Diagnosis of Byzantine Processors and Links %J Procs. of the 9th Int. Conf. on Distributed Computing Systems %I IEEE %P 562-569 %D June 1989 %A Jeanne Adams %A Jeanne Martin %T The Challenge to Change for FORTRAN %J 1989 Spring Proceedings Cray User Group Meeting %I CUG %C Washington DC %D Spring 1989 %P 47 %A Jerry Adams %T Technical Support for Network Supercomputing %J 1990 Fall Proceedings Cray User Group Meeting %I CUG %C Washington DC %D Fall 1990 %P 72-75? %K communications, %A L. Adams %T Iterative Algorithms for Large Sparse Linear Systems on Parallel Computers %I University of Virginia %R PhD thesis, (see also NASA CR-166027, Langley Research Center) %D 1982 %A L. Adams %A J. Ortega %T A multi-color SOR method for parallel computation %J Proceedings of the 1982 International Conference on Parallel Processing %D August 1982 %I IEEE %P 53-56 %K U of Va, Cyber 203/205, and NASA LaRC FEM Numerical algorithms %A L. Adams %A R. G. Voigt %T A methodology for exploiting parallelism in the finite element process %r ICASE Report No. 83-33 %d September 9, 1983 %J Proceedings of the NATO Advanced Research Workshop on High Speed Computation %I NATO ASI Series %V F7 %D June 1983 %C Julich, West Germany %A L. Adams %A R. G. Voigt %T Design, development and use of the finite element machine %r ICASE Report 83-56 %d October 21, 1983 %J Proceedings of the Conference on Large Scale Scientific Computations %C University of Wisconsin, Madison, WI %D May 1983 %I Academic Press %A L. Adams %A H. Jordan %T Is SOR Color-Blind? %I NASA Langley Research Center %R ICASE Report No. 84-14 %D 1984 %K Ricase, %A L. Adams %T M-step Preconditioned Conjugate Gradient Methods %J SIAM Journal of Scientific and Statistical Computation %D 1985 %X To appear %A Loyce Adams %T An m-step preconditioned conjugate gradient method for parallel computation %J Proceedings of the 1983 International Conference on Parallel Processing %I IEEE %D August 1983 %P 36-43 %K Cyber 203/205, FEM, ICASE numerical algorithms %A Loyce Adams %A Thomas W. Crockett %T Modeling Algorithm Execution Time on Processor Arrays %J Computer %I IEEE %V 17 %N 7 %D July 1984 %P 38-43 %K Finite Element Machine (FEM), conjugate gradient method, Hardware-software interface: effect on performance, problems associated with multicomputer architecture, %X Reproduced in Dharma P. Agrawal's (ed.) "Advanced Computer Architecture," IEEE, 1986, pp. 229-233. %A Loyce Adams %T Reordering Computations for Parallel Execution %R Report #85-35 %I ICASE, NASA Langley Research Center %C Hampton, VA %D July 1985 %K successive overrelaxation, parallel algorithms, parallel programming, multicolor algorithms, vector computers, %X SOR algorithm. %A Loyce Adams %A Elizabeth G. Ong %Z U. Washington %T Additive Polynomial Preconditioners for Parallel Computers %J Parallel Computing %V 9 %N 3 %D February 1989 %P 333-345 %K SOR, SSOR, preconditioners conjugate gradient method, Additive Polynomial Preconditioners, %A Rod Adams %A Gordon Steven %T A Parallel Pipelined Processor with Conditional Instruction Execution %J Symposium on Parallel Algorithms and Architecture, Computer Architectures News %V 19 %N 1 %D March 1991 %P 135-142 %K HARP, HAtfield Risc Processor, SPAA'91, %A T. A. Adams %A K. A. Smith %T The manipulation of raster-based topographic data on a parallel processor %C Durham %I DAP Support Unit %K Rdap, %A T. A. Adams %Z Univ. of Durhan %T A Raster Alternative for Ordnance Survey Digital Data %J British Cartographic Society Special Publication %V 1 %D 1982 %K Rdap, %A Peter Adamson %A Evan Tick %T Parallel Algorithms for the Single-Source Shortest-Path Problem %J Proceedings of the 1992 International Conference on Parallel Processing %V III, Algorithms & Applications %I CRC Press %C Boca Raton, FL %D August 1992 %P III-346--III-350 %K miscellaneous algorithms, %A Ikram E. Adbou %T A pipeline machine for image processing applications %J Proceedings of the 1983 International Conference on Parallel Processing %I IEEE %D August 1983 %P 255-257 %K images and speech %A C. Addison %A et. al. %T The Genesis distributed-memory benchmarks. Part 1: methodology and general relativity benchmark with results for the SUPRENUM computer %J Concurrency: Practice and Experience %V 5 %N 1 %D 1993 %P 1-22 %A C. A. Addison %A Jeremy M. Cook %A L. R. Hagen %Z Chr. Michelsen Inst., Bergen, Norway %T An Interactive System for Seismic Velocity Analysis %J The 3rd Conference on Hypercube Concurrent Computers and Applications %V II, Applications %I ACM %C Pasadena, CA %D January 1988 %P 1138-1145 %K applications in geology, iPSC, normal move out (NMO) correction, CDP (common depth point), %A C. A. Addison %A V. S. Getov %A A. J. G. Hey %A R. W. Hockney %A I. C. Wolton %T The GENESIS Distributed-Memory Benchmarks %B Computer Benchmarks %E J. Dongarra %E W. Gentzsch %I North-Holland %D 1993 %X to appear %A M. Adelantado %A D. Comte %A P. Siron %A Ph. Berger %T Expression of Concurrency and Parallelism in an MIMD Environment %E I. S. Duff %E J. K. Reid %B Vector and Parallel Processors in Computational Science %j Computer Physics Communications %v 37 %n 1-3 %d 1985 %I North-Holland %D 1985 %P 63-67 %K Hardware and languages, MARIANNE, omega net, %X Proceedings of the Second Intl. Conference on Vector and Parallel Processors in Computational Science, Oxford, August 1984. %A Martin Adelantado %A Pierre Siron %T XANADU: A Task Sequencing Language for MIMD Architectures %J Problems in Designing Supercomputers: Technologies and Devices SCS 85, First International Conference on Supercomputing Systems %I IEEE Computer Society %P 149-157 %K Problems of Process Synchronization and Scheduling %A Martin Adelantado %A Nourredine Hifdi %Z ONERA-CERT %T MaRGOH: A Parallel Programming Approach for a Massive Cluster-Oriented System %J Proceedings of the 1990 International Conference on Parallel Processing %V II, Software %I Penn State U. Press %C University Park, Penn %D August 1990 %P II-276--II-277 %K poster session, Parallel Software Management, %A M. Adelantago %A others %T A MIMD supercomputer systems for large numerical applications %J Proc. IFIP Congress 83 %I North-Holland %C Paris %D 1983 %P 821 %A H. Adeli %A O. Kamal %T Concurrent Analysis of Structures on Shared Memory Machines %J Proc. 10th International Conference on Distributed Computing Systems %I IEEE %C Paris, France %D May-June 1990 %P 338-343 %T Parallel Algorithms for Path Covering, Hamiltonian Path and Hamiltonian Cycle in Cographs %P III-364--III--365 %A Gur Saran Adhar %A Shietung Peng %J Proceedings of the 1990 International Conference on Parallel Processing %V III, Algorithms and Applications %I Penn State U. Press %C University Park, Penn %D August 1990 %K poster session, Application Specific Parallel Algorithms, %A A. K. Adiga %A S. R. Deshpande %T Evaluation of Effectiveness of Circuit Based and Packet Based Interconnection Networks Via Petri Net Models %J Proceedings of the 1987 International Conference on Parallel Processing %I Penn State %C University Park, Penn. %D August 1987 %P 546-549 %K Interconnection Networks %A Ashok K. Adiga %A James C. Browne %Z U Texas %T A Graph Model for Parallel Computations Expressed in the Computational Structures Language %J Proceedings of the 1986 International Conference on Parallel Processing %I IEEE %D August 1986 %P 880-886 %K Graph theory, CSL, Parallel Computation Model (PCM), Petri net, simulation (on a SUN), task scheduling, %A Giovanni Adorni %A Gianni Conte %T The Connection Machine at the University of Parma %E Th. Lippert %E K. Schilling %E P. Ueberholz %B Science on the Connection Machine: Proc. of the First European CM Users Meeting %J International Journal of Modern Physics C %V 4 %N 1 %I World Scientific %C Singapore %D 1993 %P 1-4 %A S. V. Adve %A M. D. Hill %T An Approach for Specifying Shared Memory Models %I University of Wisconsin, Madison %D 1991 %K weak consistency, %A Sarita V. Adve %A Mark D. Hill %T Weak Ordering - A New Definition and Some Implications %R TR 902 %I Computer Sciences Department, University of Wisconsin %C Madison, WI %D December 1989 %X A model for correct program behavior commonly and often implicitly assumed by programmers is that of \fIsequential consistency\fR, which guarantees that all memory accesses execute atomically and in program order. An alternative programmer's model, \fIweak ordering\fR, offers greater performance potential, especially for highly parallel shared memory systems. Weak ordering was first defined by Dubois, Scheurich and Briggs in terms of a set of constraints for hardware, which are not necessary for its intuitive goal. software constraints if it appears sequentially consistent to software more directly reflects the intuition behind weak ordering, facilitates a formal statement of the programmer's view of the system, and does not specify unnecessary directives for hardware. For software that does not allow data races, we show that the new definition allows a violation of the old definition and makes possible implementations that have a higher performance potential. We give an example of one such implementation for cache-based systems with general interconnects to illustrate the power of the new definition. The insight gained from the implementation of weak ordering can also be applied to sequential consistency. We give an algorithm and an implementation for cache-based systems with general interconnects that has a higher performance potential than others we are aware of. We also investigate a markedly new approach that is allowed by our definition to implement weak ordering, and possibly sequential consistency. %T Implementing Sequential Consistency in Cache-based Systems %P I-47--I-50 %A Sarita V. Adve %A Mark D. Hill %Z U. WI %J Proceedings of the 1990 International Conference on Parallel Processing %V I, Architecture %I Penn State U. Press %C University Park, Penn %D August 1990 %K Synchronization in Multiprocessors, shared-memory multiprocessors, sequential consistency, strong ordering, cache coherence, %A Sarita V. Adve %A Mark D. Hill %T Weak Ordering-A New Definition %J Proc. 17th Annual Symposium on Computer Architecture, Computer Architecture News %I ACM %V 18 %N 2 %D June 1990 %P 2-14 %K shared-memory multiprocessor, sequential consistency, weak ordering, %K Multiprocessor Synchronization and Sequential Consistency %A Sarita V. Adve %A Vikram S. Adve %A Mark D. Hill %A Mary K. Vernon %T Comparison of Hardware and Software Cache Coherence Schemes %J 18th Annual Int. Symp. on Computer Architecture, Computer Architecture News %I ACM %V 19 %N 3 %C Toronto %D 1991 %P 298-308 %K hardware cache coherence, software cache coherence, mean value analysis, workload model, %A Sarita V. Adve %A Mark D. Hill %A Barton P. Miller %A Robert H. B. Netzer %T Detecting Data Races on Weak Memory Systems %J Proc. of the 18th Intl Symposium on Computer Architecture, Computer Architecture News %I ACM %V 19 %N 3 %C Toronto %D May 1991 %P 236-243 %K shared memory multiprocessors, data races, sequential consistency, weak ordering, release consistency, data-race-free-0, data-race-free-1, %X isca.ps.Z. Must clearly be Wisc.'s ftp server. %A Ae %A Tadashi %A Yamashita %A Masafumi %A Cunha %A Wagner Chiepa %A Hiroshi Matsumoto %T Visual User-Interface of a Programming System: MOPS2 %J 1984 IEEE Computer Society Workshop on Visual Languages %C Hiroshima, Japan %D December 1984 %P 44-53 %K Visual Concurrent Programming Languages %X This entry needs to have author names checked. %X Modules in MOPS2 are converted to primitive colored Petri nets for informal verification. Program visualization technique. %A Tadashi Ae %A Reiji Aibara %A Minoru Etoh %A Hiroshi Matsumoto %T A Massive Multiprocessor Simulator for Performance Evaluation %J Problems in Designing Supercomputers: Technologies and Devices SCS 85, First International Conference on Supercomputing Systems %I IEEE Computer Society %P 73-82 %K Languages for Supercomputer Programming: The Use of Logical, Functional, Equational, and Node Description Languages %A Y. Afek %A E. Gafni %T Election and Traversal in Unidirectional Networks %J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing %I ACM %D August 1984 %A Yehuda Afek %A Gad M. Landau %A Baruch Schieber %A Moti Young %T The Power of Multimedia: Combining Point-to-Point and Multiaccess Networks %R ULTRACOMPUTER NOTE #134, CS TR 351 %I NYU, Courant Inst. %C NYC %D March 1988 %K synchronizer, model, deterministic/random partitioning, %A F. Afrati %A C. H. Papadimitriou %A G. Papageorgiou %T The Complexity of Cubical Graphs %J Eleventh Intl. Colloquium on Automata, Languages and Programming %D 1984 %X Reply-To: wagner@utcsri.UUCP (Alan Wagner) %A Foto Afrati %A Christos H. Papadimitriou %A George Papageorgiou %T The Synthesis of Communication Protocols %J Proceedings of the Fifth Annual ACM Symposium on Principles of Distributed Computing %C Calgary, Alberta, Canada %D August 1986 %P 263-271 %A A. Agarwal %A M. Cheiran %T Adaptive Backoff Synchronization Techniques %J Proc. 16th Annual Symposium on Computer Architecture, Computer Architecture News %I ACM %V 17 %N 3 %D June 1989 %P 396-406 %A Anant Agarwal %A Anoop Gupta %Z CSL, Stanford U. %T Memory-Reference Characteristics of Multiprocessor Multiprocessor Applications under MACH %J Proc. 1988 ACM SIGMETRICS, Performance Evaluation Review %V 16 %N 1 %D 1988 %P 215-225 %K program and paging behavior, %A Anant Agarwal %A Richard Simoni %A John Hennessy %A Mark Horowitz %Z SU, CSL %T An Evaluation of Directory Schemes for Cache Coherence %J Proc. 15th Annual Symposium on Computer Architecture, Computer Architecture News %I ACM %V 16 %N 2 %D May 1988 %P 280-289 %A Anant Agarwal %A Beng-Hong Lim %A David Kranz %A John Kubiatowicz %T APRIL: A Processor Architecture for Multiprocessing %J Proc. 17th Annual Symposium on Computer Architecture, Computer Architecture News %I ACM %V 18 %N 2 %D June 1990 %P 104-114 %K Shared-Memory Multiprocessors %A Anant Agarwal %A David Chaiken %A Godfrey D'Souza %A Kirk Johnson %A David Kranz %A John Kubiatowicz %A Kiyoshi Kurihara %A Beng-Hong Lim %A Gino Maa %A Dan Nussbaum %A Mike Parkin %A Donald Yeung %T The MIT Alewife Machine: A Large-Scale Distributed-Memory Multiprocessor %B Proceedings of Workshop on Scalable Shared Memory Multiprocessors %I Kluwer Academic Publishers %D 1991 %A Anant Agarwal %A David Kranz %A Venkat Nararajan %T Automatic Partitioning of Parallel Loops for Cache-Coherent Multiprocessors %J Proceedings of the 1993 International Conference on Parallel Processing %V I - Architecture %I CRC Press %C Boca Raton, FL %D August 1993 %P I-2--I-11 %K cache memory, %A R. C. Agarwal %A F. G. Gustavson %A M. Zubair %T A High Performance Algorithm Using Pre-Processing for the Sparse Matrix-Vector Multiplication %J Proceedings Supercomputing'92 %I IEEE %C Minn., MN %D November 1992 %P 32-41 %K sparse matrix algorithms, %A Ramesh C. Agarwal %T A Vector and Parallel Implementation of the FFT Algorithm on the IBM 3090 %E Margaret Wright %B Aspects of Computation on Asynchronous and Parallel Processors %I North-Holland %C Amsterdam %D 1989 %P 45-54 %A Ramesh C. Agarwal %A Fred G. Gustavson %T A Parallel Implementation of Matrix Multiplication and LU Factorization on the IBM 3090 %E Margaret Wright %B Aspects of Computation on Asynchronous and Parallel Processors %I North-Holland %C Amsterdam %D 1989 %P 217-221 %A Ramesh C. Agarwal %A Fred G. Gustavson %T Vector and Parallel Algorithms for Cholesky Factorization on IBM 3090 %J Proc. Supercomputing '89 %I ACM %C Reno, NV %D November 1989 %P 225-233 %K Algorithms %A Ramesh C. Agarwal %A James W. Cooley %A Fred G. Gustavson %A James B. Shearer %A Gordon Slishman %A Bryant Tuckerman %T New Scalar and Vector Elementary Functions for the IBM System/370 %J IBM Journal of Research and Development %V 30 %N 2 %P 126-144 %D 1986 March %X Algorithms have been developed to compute short- and long-precision elementary functions: SIN, COS, TAN, COTAN, LOG, LOG10, EXP, POWER, SQRT, ATAN, ASIN, ACOS, ATAN2, and CABS, in scalar (28 functions) and vector (22 functions) mode. They have been implemented as part of the new VS FORTRAN library recently announced along with the IBM 3090 Vector Facility. These algorithms are essentially table-based algorithms. An important feature of these algorithms is that they produce bitwise-identical results on scalar and vector System/370 machines. Of these, for five functions the computed value result is always the correctly rounded value of the infinite-precision result. For the rest of the functions, the value returned is one of the two floating-point neighbors bordering the infinite-precision result, which implies exact results if they are machine-representable. For the five correctly rounded elementary functions, scalar and vector algorithms are designed independently so as to optimize performance in each case. For other functions, the bitwise-identical constraint leads to algorithms which compromise between scalar and vector performance. We have been able to design algorithms where this compromise is minimal and thus achieve very good performance on both scalar and vector implementations. For our test measurements on high-end System/370 machines, our scalar functions are always faster (sometimes by as much as a factor of 2.5) as compared to the old VS FORTRAN library. Our vector functions are usually two to three times faster than our scalar functions. %A Ramesh C. Agarwal %A James W. Cooley %T Fourier Transform and Convolution Subroutines for the IBM 3090 Vector Facility %J IBM Journal of Research and Development %V 30 %N 2 %P 145-162 %D 1986 March %X A set of highly optimized subroutines for digital signal processing has been included in the Engineering and Scientific Subroutine Library (ESSL) for the IBM 3090 Vector Facility. These include FORTRAN-callable subroutines for Fourier transforms, convolution, and correlation. The subroutines are carefully designed and tuned for optimal vector and cache performance. Speedups of up to 9 1/2 times over scalar performance on the 3090 have been obtained. %A Ramesh K. Agarwal %A John L. Richardson %T Development of an Euler Code on a Connection Machine %E Horst D. Simon %B Scientific Applications of the Connection Machine %I World Scientific %C Singapore %D 1989 %P 27-37 %K computational fluid dynamics, parallel processing, connection machine, Euler equations, %A M. Agate %A H. R. Finch %A et. al. %Z University of Sussex %T A Multiple Application Graphics Integrated Circuit - MAGIC %J Proceedings of European Computer Graphics Conference and Exhibition, The Computer Interface %D 1986 %P 67-77 %X The first MAGIC chip is outlined. This chip can be used in parallel to provide good performance. The chip is general purpose. They outline a system architecture and the operations of the chip. See also [Finch 87] for the MAGIC II chip. %A T. Agerwala %T Some Extended Semaphore Primitives %J Acta Informatica %V 8 %D 1977 %P 201-220 %A T. Agerwala %A B. Lint %T Communication in Parallel Algorithms for Boolean Matrix Multiplication %J Proceedings of the 1978 International Conference on Parallel Processing %I IEEE %D August 1978 %P 146-153 %K SIMD Architectures %A T. Agerwala %A B. Lint %T Communication Issues in Parallel Algorithms and Systems %J Computer Software and Applications Conference (COMPSAC78) %I IEEE %D November 1978 %P 583-588 %K communications issues in parallel and distributed systems %A T. Agerwala %T Putting Petri Nets to Work %J Computer %V 12 %N 12 %D December 1979 %P 85-94 %A T. Agerwala %A Arvind %T Data Flow Systems %J Computer %V 15 %N 2 %P 10-13 %D 1982 %X Guest editor's introduction to the special issue on data flow systems. %A T. K. Agerwala %A K. M. Chandy %A D. E. Lang %T A Modeling Approach and Design Tool for Pipelined Central Processors %J Proceedings of 6th Annual Symposium on Computer Architecture %D 1979 %K University of Texas at Austin %P 122-129 %A T. K. Agerwala %A S. L. Harvey %T A Perspective on Parallel Processing %I T. J. Watson Research Center %C Yorktown Heights, NY %R RC 12996 (#58168) %D July 1987 %X Low-level, introductory article. Probably opening address. RP^3. %A Tilak Agerwala %T Parallel Processing Research at IBM (Invited Talk/Abstract) %E Garry Rodrigue %B Parallel Processing for Scientific Computing %I SIAM %C Philadelphia, PA %D 1989 %P 413 %K architectures, %A R. Aggarwal %A R. Keunings %T Finite Element Simulation of Memory Fluids on Message-Passing Parallel Computers %E R. B. Pelz %E A. Ecer %E J. Hauser %B Parallel Computational Fluid Dynamics '92 %I Elsevier Science Publishers %C Amsterdam %D 1993 %P 1-7 %A S. Aggarwal %A D. Barbara %A K. Z. Meth %T SPANNER: A Tool for the Specification, Analysis, and Evaluation of Protocols %J IEEE Transactions on Software Engineering %V SE-13 %N 12 %D December 1987 %P 1218-1237 %K Analysis and verification, communication protocols, formal description techniques, formal specification, software environment, software tools, specification languages. %A S. Aggarwal %A B. Gopinath %T Forward: Special Issue on Tools for Computer Communication Systems %J IEEE Transactions on Software Engineering %V SE-14 %N 3 %D March 1988 %P 277-278 %A Sudhir Aggarwal %A Daniel Barbbara %A Kalman Z. Meth %T A Software Environment for the Specification and Analysis of Problems of Coordination and Concurrency %J IEEE Transactions on Software Engineering %V SE-14 %N 3 %D March 1988 %P 280-290 %K Analysis and verification, distributed systems, formal description techniques, parallel languages, protocols, simulation, software environments, specification %A G. Agha %T Semantic Considerations in the Actor Paradigm of Concurrent Computation %B Seminar on Concurrency %E S. D. Brookes %E A. W. Roscoe %E G. Winskel %S Lecture Notes on Computer Science %V 197 %I Springer-Verlag %C Berlin %D 1985 %P 151-179 %A Gul Agha %A Carl Hewitt %Z Artificial Intelligence Laboratory, Massachusetts Institute of Technology %T Concurrent Programming Using Actors: Exploiting Large-Scale Parallelism %B Foundations of Software Technology and Theoretical Computer Science %S Lecture Notes in Computer Science %V 206 %E S. N. Maheshwari %I Springer-Verlag %C Berlin-Heidelberg-New York %D 1985 %P 19-40 %K H03 %r A.I. Memo 865 %d October 1985 %d 1985 %O pages 20 %$ 2.50 :adnum AD-A162422 %K grecommended (1), %K concurrency, distributed computing, programming languages, object-oriented programming, actors, functional programming, parallel processing, open systems %X We argue that the ability to model shared objects with changing local states, dynamic reconfigurability, and inherent parallelism are desirable properties of any model of concurrency. The {\it actor model} addresses these issues in a uniform framework. This paper briefly describes the concurrent programming language {\it Act3} and the principles that have guided its development. Act3 advances the state of the art in programming languages by combining the advantages of object-oriented programming with those of functional programming. We also discuss considerations relevant to large-scale parallelism in the context of {\it open systems}, and define an abstract model which establishes the equivalence of systems defined by actor programs. %A Gul Agha %A Carl Hewitt %T Concurrent Programming Using Actors %B Object-Oriented Concurrent Programming %E Akinori Yonezawa %E Mario Tokoro %I MIT Press %C Cambridge, MA %D 1987 %P 37-53 %A Gul Agha %T Foundational Issues in Concurrent Programming %J Proc. of the ACM SIGPLAN Workshop on Object-Based Concurrent Programming, ACM SIGPLAN Notices %V 24 %N 4 %D April 1989 %P 60-65 %K Actor-Based Systems %X Explores the relation between the Actor model and the object-based, functional, and logic programming paradigms. %A Gul Agha %Z U. Ill. %T Concurrent Object-Oriented Programming %J Communications of the ACM %V 22 %N 9 %D September 1990 %P 125-141 %K CR Categories and Subject Descriptors: C.1.2 [Processor Architectures]: Multiple Data Stream Architectures D.1.3 [Programming Techniques]: concurrent programming; D.3.1 [Programming Languages]: formal definitions and theory - semantics; D.3.3 [Programming Languages]: language constructs; General Terms: Design, methodology Additional Key Words and Phrases: actor model, concurrency, concurrent programming structures, multiprocessor architectures, object-oriented programming, programming language theory, %A Gul Agha %A Svend Frolund %A Woo Young Kim %A Rajendra Panwar %A Anna Patterson %A Daniel Sturman %T Abstraction and Modularity Mechanisms for Concurrent Computing %J IEEE Parallel & Distributed Technology: Systems and Applications %V 1 %N 2 %D May 1993 %P 3-14 %A Gul A. Agha %Z U. of Mich. %T Actors: A Model of Concurrent Computation in Distributed Systems %I MIT Press %C Cambridge, MA %D 1986 %K Book, text, communication, evaluation, abstraction, distributed computing, agents, %K grecommended91, %K hcc, fpst, %X See also his PhD thesis of the same title. %X Now considered a classic text. %A G. J. Agin %T Vision %T Parallel Computing with Vertical Data %I AFIPS %B The Handbook of Industrial Robotics %I Wiley %D 1985 %K Rhighnam, algorithm, one-pass, raster-scan, region-growing, survey %A ?? De\ Agostino %A James A. Storer %T Parallel Algorithms for Optimal Compression Using Dictionaries with the Prefix Property %J Data Compression Conference %I IEEE Computer Society TCC %D 1992 %K parallel data compression, %A A. Agrawal %A L. Nekludova %A W. Lim %T A Parallel O(log N) Algorithm for Finding Connected Components in Planar Images %J Proceedings of the 1987 International Conference on Parallel Processing %I Penn State %C University Park, Penn. %D August 1987 %P 783-786 %K Image Processing, numerical algorithms, %K Rhighnam, connected-components, connection-machine, %r TMC TP NA87-1 %d Feb. 1987 %A A. K. Agrawal %A V. V. Vadakan %T Jet Propulsion Local Area Network (JPLAN) %J 2nd International Conference on Distributed Computing Systems %I IEEE %C Paris, France %D April 1981 %P 360-368 %K Local Area Networks Applications %A D. P. Agrawal %A T. Feng %A C. Wu %T A Survey of Communication Processor Systems %J Computer Software and Applications Conference (COMPSAC78) %I IEEE %D November 1978 %P 668-673 %K communication processes %A D. P. Agrawal %T High Speed Arithmetic Arrays %J IEEE Transactions on Computers %V C-28 %N 3 %D March 1979 %P 215-224 %K arithmetic system design %X Reproduced in Dharma P. Agrawal's (ed.) "Advanced Computer Architecture," IEEE, 1986, pp. 83-92. %A D. P. Agrawal %A S. C. Kim %J Proceedings of the 1981 International Conference on Parallel Processing %D August 1981 %T On Non-equivalent Multistage Interconnection Networks %P 234-237 %K Interconnection Networks %A D. P. Agrawal %T A Pipelined Pseudoparallel System Architecture for Motion Analysis %J Proceedings of 8th Annual International Symposium on Computer Architecture, SIGARCH Newsletter %V 9 %N 3 %D May 1981 %P 21-36 %K Architecture %A D. P. Agrawal %A B. K. Agrawal %A G. C. Pathak %T Graceful Fault tolerance in large networks of microcomputers %J 3rd International Conference on Distributed Computing Systems %C Miami, FL %D October 1982 %I IEEE %P 158-162 %K Design of Fault Tolerant Systems %A Dharma P. Agrawal %A Imad E. O. Mahgoub %T Performance Analysis of Cluster-Based Supersystems %J Problems in Designing Supercomputers: Technologies and Devices SCS 85, First International Conference on Supercomputing Systems %I IEEE Computer Society %P 593-602 %K Adaptable Architectures: Reconfigurable Interconnections %A Dharma P. Agrawal %T Testing and Fault Tolerance of Multistage Interconnection Networks %J Computer %I IEEE %V 15 %N 4 %D April 1982 %P 41-53 %X Reproduced in the 1984 tutorial: "Interconnection Networks for parallel and distributed processing" by Wu and Feng. %A Dharma P. Agrawal %A Ramesh Jain %T A Pipelined Pseudoparallel System Architecture for Real-Time Dynamic Scene Analysis %J IEEE Transactions on Computers %V C-31 %N 10 %D October 1982 %P 952-962 %K Algorithmic steps, distributed control, dynamic scene analysis, interconnection networks, interprocessor communication, pipelining, problem partitioning, pseudoparallelism, real-time computation, SIMD and MIMD, Special issue on computer architecture for pattern analysis and image database management, application-directed architecture, %X Reproduced in Dharma P. Agrawal's (ed.) "Advanced Computer Architecture," IEEE, 1986, pp. 353-363. %A Dharma P. Agrawal %T Graphic theoretical analysis and design of multistage interconnection networks %J IEEE Transactions on Computers %V C-32 %N 7 %D July 1983 %P 637-648 %K Benes network, buddy property, conflict-free permutations, graph modeling, multistage interconnection networks, number of passes, permutability, single-stage network, topological equivalence. %A Dharma P. Agrawal %A Ja-Song Leu %T Dynamic Accessibility Testing and Path Length Optimization of Multistage Interconnection Networks %J 4th International Conference on Distributed Computing Systems %C San Francisco, CA %I IEEE %D May 1984 %P 266-277 %K Adjacency matrix, average distance, connectivity, distance matrix, dynamic full access capability, graph model, multiple passes, multistage interconnection networks, reachability matrix, simulation, single-stage interconnection networks, stuck-in-faults, switching element, multiprocessor, interconnection networks, %X Also a more up to date paper published in March 1985. Reproduced in the 1984 tutorial: \fIInterconnection Network for parallel and distributed processing\fP by Wu and Feng. Reproduced in Dharma P. Agrawal's (ed.) "Advanced Computer Architecture," IEEE, 1986, pp. 143-154. %A Dharma P. Agrawal %A Ja-Song Leu %T Dynamic Accessibility Testing and Path Length Optimization of Multistage Interconnection Networks %J IEEE Transactions on Computers %V C-34 %N 3 %D March 1985 %K Adjacency matrix, average distance, connectivity, dynamic full access capability, graph model, multistage interconnection networks, reachability matrix, stuck-at faults. %A Dharma P. Agrawal %A Winser E. Alexander %A Edward F. Gehringer %A Ravi Mehrotra %T B-HIVE Project: Present and Future %B Supercomputers: Algorithms, Architectures, and Scientific Computation %I University of Texas Press %E F. A. Matsen %E T. Tajima %C Austin, TX %P 11-18 %D 1986 %K B-Hive, Alpha structure, interprocess communication, parallel languages, static allocation of processes, %A Dharma P. Agrawal, ed. %T Advanced Computer Architecture %I IEEE %C New York, NY %D 1986 %K book, text, %X Collection of papers from the Tutorial given by the IEEE. %A Dharma P. Agrawal %A Virendra K. Janakiram %A Girish C. Pathak %T Evaluating the Performance of Multicomputer Configurations %J Computer %I IEEE %V 19 %N 5 %D May 1986 %P 23-37 %K Interconnection networks, problems associated with multicomputer architecture, %X ISSN 0018-9162 Reproduced in Dharma P. Agrawal's (ed.) "Advanced Computer Architecture," IEEE, 1986, pp. 253-265. %A Divyakant Agrawal %A Arthur J. Bernstein %A Pankaj Gupta %A Soumitra Sengupta %T Distributed Multi-Version Optimistic Concurrency Control For Relational Databases %I IEEE Computer Society %J Spring COMPCON '86 %D March 1986 %P 416-421 %A G. Agrawal %A B. Chen %A W. Zhao %A S. Davari %T Guaranteeing Synchronous Message Deadlines with the Timed Token Protocol %J 12th International Conference on Distributed Computing Systems %I IEEE %C Yokohama, Japan %D June 1992 %P 468-476? %K Real-Time Issues %A G. Agrawal %A P. Jalote %T An Efficient Protocol for Voting In Distributed Systems %J 12th International Conference on Distributed Computing Systems %I IEEE %C Yokohama, Japan %D June 1992 %P 640-648? %K Fault Tolerant Algorithms %T LSI/VLSI encapsulations considerations of token passing LANs %A O. P. Agrawal %B Wescon 83. Electronic Show and Convention %C San Francisco, CA, USA %D 8-11 Nov. 1983 %P 23/5/1-8 %O 0 REFS. Treatment PRACTICAL %K data communication equipment local area networks standards large scale integration VLSI LSI VLSI encapsulations token passing LANs standardization data communication office automation factory control logical area networks standard bus ring %A Prathima Agrawal %A Rakesh Agrawal %T Software Implementation of a Recursive Fault Tolerance Algorithm on a Network of Computers %J Proc. 13th Annual International Symposium on Computer Architecture, Computer Architecture News %I ACM %V 14 %N 2 %P 65-72 %D June 1986 %A R. Agrawal %A D. J. DeWitt %T Recovery Architectures for Multiprocessor Machines %R Technical Report 573 %I Computer Sciences Department, University of Wisconsin, Madison %D January 1985 %K Log, shadows, differential files, performance %A R. Agrawal %T The Future Workstation Operating Systems: A Personal View Point %J Proceedings: Workshop on Workstation Operating Systems %I IEEE Computer Society Technical Committee on Operating Systems %C Cambridge, MA %D 5-6 November 1987 %A R. Agrawal %A A. K. Ezzat %T Location Independent Remote Execution in NEST %J IEEE Transactions on Software Engineering %V SE-13 %N 8 %D August 1987 %P 905-912 %A R. Agrawal %A M. J. Carey %A M. Livny %T Concurrency Control Performance Modeling: Alternatives and Implications %J ACM Trans. Database Systems %V 12 %N 4 %D December 1987 %X Event-driven simulation using a synthetic workload based on a model of transaction processing. %A R. Agrawal %T Using a Network of Computer Workstations as a Loosely-Coupled Multiprocessor %J Proceedings from the Second Workshop on Large-Grained Parallelism %I Carnegie-Mellon University Software Engineering Institute %R Special Report CMU/SEI-87-SR-5 %E Mario R. Barbacci %C Pittsburgh, PA %D November 1987 %P 1 %A Rakesh Agrawal %A David W. Dewitt %T Whither Hundreds of Processors in a Database Machine? %J International Workshop on High-Level Computer Architecture %I Univ. of Maryland %D May 1984 %P 6.21-6.32 %K Database computers, Rhlca, %A Rakesh Agrawal %A H. V. Jagadish %T Parallel Computation on Loosely-Coupled Workstations %I AT\&T Bell Labs %N 11386-861201-01TM %D December 1986 %A V. K. Agrawal %A L. M. Patnaik %A P. S. Goel %T Towards Formal Specification of a Distributed Computing System %J International Journal of Computer and Information Sciences %V 14 %N 5 %D 1985 %P 277-306 %A Vishwani D. Agrawal %T Comments on "An Approach to Highly Integrated Computer-Maintained Cellular Arrays" %J IEEE Transactions on Computers %V C-28 %N 9 %D September 1979 %P 691-693 %K Cellular arrays, faults in logic arrays, percolation process, programmable logic, random processes Correspondence %A Vishwani D. Agrawal %A Srimat T. Chakradhar %T Performance Estimation in a Massively Parallel System %J Proceedings Supercomputing'90 %I IEEE %C New York, New York %D November 1990 %P 306-313 %K models of computation, %A J. R. Agre %A P. A. Tinker %T An Architecture for the Rollback Machine %J Proceedings of the 1991 International Conference on Parallel Processing %V I, Architecture %I CRC Press %C Boca Raton, FL %D August 1991 %P I-638--I-639 %K poster paper, parallel architectures, %A M. Ahamad %A J. E. Burns %A P. W. Hutto %A G. Neiger %T Causal Memory %J Proc. of the 5th Int. Workshop on Distributed Algorithms %S LNCS %V 579 %I Springer-Verlag %C Delphi, Greece %D 1991 %P 9-30 %K weak consistency, %A Mustaque Ahamad %A Arthur J. Bernstein %T Multicast Communication in UNIX 4.BSD %J Proceedings of the 5th International Conference on Distributed Computing Systems %I IEEE Computer Society %C Denver, Colorado %D May 1985 %K Interprocess communication, sockets, datagrams, %P 80-87 %A Mustaque Ahamad %A Phillip W. Hutto %A Ranjit John %T Implementing and Programming Causal Distributed Shared Memory %J Proceedings of the 11th International Conference on Distributed Computing Systems %I IEEE Computer Society %C Arlington, Texas %D May 1991 %P 274-281 %A M. Ahamod %A A. J. Bernstein %T An Application of Name Based Addressing to Low Level Distributed Algorithms %J IEEE Transactions on Software Engineering %V SE-11 %N 1 %P 59-66 %D January 1985 %A Ragnar Ahlberg %A Bertil Gustafsson %T A Note on Parallel Algorithms for Partial Differential Equations %I North-Holland %B Parallel Computing 83 %E M. Feilmeier %E G. Joubert %E U. Schnedel %P 93-98 %D 1984 %K Buneman, FACR(L), FFT, multigrid methods %A Ishfaq Ahmad %A Arif Ghafoor %Z Syracuse U. %T A Semi Distributed Task Allocation and Strategy for Large Hypercube Supercomputers %J Proceedings Supercomputing'90 %I IEEE %C New York, New York %D November 1990 %P 898-907 %K task allocation and load balancing, best student paper - systems, %A Ishfaq Ahmad %A Arif Ghafoor %A Kishan Mehrotra %T Performance Prediction of Distributed Load Balancing in Multicomputer Systems %J Proceedings Supercomputing'91 %I IEEE %C Albuquerque, New Mexico %D November 1991 %P 830-839 %K hardware and software performance issues, %A Ishfaq Ahmad %A Arif Ghafoor %T Fault-Tolerant Task Management and Load Re-Distribution on Massively Parallel Hypercube Systems %J Proceedings Supercomputing'92 %I IEEE %C Minn., MN %D November 1992 %P 750-759 %K massively parallel systems, %A A. M. Ahmed %A Y. K. Abaas %T Design and construction of an array processor %J Microprocessors and Microsystems %V 4 %N 3 %D April 1980 %P 83-88 %K blouie %A H. Ahmed %A J. Delosme %A M. Mort %T Highly Concurrent Computing Structures for Matrix Arithmetic and Signal Processing %J Computer %V 15 %N 1 %P 65-82 %D January 1982 %X Special issue on highly parallel systems. %A H. Ahmed %A L. -E. Thorelli %A J. Wennlund %T An Enhanced Data-Driven Architecture %J Proceedings of the 1991 International Conference on Parallel Processing %V I, Architecture %I CRC Press %C Boca Raton, FL %D August 1991 %P I-331--I-337 %K data flow architectures, %A Shakil Ahmed %A David Gelernter %T A CASE Environment for Parallel Programming %J Proceedings of the Fifth International Workshop on Computer-Aided Software Engineering %I IEEE Computer Society Press %D 1992 %X Linda Program Builder. The LPB allows us to make such custom modifications to our system, without affecting the rest of the user community. In the case of the example you cite, we can make such operations available to the user through the LPB, which translates the code into actual Linda statements by expanding the tuples. Since the LPB passes semantic information to the compiler for optimization purposes, this can lead to optimization which is invisible to the user. %X In the paper I mention above, I give an example that I implemented in the context of the LPB, namely the example of an "or-in" function in Linda. %A Zain Uddin Ahmed %A D. Yun Yeh %T Parallel Matrix Inversion Algorithms Based on Orthogonal Trees %J Proceeding Supercomputing '88: Technology Assessment, Industrial Supercomputer Outlooks, European Supercomputing Accomplishments, and Performance & Computations %I Third International Conference on Supercomputing (ICS '88) %C St. Petersberg, FL %V 2 %D 1988 %P 411-418 %A A. V. Aho %A J. D. Ullman %T The Theory of Parsing, Translation, and Compiling, Vol 2: Compiling %I Prentice-Hall %D 1973 %A J. M. Ahuactzin %A E.-G. Talbi %A P. Bessiere %A E. mazer %T Using Genetic Algorithms for Robot Motion Planning %J European Conference on Artificial Intelligence ECAI92 %C Austria %D August 1992 %K parallel genetic algorithms, %A M. Ahuja %A Y. Zhu %T A Distributed Algorithm for Minimum Weight Spanning Trees Based on Echo Algorithms %J Procs. of the 9th Int. Conf. on Distributed Computing Systems %I IEEE %D June 1989 %P 2-8 %A M. Ahuja %A A. D. Kshemkalyani %A T. Carlson %T A Basic Unit of Computation in Distributed Systems %J Proc. 10th International Conference on Distributed Computing Systems %I IEEE %C Paris, France %D May-June 1990 %P 12-19 %X \fBAbstract:\fP A ground state in a distributed system is a global state in which there are no messages in transit. In this paper, we define basic units of computation in distributed systems, whether communicating synchronously or asynchronously, as comprising of indivisible logical units of computation that take the system from one ground state to another. This definition helps in understanding the nature of the communication pattern in a computation and how the communication pattern is related to the concurrency in the system. The basic unit of computation is potentially useful in checkpointing, distributed debugging and asserting about attainment of stable properties. %A Mohan L. Ahuja %A J. C. Browne %A A. Silberschatz %T Optimal throughput scheduling for distributed concurrent execution in data base systems %J Proceedings of the 1984 International Conference on Parallel Processing %I IEEE %D August 1984 %P 251-254 %K two phase locking, transaction processing, databases %A Mohan L. Ahuja %A J. C. Browne %Z U Texas %T Intra-transaction Concurrency in Distributed Databases and Protocols which usr Transaction Aborts to Preserve Consistency: A Performance Study %J Proceedings of the 1986 International Conference on Parallel Processing %I IEEE %D August 1986 %P 950-952 %K Distributed processing, Reed's protocol, %A S. R. Ahuja %A J. R. Jump %T A modular vector processing unit %J Proceedings of the 1976 International Conference on Parallel Processing %D August 1976 %I IEEE %P 220 %K Multiple-microprocessors %A S. R. Ahuja %A J. R. Jump %T A modular memory scheme for array processing %J Proc. 4th Ann. Symp. Computer Architecture %D 1977 %P 90-94 %K blouie %A S. R. Ahuja %A J. R. Ensor %A D. N. Horn %T Parallelism in the Rapport Multimedia Conferencing System %J Proceedings from the Second Workshop on Large-Grained Parallelism %I Carnegie-Mellon University Software Engineering Institute %R Special Report CMU/SEI-87-SR-5 %E Mario R. Barbacci %C Pittsburgh, PA %D November 1987 %P 2-3 %A Sudhir Ahuja %A Nicholas Carriero %A David Gelernter %T Linda and Friends %J Computer %V 19 %N 8 %D August 1986 %P 26-34 %K Special issue: domesticating parallelism %K parallel program, linda, programming language, %X A good presentation of Linda stressing its support for an uncoupled programming style. MA. %A Sudhir Ahuja %A Nicholas J. Carriero %A David H. Gelernter %T Progress Towards a Linda Machine %J Proceedings of the International Conference on Computer Design %D October 1986 %P 97-101 %A Sudhir Ahuja %A Nicholas J. Carriero %A David H. Gelernter %A Venkatesh Krishnaswamy %T Matching Language and Hardware for Parallel Computation in the Linda Machine %J IEEE Transactions on Computers %V C-37 %N 8 %D August 1988 %P 921-929 %A Sudhir R. Ahuja %A Charles S. Roberts %T An Associative/Parallel Processor for Partial Match Retrieval Using Superimposed Codes %J Proceedings of 7th Annual Symposium on Computer Architecture %C La Baule, France %D May 1980 %P 218-227 %K grecommended, Bell Laboratories %K btartar %A Sudhir R. Ahuja %A Abhaya Asthana %T A Multi-microprocessor architecture with hardware support for communication and scheduling %J Symposium on Architectural Support for Programming Languages and Operating Systems, Computer Architecture News %V 10 %N 2 %C Palo Alto, CA %D March 1982 %P 205-210 %K Ring-bus system support %A Akira Aiba %T Constraint Logic Programming %J ICOT Journal %N 35 %I ICOT %D 1992 %P 2-13 %K parallel constraint logic programming language GDCC, %A Barbara P. Aichinger %T Futurebus+ as an I/O Bus: Profile B %J Proceedings the 19th Annual International Symposium on Computer Architecture,ACM SIGARCH %V 20 %D May, 1992 %C Gold Coast, Australia %P 300-307 %A Hitoshi Aida %A Joseph A. Goguen %T Simulation and Performance Estimation for the Rewrite Rule Machine %J Proc. Frontiers '92: Fourth Symp. on Massively Parallel Computation %C McLean, VA %I IEEE %D October 1992 %P 336-344 %K modeling, %A Mo Aidi %Z NASA Ames %T Migrating a Key User Group from VMS to CONVEX running UNIX %J Proceedings Fifth Convex User Group Worldwide Conference %C Richardson, TX, USA %D May 1990 %P Session 11 %K paper, %A A. R. Airapetyan %T Inhomogeneous Graph Sorting and Job Distribution between Two Processors %J Cybernetics %V 16 %N 2 %D 1980 %P 264-269 %j Kibernetika %n 2 %p 95-99 %X Russian. %A H. Aiso %A others %T SPIRIT: A New Relational Database Computer Employing Functional-Distributed Multi-Microprocessor Configuration %J 1st International Conference on Distributed Computing Systems %I IEEE %D October 1979 %P 757-771 %K Distributed data bases processing and control %A H. Aiso %A K. Sakamura %A T. Ichikawa %T A Multi-Microprocessor Architecture for Associative Processing of Image Data %E Morio Onoe %E Kendall Preston, Jr. %E Azriel Rosenfeld %B Real-Time/Parallel Computing: Image Analysis %I Plenum Press %C New York, NY %D 1981 %P 203-217 %K ARES, SIMD, MIMD %X Other descriptions of ARES can be founds in the 1977 and 1978 NCC AFIPS Proc. %A H. Aiso %T Fifth Generation Computer Architecture %B Fifth Generation Computer Systems %E T. Moto-Oka %I North Holland %D 1982 %P 121-127 %X Shallow. %A Venkatramana G. Ajjanagadde %Z University of Pennsylvania %A L. M. Patnaik %Z Indian Institute of Science %T Design and Performance Evaluation of a Systolic Architecture For Hidden Surface Removal %J Computers & Graphics %V 12 %N 1 %D 1988 %P 71-74 %X Using a systolic architecture, they discuss the implementation of a basic hidden surface algorithm and its performance (simulated). %A Miklos Ajtai %A Janos Komolos %A W. L. Steiger %A Endre Szemeredi %T Deterministic Selection in O(LOG LOG N) Parallel Time %I IBM T. J. Watson Research Center %C Yorktown Heights, NY 10598 %R 5137 %D May 1986 %i RUTGERS %r DCS-TR-174 %d February 1986 %A H. U. Akay %A R. Blech %A A. Ecer %A D. Ercoskun %A B. Kemle %A A. Quealy %A A. Williams %T A Database Management System for Parallel Processing CFD Algorithms %E R. B. Pelz %E A. Ecer %E J. Hauser %B Parallel Computational Fluid Dynamics '92 %I Elsevier Science Publishers %C Amsterdam %D 1993 %P 9-23 %K Intel iPSC/860, IBM RS/6000/320, %A Kurt Akeley %A Tom Jermoluk %Z Silicon Graphics %T High-Performance Polygon Rendering %J Computer Graphics (Proc. SIGGRAPH '88) %V 22 %N 4 %D August 1988 %P 239-246 %X An architecture for fast polygon rendering, used in a Silicon Graphics system. The graphics system is made up of 4 pipelined subsystems: geometry, scan conversion, raster, and display. Each subsystem is discussed in turn, and the performance is evaluated. %A Kurt Akeley %T The Silicon Graphics 4D/240GTX Superworkstation %J IEEE Computer Graphics and Applications %V 9 %N 4 %D July 1989 %P 71 %K hardware, parallel architecture of the SGI Power Series %X Review of a new workstation's architecture and how it compares with other systems. Nice system of classification for graphic workstations; spends time discussing the compromises that have to be made to support certain operations. See also [Bell 88], [Borden 89]. Now passed by 3x0 series. %A Janaki Akella %A Daniel P. Siewiorek %T Modeling and Measurement of the Impact of Input/Output on Performance %J 18th Annual Int. Symp. on Computer Architecture, Computer Architecture News %I ACM %V 19 %N 3 %C Toronto %D 1991 %P 390-399 %X Important topic. %A K. Akemi %A Ph. de Forcrand %A M. Fujisaki %A T. Hashimoto %A H. C. Hege %A S. Hioki %A J. Makino %A O. Miyamura %A A. Nakamura %A M. Okuda %A I. O. Stamatescu %A Y. Tago %A T. Takaishi %T QCD Lattice Monte Carlo Simulations on Cell Array Processor AP1000 %J Proceedings of the Second Fujitsu-ANU CAP Workshop %P W1-W10 %D November 1991 %A S. B. Akers %A D. Harel %A B. Krishnamurthy %T The Star Graph: An Attractive Alternative to the n-Cube %J Proceedings of the 1987 International Conference on Parallel Processing %I Penn State %C University Park, Penn. %D August 1987 %P 393-400 %K Interconnection Networks %A Sheldon B. Akers, Jr. %T A Rectangular Logic Array %J IEEE Transactions on Computers %V C-21 %N 8 %D August 1972 %P 848-857 %K Cellular logic, combinational logic, logic arrays, symmetric functions, universal logic elements, Cellular logic %A Sheldon B. Akers %A Balakrishnan Krishnamurthy %Z U Ma. and Tektronix %T A Group Theoretic Model for Symmetric Interconnection Networks %J Proceedings of the 1986 International Conference on Parallel Processing %I IEEE %D August 1986 %P 216-223 %K Interconnection networks, Cayley graph, transposition trees, star graph, %A Sheldon B. Akers %A Balakrishnan Krishnamurthy %T The Fault Tolerance of Star Graphs %J Second International Conference on Supercomputing, Proceedings, Supercomputer '87, Supercomputer Design, Performance Evaluation and Education %V III %I International Supercomputing Institute, Inc. %D 1987 %P 270-276 %A Sheldon B. Akers %A Balakrishnan Krishnamurthy %T On Group Graphs and Their Fault Tolerance %J IEEE Transactions on Computers %V C-36 %N 7 %D July 1987 %P 885-888 %A S. Akhtar %A A. K. Sood %A K. Y. Srinivasan %T An Extended Token Bus Protocol for Embedded Networks %J 8th International Conference on Distributed Computing Systems %I IEEE Computer Society %C San Jose, CA %D June 1988 %P 145-152 %K analysis of bus structures, token bus, performance evaluation, multi-access protocol, deterministic protocol, broadcast medium, bus protocol, protocol performance, embedded networks, local-area networks, Automatic Guided Vehicles, Improved token bus Multi-Access Protocol (IMAP), CSMA/CD, channel utilization, %A Shakil Akhtar %T Reliability of Multiple Bus Multiprocessor Systems %J Proceedings of the 1992 International Conference on Parallel Processing %V I, Architecture %I CRC Press %C Boca Raton, FL %D August 1992 %P I-248--I-252 %K fault tolerance, %A Takayuki Aki %Z National Aerospace Lab, Tokyo %T Supercomputer Efforts on CFD for Nonstationary Flow Analysis at NAL %E Joanne L. Martin %E Stephen F. Lundstrom %B Science and Applications: Supercomputing'88 %V II %I IEEE %C Orlando, FL %D 1988 %P 61-70 %K computational fluid dynamics, CFD, %X CFD in Japan. VP 200 and VP 400. %A Haruo Akimoto %A Sinichi Shimizu %A Akio Shinagawa %A Akira Hattori %A Hiromu Hayashi %T Evaluation of the Dedicated Hardware in FACOM Alpha %J Digest of Papers, Compcon85 %I IEEE Computer Society %D February 1985 %P 366-369 %A Kiumi Akingbehin %A Michael Conrad %T A Hybrid Architecture for Programmable Computing and Evolutionary Learning %J Journal of Parallel and Distributed Computing %V 6 %N 2 %D April 1989 %P 245-263 %K special issue: neural computing %A R. op\ den\ Akker %A H. Albas %A A. Nijholt %A P. Oude Luttighuis %T An annotated Bibliography on Parallel Parsing %R Memoranda Informatica 89-67 %I University of Twente, Dept. of Computer Science %C P.O. box 217, 7500 AE Enschede, the Netherlands %D December 1989 %A R. op\ den\ Akker %A B. Melichar %A J. Tarhio %T The Hierarchy of LR-Attributed Grammars %B Workshop on Attribute Grammars and their Applications %C Paris %I Springer %S Lecture Notes in Computer Science %V 461 %D 1990 %P 13-28 %A S. Akl %A G. Toussaint %T Efficient convex hull algorithms for pattern recognition applications %J 4th International Joint Conference on Pattern Recognition %C Kyoto, Japan %D 1979 %P 483-487 %K Rhighnam, algorithm, analysis, convex-hull %A S. G. Akl %A D. T. Barnard %A R. J. Doran %J Proceedings of the 1980 International Conference on Parallel Processing %D August 1980 %T Simulation and Analysis in Deriving Time and Storage Requirements for a Parallel Alpha-Beta Algorithm %P 231-234 %K Nonnumerical Algorithms and Applications %A S. G. Akl %T A Constant Time Parallel Algorithm for Computing Convex Hulls %J BIT %V 22 %N 2 %D 1982 %P 130-134 %A S. G. Akl %T Optimal Parallel Algorithms for Computing Convex Hulls and for Sorting %J Computing %I Springer-Verlag %V 33 %N 1 %D 1984 %A S. G. Akl %T An Optimal Algorithm for Parallel Selection %J Information Processing Letters %I North-Holland %V 19 %P 47-50 %D July 1984 %A S. G. Akl %A H. Meijer %T Parallel Binary Search %J IEEE Transactions on Parallel and Distributed Systems %V PDS-1 %N 2 %D April 1990 %P 247-249 %K Short note %K Binary search, cost-optimality, merging, parallel algorithm, parallel random access machine %A S. G. Akl %A T. Duboux %A I. Stojmenovic %T Constant Delay Parallel Counters %J Parallel Processing Letters %V 1 %N 2 %D December 1991 %P 143-148 %A S. G. Akl %A I. Stojmenovic %T A Simple Optimal Systolic Algorithm for Generating Permutations %J Parallel Processing Letters %V 2 %N 2 & 3 %D September 1992 %P 231-240 %A Selim Akl %A Nicola Santoro %T Optimal Parallel Merging Without Memory Conflicts %J Problems in Designing Supercomputers: Technologies and Devices SCS 85, First International Conference on Supercomputing Systems %I IEEE Computer Society %P 205-208 %K Parallelization of Application Algorithms %A Selim G. Akl %A David T. Barnard %A Ralph J. Doran %T Design, Analysis, and Implementation of a Parallel Tree Search Algorithm %J IEEE Transactions on Pattern Analysis and Machine Intelligence %V PAMI-4 %N 2 %D March 1982 %P 192-203 %A Selim G. Akl %T An Adaptive and Cost-Optimal Parallel Algorithm for Minimum Spanning Trees %I Dept. of Computing and Information Science, Queen's University %C Kingston, Canada - Ontario %R TR-85-164 %D December 1984 %A Selim G. Akl %T Parallel Sorting Algorithms %I Academic Press %S Notes and Reports in Computer Science and Applied Mathematics %V 12 %C Ontario, Canada %D 1985 %K Rhighnam, algorithms, analysis, hypercube, linear-arrays, mesh, sorting, survey, book, text, %X Useful for more than just sorting. %A Selim G. Akl %T The Design and Analysis of Parallel Algorithms %I Prentice Hall %C Englewodd Cliffs, NJ %D 1989 %K book, text, %A Selim G. Akl %A Frank Dehne %T Pipelined Search on Coarse Grained Networks %J International Journal of Parallel Programming %V 18 %N 5 %D October 1989 %P 359-364 %K average case analysis, coarse grained processor network, parallel algorithms, pipelining, searching, %A Selim G. Akl %A Kelly A. Lyons %T Parallel Computational Geometry %I Prentice-Hall %C Englewood Cliffs, NJ %D 1993 %K book, text, %A V. Akman %A P. J. W. ten\ Hagen %A A. A. M. Kuijk %T A vector-like architecture for raster graphics %C Amsterdam %D 1988 %M f 4,-- %R CWI. Department of Computer Science ; R 8802 %A Varol Akman %A Paul ten\ Hagen %A Fons Kuijk %Z Centre for Mathematics and Computer Science, The Netherlands %T A Vector-like Architecture for Raster Graphics %J Advances in Computer Graphics Hardware II, Record of Second Eurographics Workshop on Graphics Hardware %D 1987 %P 137-154 %X They offer a new view on graphics systems, and a architecture which supports a higher level primitive, which they call a "pattern representation." This primitive is a pattern consisting of a domain function and a color function. See also [Kuijk 87], [Hagen 86]. %A I. F. Akyildiz %A N. M. van\ Dijk %T Exact Solution for Networks of Parallel Queues with Finite Buffers %E P. J. B. King %E I. Mitrani %E R. J. Pooley %B Performance '90 %I North-Holland %C Amsterdam %D 1990 %P 35-49 %A Sami A. Al-Arian %A Dharma P. Agrawal %T Fault Tolerant Design of a Bit-Slice CMOS ALU %J Second International Conference on Supercomputing, Proceedings, Supercomputer '87, Supercomputer Design, Performance Evaluation and Education %V III %I International Supercomputing Institute, Inc. %D 1987 %P 250-259 %A Badr Al-Badr %A Steve Hanks %T Critiquing the Tileworld: Agent Architectures, Planning Benchmarks, and Experimental Methodology %R TR \# 91-11-01 %I University of Washington, Department of Computer Science \& Engineering %C Seattle, WA %D 1991 %X AI Planning for many years was concerned with solving problems in small, controlled domains like the Blocksworld, and testing the algorithms on small, pathological problems like the Sussman anomaly. Lately the field has taken on two new goals: to apply planning techniques to more realistic worlds, and to find a better way to validate the research efforts. One solution that is gaining popularity is to provide more-or-less realistic simulated worlds, in which one implements a planner and provides experimental results reflecting its performance. %X The Tileworld system, reported in \cite{pollack-ringuette-tileworld}, confronts three interesting issues: what constitutes a good simulated testbed world for planning research, what constitutes a successful implementation of a planning architecture, and what constitutes experimental validation of such an implementation. This paper examines the program, claims, and experimental results contained in the Tileworld paper, and offers comments about the difficult issues facing a field that is trying to apply its methods to more realistic problems and simultaneously trying to find more rigorous and satisfying ways of measuring its progress. %A S. Al-Bassam %A H. El-Rewini %A B. Bose %A T. Lewis %T Efficient Serial and Parallel Subcube Recognition in Hypercubes %J Proceedings of the Fifth Distributed Memory Computing Conference %V I, Applications %I IEEE %C Charleston, SC %D April 1990 %P 64-71 %K Alternate Applications, DMCC5, %A D. Al-Dabass %A D. Rutherford %T Simulation Techniques for Microprocessor-Based Parallel Architecture %B Parallel Computers, Parallel Mathematics %E M. Feilmeier %I North-Holland %D 1977 %P 125-131 %K simulation of hardware and software %A D. Al-Dabass %T Hardware aspects of array and pipeline processors for control applications %J Computing Surveys %V 3 %N 2 %D 1979 %P 2-13 %K maeder biblio: architecture, hardware and devices, %K blouie %A Majed Z. Al-Hajery %A Kenneth E. Batcher %T On the Bit-Level Complexity of Bitonic Sorting Networks %J Proceedings of the 1993 International Conference on Parallel Processing %V III - Algorithms & Applications %I CRC Press %C Boca Raton, FL %D August 1993 %P III-209--III-213 %K sorting/searching, BBSN, %A Taghreed Al-Marzooq %A Farokh B. Bastani %T Program Transformation in Massively Parallel Systems %J Proc. Frontiers '92: Fourth Symp. on Massively Parallel Computation %C McLean, VA %I IEEE %D October 1992 %P 498-501 %K poster session, %A T. Ala-Nissila %A K. Kankaala %A K. Kaski %T Principles and Applications of Statistical Cooling %I Electronics Laboratory, Tampere University of Technology %C Tampere, Finland %D 1988 %K simulated annealing, %O ISBN 951-721-158-9 %A V. Aladyev %T A few results in the theory of homogeneous structures %B Products of Automata %E W. Brauer %E G. Rosenberg %E A. Solomaa %D 1986 %I Springer-Verlag %C Berlin %P 168-175 %K Theoretical problems %A Gita Alaghband %A Harry F. Jordan %T Multiprocessor Sparse L/U Decomposition with Controlled Fill-in %R Report No. 85-48 %I ICASE, NASA Langley Research Center %C Hampton, VA %D October 1985 %K multiprocessor, Gaussian elimination, parallel pivoting, HEP, shared memory MIMD, %X Submitted to IEEE Trans on Computing %A Gita Alaghband %T Parallel Pivoting Combined with Parallel Reduction %I ICASE %C Hampton, VA %R 87-75 %D December 1987 %K multiprocessor, Gaussian elimination, parallel pivoting %A Gita Alaghband %Z U. Colorado, Denver %T A Parallel Pivoting Algorithm on a Shared Memory Multiprocessor with Controlled Fill-in %J Proceedings of the 1988 International Conference on Parallel Processing %V III, Algorithms and Applications %I Penn State %C University Park, Penn %D August 1988 %P 177-180 %K Numeric Algorithms, LU decomposition, MIMD, linear systems, proposed HEP use, %A M. S. Alam %A Ram G. Melhem %T Channel Multiplexing in Modular Fault Tolerant Multiprocessors %J Proceedings of the 1991 International Conference on Parallel Processing %V I, Architecture %I CRC Press %C Boca Raton, FL %D August 1991 %P I-492--I-496 %K fault diagnosis, recovery, and tolerance, concise paper, %A E. A. Albacea %T Determining the Model in Parallel %J Parallel Processing Letters %V 1 %N 1 %D September 1991 %P 3-10 %A E. A. Albacea %T Computation List Evaluation and Its Applications %J Parallel Processing Letters %V 2 %N 4 %D December 1992 %P 321-330 %A T.S. van Albada %T Models of Hot Stellar Systems %B The Use of Supercomputers in Stellar Dynamics %I Springer-Verlag %C Berlin %D 1986 %E P. Hut %E S. McMillan %V 267 %K Astrophysical Problems and Mathematical Models %P 23-35 %A M. G. Albanesi %A V. Catoni %A U. Cei %A M. Ferretti %A M. Mosconi %T Embedding Pyramids into Mesh Arrays %E Hungwen Li %E Quentin F. Stout %B Reconfigurable Massively Parallel Computers %I Prentice Hall %C Englewood Cliffs, NJ %D 1991 %P 123-140 %A Eugene Albert %A Kathleen Knobe %A Joan D. Lukas %A Guy L. Steele, Jr. %T Compiling Fortran 8x Array Features for the Connection Machine Computer System %J Proceedings ACM/SIGPLAN PPEALS 1988 Parallel Programming: Experience with Applications, Languages and Systems, July 1988, SIGPLAN Notices %V 23 %N 9 %D September 1988 %P 42-56 %K programming language translation, %A Carl Albing %A John Kyle %T Network Batch Access: An Integral Part of Network Supercomputing %J 1990 Fall Proceedings Cray User Group Meeting %I CUG %C Washington DC %D Fall 1990 %P 79-81? %K communications, %A H. Alblas %T Concurrent Incremental Attribute Evaluation %B Workshop on Attribute Grammars and their Applications %C Paris %I Springer %S Lecture Notes in Computer Science %V 461 %D 1990 %P 343-358 %A R. F. Albrecht %T Concept of a Multi-Processor Parallel Processing Unit %J Computing %I Springer-Verlag %V 25 %D 1980 %P 1-16 %K Maeder biblio: hardware, devices, general work, %A R. Albrizio %A G. Aloisio %A A. Mazzone %A P. Messina %A N. Veneziani %T Performance of Multiprocessor Structures for Fast Digital SAR Processing %J Sixth Distributed Memory Computing Conference Proceedings %I IEEE %C Portland, OR %D April/May 1991 %P 611-616 %K DMCC6, performance analysis, short papers, performance models, %A John E. Aldag %T The Impact of Supercomputers: Global, Pervasive, Positive %J International Journal of Supercomputer Applications %V 3 %N 2 %D Summer 1989 %P 3-5 %A David Aldous %T On the Markov Chain Simulation Method for Uniform Combinatorial Distributions and Simulated Annealing %I Department of Statistics, University of California %C Berkeley, CA %R TR 80 %D 1986 %A Igor Aleksander %Z Imperial College, London %T Myths and Realities about Neural Computing Architectures %E Mike Reeve %E Steven Ericsson Zenith %B Parallel Processing and Artificial Intelligence %S Communicating Process Architecture %I John Wiley and Sons. %D 1989 %P 1-13 %O ISBN 0-471-92497-0 %A Z. Aleksic %A T. Bossomaier %T An Efficient Implementation of the Multi-Layer Perceptron on Transputer Networks %I Australian National University %D 1989 %A R. Aleliunas %T Randomized Parallel Communication %J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing %I ACM %C Ottawa, Canada %D August 1982 %P 60-72 %X Also see ICPP 86. %A Craig Alesso %T Cray's Perspective on the FDDI Interconnect Fiber Distributed Data Interface %J 1988 Fall Proceedings Cray User Group Meeting %I CUG %C Washington DC %D Fall 1988 %P 291-296? %K communications, %A Craig Alesso %T Network Interconnect Update %J 1989 Fall Proceedings Cray User Group Meeting %I CUG %C Washington DC %D Fall 1989 %P 234-236? %K communications, %A Craig M. Alesso %T CRAY's Perspective on the FDDI Interconnect Fiber Distributed Data Interface %J Cray User Group 1988 Fall Proceedings %C Minneapolis, MN %D 1988 %P 291-296 %K 22st Meeting, communication, %A Craig Alessso %T Network Interconnection Update %J Proceedings, 27th Semi-Annual Cray User Group Meeting %I CUG %C London %D April 1991 %P 73-76? %K communications, %A Craig Alessso %T The Cray Based Network Monitor %J Proceedings, 27th Semi-Annual Cray User Group Meeting %I CUG %C London %D April 1991 %P 89-93? %K communications, %A Murray E. Alexander %Z University of Guelph %T Evolution of Gravitational N-Body Systems on a FPS-164 %J Proceedings of 1985 Array Conference %C New Orleans, Louisiana %D April 1985 %$ 30 %X This presentation deals with the application of the FPS-164 Array Processor to the simulation of gravitational many-body systems. %X The dynamical behavior of a large self-gravitating system of particles is important in studying the evolution of star clusters. The law of force between particles is just Newton's law of gravitation, yet the resulting dynamics can be extremely complicated, posing a challenging computational problem. The complications arise from two sources: %X (a) The equations of motion possess singularities, which can cause severe numerical instability whenever two or more particles undergo a close encounter or collision. %X (b) The calculation of the force on a given particle requires the frequent summation of a large number of terms arising from the attraction of the (N-1) other particles, with N typically of order 500. %X The pioneering computer studies in the early sixties indicated that binary systems may form while globular star clusters contract. These binaries have a profound effect on the dynamical evolution of the entire cluster, which stresses the importance of using accurate and stable numerical techniques for dealing with them as well as with "chance" close encounters between binaries and single starts or binaries with binaries. %X The singularities in the equations of motion can be removed for the case of two-body collisions by a "regularization" transformation. This technique has been incorporated in programs to perform scattering simulation experiments on the FPS-164 for binary-single star and binary-binary encounters. %X A sophisticated computer program for integrating large N-body systems, and using regularization to deal with close encounters, has been obtained from Dr. Aaseth (Cambridge, England). Using this program, one is able to watch the formation (and destruction) of binaries, and examine their effect on the cluster as a whole as its core contracts. %A P. Alexander %T Array processors in image analysis applications %J Proc. New Concepts Symp. and Workshop Detection and Identification of Explosives %D 1978 %P 365-370 %K blouie %A P. Alexander %T The array processor as an intelligent simulation co-processor %J Proc. Summer Computer Simulation Conference %D 1979 %P 2-13 %K blouie %A P. Alexander %T Array processors %J Machine Design %V 51 %N 19 %D August 1979 %P 87-92 %K blouie %A P. Alexander %T Enhancing ease of use of array processors through software design %J Industrial Research/Development %V 22 %N 5 %D May 1980 %P 111-114 %K blouie %A Peter Alexander %T A Guide to the Use of Modular Array Processor Systems in Signal Processing Applications %E Walter J. Karplus %B Peripheral Array Processors %S Simulation Series %V 11 %N 1 %I Society for Computer Simulation %C La Jolla, CA %D 1982 %P 83-92 %K FFT, signal processing, MARS-432, %X Pitch. %A Peter Alexander %T The Numerix MARS-432 Array Processor %E Walter J. Karplus %B Peripheral Array Processors %S Simulation Series %V 14 %N 2 %I Society for Computer Simulation %C La Jolla, CA %D 1984 %P 39-52 %X Pitch. %A Peter T. Alexander %A Richard O. Parker %T A comparison of a parallel and serial implementation of a large real time problem %J Proceedings of the 1973 Sagamore Computer Conference %D August 1973 %I IEEE %P 180-186 %K ICPP1, PEPE %A William Alexander %A Richard Brice %T Performance Modeling in the Design Process %J National Computer Conference \(em Proceedings %I AFIPS %V 51 %D 1982 %P 257-262 %K LANL %A William Alexander %A Tom W. Keller %A Ellen E. Boughter %T A Workload Characterization Pipeline for Models of Parallel Systems %J Proc. 1987 ACM/SIGMETRICS Conf. in Meas. and Mod. of Comp. Syst. %V 15 %N 1 %D May 1987 %C Banff, Alberta, Canada %K Techniques and Tools %P 186-194 %A William Alexander %A George Copeland %Z MCC %T Comparison of Dataflow Control Techniques in Distributed Data-Intensive Systems %J Proc. 1988 ACM SIGMETRICS, Performance Evaluation Review %V 16 %N 1 %D 1988 %P 157-166 %K transaction processing, case study, %A Winsre E. Alexander %A Seong-Mo Park %A Jung H. Kim %T A New Approach to the Implementation of Multidimensional Signal Processing Algorithms %J Proceedings of the 1988 International Conference on Parallel Processing %V III, Algorithms and Applications %I Penn State %C University Park, Penn %D August 1988 %P 124-127 %K Applications, N dimensional state space (N-D), discrete, linear, shift-invariant (DLSI), VLSI, pipelining, %A Nikitas A. Alexandridis %T Architectural Adaptations in Image Processing Supersystems %J Problems in Designing Supercomputers: Technologies and Devices SCS 85, First International Conference on Supercomputing Systems %I IEEE Computer Society %P 173-181 %K Education and Supercomputing %A Nikitas A. Alexandridis %T Adaptable Software and Hardware: Problems and Solutions %J Computer %I IEEE %V 19 %N 2 %D February 1986 %P 29-39 %A R. Alferness %T Waveguide Electrooptic Switch Arrays %J IEEE J. on Selected Areas in Commun. %V 6 %N 7 %D 8/1988 %P 1117-1130 %K optics, optical crossbars %A M. Alford %T Requirements for Distributed Data Processing Design %J 1st International Conference on Distributed Computing Systems %I IEEE %D October 1979 %P 1-14 %K Design and requirements specification methodology %T Fault-Tolerant Task Mapping Algorithms for MIN-Based Multiprocessors %P I-445--I-448 %A M. S. Algudady %A Chita R. Das %A Woei Lin %J Proceedings of the 1990 International Conference on Parallel Processing %V I, Architecture %I Penn State U. Press %C University Park, Penn %D August 1990 %K Fault Tolerant Interconnection Networks, %A M. S. Algudady %A C. R. Das %A M. J. Thazhutaveetil %Z Penn State %T A Write Update Cache Coherence Protocol for MIN-Based Multiprocessors with Accessibility %J Proceedings Supercomputing'90 %I IEEE %C New York, New York %D November 1990 %P 544-553 %A M. S. Algudady %A C. R. Das %A M. J. Thazhuthaveetil %T A Cache-Based Checkpointing Scheme for MIN-Based Multiprocessors %J Proceedings of the 1991 International Conference on Parallel Processing %V I, Architecture %I CRC Press %C Boca Raton, FL %D August 1991 %P I-497--I-500 %K fault diagnosis, recovery, and tolerance, concise paper, %A A. T. Ali %A E. L. Dagless %T A Parallel Processing Model for Real-Time Computer Vision-Aided Road Traffic Monitoring %J Parallel Processing Letters %V 2 %N 2 & 3 %D September 1992 %P 257-264 %A K. A. M. Ali %T A Method for Implementing Cut in Parallel Execution of Prolog %J Proceedings - 1987 Symposium on Logic Programming %I IEEE Computer Society Press %P 449-456 %D September 1987 %A K. A. M. Ali %A R. Karlsson %T Performance of Muse on the BBN Butterfly TC2000 %E D. Etiemble %E J.-C. Syre %B PARLE '92, Parallel Architectures and Languages Europe %S LNCS %V 605 %I Springer-Verlag %C Berlin %D 1992 %P 603-616? %K prolog, %A K. M. Ali %A L. Fahlen %A R. Karlsson %T BC-Machine: A Multiprocessor for Fast OR-Parallel Execution of Logic Programs %I SICS %D 1986 %A K. M. Ali %T OR-Parallel Execution of Prolog on a Multi-Sequential Machine %D 1987 %X Accepted for publication in IJPP %A K. M. Ali %T A Method for Implementing Cut in Parallel Execution of Prolog %J ECRC Workshop on Parallel Logic Programming Systems %D 1987 %A Khayri A.M. Ali %T A Method for Implementing Cut in Parallel Execution of Prolog %I SICS %D February 1987 %X submitted to SLP '87 %A Khayri Abdel-Hamid Mohamed Ali %T Object-Oriented Storage Management and Garbage Collection in Distributed Processing Systems, part I %R TRITA-CS-8406 %I Royal Institute of Technology, Dept. of Computer Systems %I Stockholm, Sweden %D December 1984 %K Tagged architecture, schemes, Actors, %A Khayri Abdel-Hamid Mohamed Ali %T Object-Oriented Storage Management and Garbage Collection in Distributed Processing Systems, part II, appendices %R TRITA-CS-8406 %I Royal Institute of Technology, Dept. of Computer Systems %I Stockholm, Sweden %D December 1984 %K Tagged architecture, schemes, Actors, %A Jean-Michel Alimi %A Hans Scholl %T Formation of Large Scale Structures of the Universe on the Connection Machine-2 %E Th. Lippert %E K. Schilling %E P. Ueberholz %B Science on the Connection Machine: Proc. of the First European CM Users Meeting %J International Journal of Modern Physics C %V 4 %N 1 %I World Scientific %C Singapore %D 1993 %P 197-205 %A Leon Alkalaj %A Tomas Lang %A Milos Ercegovac %T Architectural Support for the Management of Tightly-Coupled Fine-Grain Goals in Flat Concurrent Prolog %J Proc. 17th Annual Symposium on Computer Architecture, Computer Architecture News %I ACM %V 18 %N 2 %D June 1990 %P 292-301 %K Prolog/Potpourri %A H. S. Alkhatib %T The EENET: a broadband local area network %J Interfaces Comput. (Switzerland) %V 2 %N 4 %P 321-343 %O 99 REFS. Treatment PRACTICAL %D Nov. 1984 %K local area networks broadband networks protocols EENET broadband local area network real time applications formal specifications simulation model protocols %A S. J. Allan %A A. E. Oldehoeft %J Proceedings of the 1980 International Conference on Parallel Processing %I IEEE %D August 1980 %T Loop Decomposition in the Translation of Sequential Languages to Data Flow Languages %P 139-140 %A S. J. Allan %A R. R. Oldehoeft %T A stream definition for Von Neumann multiprocessors %J Proceedings of the 1983 International Conference on Parallel Processing %I IEEE %D August 1983 %P 303-306 %K CoStU, HEP, VAL, SISAL, expressing parallelism %A S. J. Allan %A R. R. Oldehoeft %T Parallelism in SISAL: exploiting the HEP architecture %J 19th Hawaii International Conference on System Sciences %P 538-548 %D January 1986 %K bsisal %A Stephen J. Allan %A Arthur E. Oldehoeft %T A Flow Analysis Procedure for the Translation of High Level Languages to a Data Flow Language %J Proceedings of the 1979 International Conference on Parallel Processing %D August 1979 %P 26-34 %K Languages and Translations %X Also See IEEE TOC Sept. 1980. %A Stephen J. Allan %A Arthur E. Oldehoeft %T A Flow Analysis Procedure for the Translation of High-Level Languages to a Data Flow Language %J IEEE Transactions on Computers %V C-29 %N 9 %D September 1980 %P 826-831 %K Data flow analysis, data flow computers, code generation, language translation, parallel processing Special issue on Parallel Processing %X Also see ICPP 79. %A Kai Hwang %A Lionel M. Ni %T Resource Optimization of a Parallel Computer for Multiple Vector Processing %J IEEE Transactions on Computers %V C-29 %N 9 %D September 1980 %P 831-841 %K M/M/k/l queueing system, multiple SIMD (MSIMD) computer, multiprocessor architecture, parallel vector processing, performance optimization, Special issue on Parallel Processing, maeder biblio: concepts of parallel processing, parallel architecture, parallel hardware and devices, %A Stephen J. Allan %A R. R. Oldehoeft %T HEP SISAL: Parallel Functional Programming %E Janusz S. Kowalik %B Parallel MIMD Computation: HEP Supercomputer and Its Applications %I MIT Press %C Cambridge, MA %D 1985 %P 123-150 %K Programming and languages, dataflow, VAL, %K bsisal %X Short syntax of SISAL language. %A R. W. Allard %A K. A. Wolf %A R. A. Temlin %T Some Effects of the 6600 Computer on Language Structures %J Communications of the ACM %V 7 %N ? %P 112-119 %K bhibbard %D 1964 %A J. E. Allchin %T A suite of robust algorithms for maintaining replicated data using weak consistency conditions %J Proceedings Third Symposium on Reliability in Distributed Software and Database Systems %C Clearwater Beach, FL, USA %P 47-56 %O 16 REFS. Treatment PRACTICAL %I IEEE Comput. Soc. Press ISBN: 0-8186-0501-4 Silver Spring, MD, USA, p: viii+195 %D 17-19 Oct. 1983 %K data handling database management systems operating systems distributed replicated data serial consistency data storage operating systems real time systems mail systems naming servers appointment calendars file dictionaries operating system load tables routing distributed process control systems message traffic overhead %X A suite of decentralized robust algorithms for maintaining distributed replicated data is presented. The algorithms do not necessarily achieve serial consistency, but they are adequate for many simple data storage problems in operating systems and real-time systems. Applications which appear well suited to the suite include mail systems, naming servers, appointment calendars, certain types of file dictionaries, operating system load tables (e.g. routing), and device state in distributed process control systems. The algorithms assume an unreliable network and tolerate node failures, network partitions, lost, duplicate, and out-of-order messages. High availability and rapid response time are achieved by the algorithms, which use resolution tables to state the outcome of information conflicts caused by concurrent actions or unreliable nodes and communication. Each algorithm is oriented toward different application requirements and provides different degrees of message traffic overhead and availability %A J. E. Allchin %A M. S. McKendry %T Synchronization and Recovery of Actions %J Proceedings of the Second ACM Symposium on the Principles of Distributed Computing %I ACM SIGPLAN/SIGOPS %D August 1983 %P 31-44 %K Clouds %A J. E. Allchin %T How to Shadow a Shadow %R Technical Report GIT-ICS-83/05 %I School of Information and Computer Science, Georgia Institute of Technology, Atlanta, GA %D February 1983 %X "Several file and database systems have used a shadowing technique for recovery purposes on data files which are not concurrently accessed. Essentially there are two versions: the current version and a shadow version. Transactions manipulate only the current version. When a change is first made to a data page, a new page is allocated and the current version page directory is updated with the new page location. The usual implementation is exceptionally efficient for small to medium-sized files because on transaction termination the only processing required is to determine which version should become the shadow; the other version is discarded. This paper discusses an efficient solution for using this approach with concurrent transactions. We present a technique for building not only single-level concurrent transactions, but nested transactions which may be concurrent as desired." %A J. E. Allchin %A M. S. McKendry %T Support for Objects and Actions in Clouds: Status Report %D May 1983 %R Technical Report GIT-ICS-83/11 %I School of Information and Computer Science, Georgia Institute of Technology, Atlanta, GA %X "This status report describes the current work of the \fBClouds\fP project at Georgia Tech. The Clouds project is studying techniques for construction of reliable computing systems in environments of distributed machines interconnected by local area networks. This report emphasizes the functional requirements for architectural support. To support reliability, the architecture supports \fIobjects\fP and \fIactions\fP. Objects are instances of abstract data types. They provide a basis for building system components and for controlling the behavior of a system when failures occur. Atomic actions are a means of dynamically grouping invocations of operations on objects into units of work that either complete in their entirety or do not have any effect whatsoever. Recovery mechanisms assist in maintaining this abstraction and synchronization mechanisms control interactions between actions. %X "The techniques described are oriented particularly toward highly dynamic applications in which the payoff for reliability is high and the loads placed on the system vary substantially. The architectural support may be tailored to particular applications, even within a single system. It is possible, for example, to use `hot spares' (an on-line spare is maintained so that no time is lost upon failure), or slower but cheaper recovery in which computations are restarted after failures. Mechanisms are provided to make it possible to bring failed machines on-line and integrate them with the remainder of the system without disruption. To improve efficiency and limit the propagation of the effects of failures, mechanisms are provided to construct \fInested\fP actions, which function as components of larger actions while failing independently of their containing actions." %A D. C. Allen %T The BBN Multiprocessor: Butterfly and Monarch %B The Use of Supercomputers in Stellar Dynamics %I Springer-Verlag %C Berlin %D 1986 %E P. Hut %E S. McMillan %V 267 %P 72-83 %K Super/Parallel Computers, MIMD, %K Rhighnam, architecture, %A Donald C. Allen %A N. S. Sridharan %T Application of the Butterfly Parallel Processor in Artificial Intelligence %B Parallel Computation and Computers for Artificial Intelligence %E Janusz S. Kowalik %I Kulwer Academic Publishers %C Boston %D 1988 %P 153-164 %A Edward B. Allen %A Arvid G. Larson %T FORTRAN Extension Design Concepts for Associative Processing %J Proceedings of the Sagamore Computer Conference (1975) %D August 1975 %I IEEE %P 186 %K languages %X Summary only. %A F. E. Allen %T Control Flow Analysis %J SIGPLAN Notices %V 5 %N 7 %P 1-19 %D 1970 %A F. E. Allen %A J. Cocke %T A Program Data Flow Analysis Procedure %J CACM %V 19 %N 3 %D 1976 %P 137-147 %A Fran Allen %A Michael Burke %A Phillippe Charles %A Ron Cytron %A Jeanne Ferrante %Z IBM T. J. Watson Research Center, Yorktown Heights, NY %T An Overview of the PTRAN Analysis System for Multiprocessing %J Proceedings of the First International Conference on Supercomputing %C Athens, Greece %I Springer-Verlag %D 1987 %K program partitioning, compilation, optimization, %r RC 13115 (#56866) %d Sept. 1987 %A Frances Allen %A Michael Burke %A Ron Cytron %A Jeanne Ferrante %A Wilson Hsieh %A Vivek Sarkar %Z IBM TJW %T A Framework for Determining Useful Parallelism %J 1988 International Conference on Supercomputing (ICS) %I ACM Press %C St. Malo, France %D July 1988 %P 207-216 %K detecting parallelism, creating process trees, parallel FORTRAN, PAR, CHOICE, doall, PARALLEL CASES, PTRAN, %A Frances Allen %A Michael Burke %A Philippe Charles %A Ron Cytron %A Jeanne Ferrante %Z IBM TJW %T An Overview of the PTRAN Analysis System for Multiprocessing %J Journal of Parallel and Distributed Computing %V 5 %N 5 %D October 1988 %P 617-640 %K special issue on languages, compilers, and environments for parallel programming, parallel fortran, %A G. R. Allen %T Parallel Processing System -Cyberplus- %B Supercomputers, Class VI Systems, Hardware and Software %E Sidney Fernbach %I North-Holland %D 1986 %P 169-181 %A J. Allen %T Computer architecture for signal processing %J Proc. IEEE %V 63 %N 4 %D April 1975 %P 624-633 %K blouie %A J. Allen %T Algorithms, Architecture, and Technology %B Fifth Generation Computer Systems %E T. Moto-Oka %I North Holland %D 1982 %P 277-281 %X Shallow. %A J. Allen %T VLSI Overall Design %E G. G. Scarrott %B The Fifth Generation Computer Project: State of the Art Report %I Pergamon Infotech, Ltd. %D 1983 %P 31-39 %A J.F. Allen %A S. Guez %A L.J. Hoebel %A E.A. Hinkelman %A K.J. Jackson %A A.I. Kyburg %A D.R. Traum %T The discourse system project %R TR 317 %I Univ. of Rochester Computer Science Dept. %D Nov. 1989 %Z 82 pages, $3.25 %X There has been significant work in the last decade on the processing of discourse for modeling two-person extended dialogues, story and text understanding, and extended question answering systems. While there has been important progress in the use of world knowledge in language interpretation, the use of plan-based models of language (e.g., speech act planning), models of reference and focus, and models of discourse structure itself, work in each area has not been related to work in the other areas. No one has determined how individual processing techniques can be combined to form a fully functional discourse system. Some suggestions on the organization of discourse have arisen recently, and while showing promise, have not been explored in enough detail for an actual application. This report describes an architecture for discourse systems that allows the integration of many different processing modules. It also describes an initial set of modules that have been implemented and tested using the architecture. %A J. R. Allen %A K. Kennedy %X DAMAGE control %A J. R. Allen %A K. Kennedy %A C. Porterfield %A J. Warren %T Conversion of Control Dependence to Data Dependence %J 10th ACM Symposium on Principles of Programming Langages %D 1983 %K 10thPOPL, if parallelization %A J. R. Allen %A K. Kennedy %T A Parallel Programming Environment %I Department of Computer Science, Rice University %R COMP TR84-8 %D July 1984 %K NYU Ultracomputer, PFC, R superscript n project %X Describes Rice's developing parallel programming environment, which investigates automatic techniques for converting Fortran programs to parallel form. Gives a nice introduction to the problems, as well as a reasonable survey of the work to date. The machine model is the NYU Ultracomputer, of which they also give a nice abstract description. This is part of the R superscript n project. %X They use a Parallel Fortran Converter (PFC), to convert Fortran programs into vector form. It seems like some of what they do is done by Kuck's paracompiler (see Kuck et al., "Parallel supercomputing today and the Cedar approach"). %A James F. Allen %T A Plan-Based Approach to Speech Act Recognition %R Technical Report 131/79, PhD thesis %I Department of Computer Science, University of Toronto %C Toronto, Canada %D 1979 %K Rdpsdis.bib Rsingh %A John R. Allen %A Ken Kennedy %Z Dept. of Math. Sciences, Rice University %T PFC: A Program to Convert FORTRAN to Parallel Form %J Proceedings of the IBM Conference on Parallel Computers and Scientific Computations %C Rome %D 1982 %K parallelizing compilers, %r MASC Technical Report 82-6 %d March 1982 %X Also reprinted in the text compiled by Kai Hwang: "Supercomputers: Design and Application," IEEE, 1984. %A John R. Allen %A Ken Kennedy %T Automatic Loop Interchange %J Proc. SIGPLAN '84 Symposium on Compiler Construction, SIGPLAN Notices %I ACM %V 19 %N 6 %D June 1984 %P 233-246 %K Rhighnam, compilation %K vector processor, loop modification, parallel FORTRAN converter (PFC), vectorization, parallelizing compilers, %K Held in Montreal %X Describes a tool for changing loops around of use in vector and array computers. The mechanism is fairly simple and is used to take advantage of those codes which do not loop with efficiency [IBM sponsored this research]. %A John R. Allen %A Ken Kennedy %T A Parallel Programming Environment %Z Rice University %r TR84-8 %c Houston, TX %d July 1984 %J IEEE Software %V 2 %N 4 %P 21-29 %D July 1985 %K automatic vectorization, synchronization, R^n project, parallel FORTRAN, issue on complex parallel systems, PTOOL, %X Automated techniques will not entirely free the programmer from thinking about parallelism but will uncover natural parallelism in loops and generate appropriate synchronization primitives to exploit that parallelism. %A Keith R. Allen %A Roy P. Pargas %T On the Automatic Development of Systolic Arrays %J Second International Conference on Supercomputing, Proceedings, Supercomputer '87, Supercomputer Design, Performance Evaluation and Education %V III %I International Supercomputing Institute, Inc. %D 1987 %P 209-217 %A R. Allen %T Dependence Analysis for for subscripted variables and its application to program transformations %I Rice University %C Houston Texas %R UMI 83-14916 %D April 1983 %K PhD thesis, %A R. Allen %A D. Callahan %A K. Kennedy %T Automatic Decomposition of Scientific Programs for Parallel Execution %J Conference Record of the Fourteenth ACM Symposium on Principles of Programming Languages %C Munich, Germany %D January 1987 %P 63-76 %K POPL87, parallelization, PFC, program partitioning, optimizing compiler, %A Randy Allen %A Ken Kennedy %Z Rice University, Houston, TX %T Programming Environments for Supercomputers %B Supercomputers: Algorithms, Architectures, and Scientific Computation %I University of Texas Press %E F. A. Matsen %E T. Tajima %C Austin, TX %P 19-38 %D 1986 %r Rice COMP TR85-18 %d March 1985 %K automatic vectorization, dependence, programming environment, parallel programming, %A Randy Allen %A Donn Baumgartner %A Ken Kennedy %A Allan Porterfield %Z Rice University %T PTOOL: A Semi-automatic Parallel Programming Assistant %r TR 86-31 %c Houston, TX %d January 1986 %J Proceedings of the 1986 International Conference on Parallel Processing %I IEEE %D August 1986 %P 164-170 %K Parallel processing languages, software tools, programming environment, FORTRAN, scanner, performance, data dependence, %A Randy Allen %A Robert T. Hood %A Ken Kennedy %T Characteristics of a Parallel Programming Environment %I Rice University %C Houston, TX %R Rice COMP TR86-32 %D January 1986 %A Randy Allen %A David Callahan %A Ken Kennedy %T An Implementation of Interprocedural Data Flow Analysis in a Vectorizing Fortran Compiler %I Rice University %C Houston, TX %R Rice COMP TR86-38 %D May 1986 %A Randy Allen %A Ken Kennedy %T Automatic Translation of Fortran Programs to Vector Form %Z Rice University, Houston, TX %J Transactions on Programming Languages and Systems %V 9 %N 4 %D October 1987 %P 491-542 %K parallelization, compilers, PFC, program partitioning, optimization, %r Rice COMP TR84-9 %d July 1984 %A Randy Allen %T Unifying Vectorization, Parallelization, and Optimization: The Ardent Compiler %J Proceeding Supercomputing '88: Technology Assessment, Industrial Supercomputer Outlooks, European Supercomputing Accomplishments, and Performance & Computations %I Third International Conference on Supercomputing (ICS '88) %C St. Petersberg, FL %V 2 %D 1988 %P 176-185 %K parallelization, vectorization %X Ardent compiler is wonderful. (mw) %A Randy Allen %A Bruce Borden %A Steve Johnson %A Michael Kaplan %A Way Ting %A Charles Wetherell %T Systems Software for the Sciences: Taming the Single-User Supercomputer %J Compcon '88 %I IEEE %C San Francisco, CA. %D February -March, 1988 %P 457-461 %K Ardent Titan, %A Randy Allen %A Steve Johnson %T Compiling C for Vectorization, Parallelization, and Inline Expansion %J Proceedings ACM SIGPLAN '88 Conference on Programming Language Design and Implementation %P 241-249 %K compilers parallel programming inline substitution %D July 1988 %A Randy Allen %A Ken Kennedy %T Vector Register Allocation %J IEEE Transactions on Computers %V C-41 %N 10 %D October 1992 %P 1290-1317 %X This paper talks a lot about techniques to minimize the use of temporary storage to one or several lengths of a vector register (which obviously fits well with the availability of local memory). %A Richard C. Allen, Jr. %A Lorraine S. Baca %A David E. Womble %T Invariant Embedding and the Method of Lines for Multiprocessor Computers (Abstract) %E Garry Rodrigue %B Parallel Processing for Scientific Computing %I SIAM %C Philadelphia, PA %D 1989 %P 151 %K differential equations %A Todd R. Allen %A David A. Padua %T Debugging Parallel Fortran on a Shared Memory Machine %J Proceedings of the 1987 International Conference on Parallel Processing %I Penn State %C University Park, Penn. %D August 1987 %P 721-727 %K Software Support %r CSRD TR #624 %d Janaury 1987 %A William H. Allen %T Science at the National Center for Supercomputing Applications %J International Journal of Supercomputer Applications %V 2 %N 3 %D Fall 1988 %P 6-9 %A B. D. Alleyne %A J. M. Boyce %A I. D. Scherson %Z Princeton %T Imad Block Transforms in a Partitioned Parallel Associative Processor %J Proceedings of the 1989 International Conference on Parallel Processing %V III - Algorithms and Applications %I Penn State %C University Park, Penn %D August 1989 %P III-48--III-55 %K image processing, %A Brian D. Alleyne %A Isaac D. Scherson %T Expanded Delta Networks for Very Large Parallel Computers %J Proceedings of the 1992 International Conference on Parallel Processing %V I, Architecture %I CRC Press %C Boca Raton, FL %D August 1992 %P I-127--I-131 %K IC networks, %A Brian D. Alleyne %A Isaac D. Scherson %T Permutation in 2-Stage Recirculating Delta Networks %J Proc. Frontiers '92: Fourth Symp. on Massively Parallel Computation %C McLean, VA %I IEEE %D October 1992 %P 502-503 %K poster session, %A E. Allgower %A K. Bohmer %A M. Zhen %T On a problem decomposition for semilinear nearly symmetric elliptic problems %E Wolfgang Hackbusch %B Parallel Algorithms for Partial Differential Equations %S Numerical Fluid Mechanics %V 31 %I Friedr. Vieweg and Sohn %C Braunschweig %D 1991 %P 1-17 %K Proceedings of the Sixth GAMM-Seminar, Kiel, Jan. 1990. %Q Alliant Computer Systems %T FX/FORTRAN Programmer's Handbook %R Part No. 302-00001-B %D May 1985 %Q Alliant Computer Systems %T FX/Series Architecture Manual %R Part No. 300-00001-B %D January 1986 %X Looks a lot like an assembly language manual. %Q Alliant Computer Systems %T Concentrix Systems Reference Manual %R Part No. 301-02001-B %D January 1986 %X A Unix manual with their specific implementation (4.2). %Q Alliant Product Literature %D 1989 %K parallel graphics architecture, %X Discussion of graphics standards running on a parallel machine. %A D. C. S. Allison %A S. Harimoto %A L. T. Watson %Z Virginia Poly %T The Granularity of Parallel Homotopy Algorithms for Polynomial Systems of Equations %J Proceedings of the 1988 International Conference on Parallel Processing %V III, Algorithms and Applications %I Penn State %C University Park, Penn %D August 1988 %P 165-168 %K Numeric Algorithms, linear algebra, homogenization, HOMPACK, %A D. C. S. Allison %A Amal Chakraborty %A Layne T. Watson %Z YA Polytech. %T Granularity Issues for Solving Polynomial Systems via Globally Convergent Algorithm on a Hypercube %J The 3rd Conference on Hypercube Concurrent Computers and Applications %V II, Applications %I ACM %C Pasadena, CA %D January 1988 %P 1463-1472 %K optimization and equation solving, iPSC, homotopy algorithm, polynomial systems, %A D. C. S. Allison %A Amal Chakraborty %A Layne T. Watson %T Granularity Issues for Solving Polynomial Systems via Globally Convergent Algorithms on a Hypercube %J The Journal of Supercomputing %V 3 %N 1 %D March 1989 %P 5-20 %A D. C. S. Allison %A K. M. Irani %A C. J. Ribbens %A L. T. Watson %T Shared Memory Parallel Algorithms for Homotopy Curve Tracking %J Proceedings of the 1991 International Conference on Parallel Processing %V III, Algorithms & Applications %I CRC Press %C Boca Raton, FL %D August 1991 %P III-17--III-20 %K numerical algorithms, concise paper, %A James R. A. Allwright %A D. B. Carpenter %T A Distributed Implementation of Simulated Annealing for the Travelling Salesman Problem %J Parallel Computing %V 10 %N 3 %D May 1989 %P 335-338 %K simulated annealing, travelling salesman problem (TSP), Metropolis algorithm, Transputers, %A G. S. Almasi %T Overview of parallel processing %J Parallel Computing %V 2 %N 3 %D November 1985 %I North-Holland %K Special Issue on Parallel Processing %P 191-203 %A George Almasi %A Raghu Karinthi %A Kankanahalli Srinivas %T A Parallel Algorithm for Computing Set Operations on Loops %R TR 93-10 %I West Virginia University %C Morgantown %D August 1993 %X vonneumann.cs.wvu.edu. cd to pub/techreports directory. %A George S. Almasi %A Allan Gottlieb %T Highly Parallel Computing %I Benjamin/Cummings division of Addison Wesley Inc. %D 1989 %K ISBN # 0-8053-0177-1, book, text, Ultracomputer, grequired91, %K enm, cb@uk, ag, jlh, dp, gl, dar, dfk, %$ $36.95 %X This is a kinda neat book. There are special net antecdotes which makes this interesting. %X Oh, there are a few significant typos: LINPAK is really LINPACK. Etc. %X It's cheesy in places and the typography is pitiful, but it's still the best survey of parallel processing. We really need a Hennessy and Patterson for parallel processing. %X (JLH & DP) The authors discuss the basic foundations, applications, programming models, language and operating system issues and a wide variety of architectural approaches. The discussions of parallel architectures include a section that describes the key concepts within a particular approach. %X Very broad coverage of architecture, languages, background theory, software, etc. Not really a book on programming, of course, but certainly a good book otherwise. %X Top-10 required reading in computer architecture to Dave Patterson. %X It is hardware oriented, but makes some useful comments on programming. %A V. A. F. Almeida %A L. W. Dowdy %A M. R. Leuze %Z Vanderbilt U. %T An Analytic Model for Parallel Gaussian Elimination on a Binary C-Cube Architecture %J The 3rd Conference on Hypercube Concurrent Computers and Applications %V II, Applications %I ACM %C Pasadena, CA %D January 1988 %P 1550-1553 %K banded and full matrix algorithms, %A V. A. F. Almeida %A I. M. M. Vasconcelos %A J. N. C. Arabe %A D. A. Menasce %T Using Random Task Graphs to Investigate the Potential Benefits of Heterogeneity in Parallel Systems %J Proceedings Supercomputing'92 %I IEEE %C Minn., MN %D November 1992 %P 683-691 %K distributed computing, %A Virgilio A.F. Almeida %A Lawrence W. Dowdy %T A Reduction Technique for Solving Queueing Network Models of Programs with Internal Concurrency %J Proceedings Supercomputing '88: Supercomputer Design: Hardware & Software %I International Supercomputing Institute, Inc. %V 3 %C St. Petersburg, FL %D 1988 %P 157-166 %K Query processing, Communications, Job Queing and Scheduling %A G. T. Almes %T Integration and Distribution in Eden %J Proceedings of the International Workshop on Computer Systems Organization %C New Orleans %D March 1983 %A G. T. Almes %A A. P. Black %A E. D. Lazowska %A J. D. Noe %T The Eden System: A Technical Review %J IEEE Transactions on Software Engineering %V SE-11 %N 1 %P 43-58 %D January 1985 %A Guy T. Almes %A Edward D. Lazowska %T The Behavior of Ethernet-Like Computer Communications Networks %J Proceedings of the 7th Symposium on Operating Systems Principles %D December 1979 %P 66-81? %K broadcast communication, local area computer networks, packet switching, distributed computer systems, supervisory system design and evaluation, benchmarking, performance, CR categories: 3.81, 4.3, 8.1 %A Guy T. Almes %T Garbage Collection in an Object-Oriented System %I Dept. of Computer Science, Carnegie-Mellon Univ. %C Pittsburgh, PA 15213 %D June 1980 %K capability, concurrency, data type, file systems, Hydra, measurements, multiprocessing, object-oriented systems, operating systems, parallel garbage collection, reference counts, C.mmp, PhD thesis, %A Guy T. Almes %A Willy Zwaenepoel %T Understanding and Exploiting Distribution %I Rice University %C Houston, TX %R Rice COMP TR85-12 %D February 1985 %A Guy T. Almes %Z Rice University, Houston, TX %T The Impact of Language and System on Remote Procedure Call Design %J 6th International Conference on Distributed Computing Systems %I IEEE Computer Society %C Los Angeles, CA %D May 1986 %P 414-421 %r TR 85-26 %d October 1985 %A Guy T. Almes %T Distributing Quicksort in a Local Area Network %J Spring COMPCON '87 %I IEEE %D February 1987 %P 18-23 %A Jan Almlof %A Donald G. Truhlar %A H. T. Davis %A Klavs F. Jensen %A Matthew Tirrell %A Terr Lybrand %T Supercomputer Chemistry at the University of Minnesota %J International Journal of Supercomputer Applications %V 2 %N 2 %D Summer 1988 %P 5-15 %A James C. Almond %T Prospects for the Effective Distribution of High Performance Computation & Associated Visualization Processes %J Proc. NCGA'91 %I National Computer Graphics Association %C Chicago %D 1991 %P 702-711 %X Manage-speak. %A K. Almquist %A R. J. Anderson %A E. D. Lazowska %Z U. Wa. %T The Measured Performance of Parallel Dynamic Programming Implementations %J Proceedings of the 1989 International Conference on Parallel Processing %V III - Algorithms and Applications %I Penn State %C University Park, Penn %D August 1989 %P III-76--III- %A H. M. Alnuweiri %A V. K. P. Kumar %T Efficient Image Computations on VLSI Architectures with Reduced Hardware %J IEEE Computer Society Workshop on Computer Architectures for Pattern Analysis and Machine Intelligence %D October 1987 %P 192-199 %K Rhighnam, algorithms, MOM, RMOT, theory %A H. M. Alnuweiri %A V. K. P. Kumar %Z USC %T Fast Image Labelling using Local Operators on Mesh-Connected Computers %J Proceedings of the 1989 International Conference on Parallel Processing %V III - Algorithms and Applications %I Penn State %C University Park, Penn %D August 1989 %P III-32--III-40 %K image processing, %T A New Class of Optimal VLSI Networks for Multidimensional Transforms %P I-449--I-456 %A Hussein M. Alnuweiri %J Proceedings of the 1990 International Conference on Parallel Processing %V I, Architecture %I Penn State U. Press %C University Park, Penn %D August 1990 %K Special-Purpose VLSI Array Processors, %A Hussein M. Alnuweiri %T Optimal Bounded-Degree VLSI Networks for Sorting in a Constant Number of Rounds %J Proceedings Supercomputing'91 %I IEEE %C Albuquerque, New Mexico %D November 1991 %P 732-739 %K processor design, %A Hussein M. Alnuweiri %A V. K. Pasanna Kumar %T Optimal Multipass Self-Routing Algorithms for Clos-Type Multistage Network %J Proceedings of the 1992 International Conference on Parallel Processing %V I, Architecture %I CRC Press %C Boca Raton, FL %D August 1992 %P I-118--I-122 %K IC networks, %A G. Aloisio %A M. Bochicchio %A C. Marzocca %Z Facolta di Ing.-Univ. di Bari, Italy %T A Heterogeneous Hypercube Based on Strengthened Nodes for a Fast Processing of SAR Raw-Data %J Proceedings of the Fifth Distributed Memory Computing Conference %V II, Architecture Software Tools, and Other General Issues %I IEEE %C Charleston, SC %D April 1990 %P 704-712 %K Other Hardware and Architectures 5th DMCC, %A N. Alon %A A. Barak %A U. Manber %T On Disseminating Information Reliably Without Broadcasting %J Proceedings 7th International Conference on Distributed Computing Systems %I IEEE %C Berlin %D September 1987 %P 74-81 %A Noga Alon %A Amnon Barak %A Udi Manber %T On Disseminating Information Reliably Without Broadcasting %I The Hebrew University of Jerusalem %C Israel %D April 1986 %A R. Alonso %A L. Cova %A K. Kyrimis %T Process Scheduling in Loosely-Coupled Computer Networks %J Proceedings from the Second Workshop on Large-Grained Parallelism %I Carnegie-Mellon University Software Engineering Institute %R Special Report CMU/SEI-87-SR-5 %E Mario R. Barbacci %C Pittsburgh, PA %D November 1987 %P 4-5 %A Rafael Alonso %A Phillip Goldman %A Peter Potrebic %T A Load Balancing Implementation for a Local Area Network of Workstations %I Princeton University %C Princeton, NJ %D January 1986 %R CS-TR-018-86 %X 1986 IEEE Workstation Technology and Systems Conference %A Rafael Alonso %T The Design of Load Balancing Strategies for Distributed Systems %I Princeton University %C Princeton, NJ %D May 1986 %R CS-TR-035-86 %X Future Directions in Computer Architecture and Software Workshop %A Rafael Alonso %A Kriton Kyrimis %T A Process Migration Implementation for a Unix System %I Princeton University %R CS-TR-092-87 %D May 1987 %A Rafael Alonso %T An experimental evaluation of load balancing strategies %R Technical Report CS-TR-112-87 %I Princeton University Department of Computer Science %D September 1987 %K Dynamic Load Balancing in Distributed Systems %A Rafael Alonso %A Luis L. Cova %Z Princeton %T Sharing Jobs Among Independently Owned Processors %J 8th International Conference on Distributed Computing Systems %I IEEE Computer Society %C San Jose, CA %D June 1988 %P 282-288 %K performance studies, load sharing, high mark, low mark policies, SUN/Ethernet experiments/4.2 BSD, poorman's distributed shell, %X Here the authors argue against the Load Sharing methods where a machine is either considered to be Idle or in Use. They propose a method called high-low where they use two threshold marks to decide on the activity of a machine. This way a machine can be underloaded ( $<$ low-mark ), normal ( between low and high) or overloaded ( $>$ high-mark ). Decisions to migrate processes are taken based on this. They conclude that this method can be used for sharing other resources too. %A B. Alpern %A M. Wegman %A F. Zadeck %T Detecting equality of variables in programs %B Fifteenth POPL %D January 1988 %O Data Flow Analysis, POPL15, %A David M. Alpern %T A Simultaneous Pascal to Parallel Control Flow Compiler %I MIT %R BS thesis %C Cambridge, MA %D May 1983 %K Concert project, simultaneous Pascal (SP) %X Concert - hierarchical RingBus slices (Ring has up to 8 slices) each containing nodes slice has what sounds like a small (8x8) cross bar nodes are 68Ks orientation is towards real-time computing $Revision: 1.2 $ $Date: 84/07/05 16:34:37 $ %A D. Alpert %A A. Averbuch %A O. Danieli %T Performance Comparison of Load/Store and Symmetric Instruction Set Architectures %J Proc. 17th Annual Symposium on Computer Architecture, Computer Architecture News %I ACM %V 18 %N 2 %D June 1990 %P 172-181 %K Instruction Sets %A P. A. Alsberg %A C. R. Mills %T The Structure of the ILLIAC IV Operating System %J Proceedings of the 2nd Symposium on Operating Systems Principles Operating Systems Review %D October 1969 %P 92-96 %K system and techniques %A N. Altman %A N. Weiderman %T Timing Variation in Dual Loop Benchmarks %R CMU/SEI-87-TR-21, ADA185697 %I Carnegie-Mellon University Software Engineering Institute %C Pittsburgh, PA %D 1987 %X Benchmarks that measure time values using a standard system clock often employ a dual loop design. One of the important assumptions of this design is that textually identical loop statements will take the same amount of time to execute. This assumption was tested on two bare computers with Ada test programs and has been demonstrated to be inaccurate in these specific test cases. %A N. Altman %T Factors Causing Unexpected Variations in Ada Benchmarks %R CMU/SEI-87-TR-22, ADA187231 %I Carnegie-Mellon University Software Engineering Institute %C Pittsburgh, PA %D 1987 %X Benchmarks are often used to describe the performance of computer systems. This report considers factors that may cause Ada benchmarks to produce inaccurate results. Included are examples from the ongoing benchmarking efforts of the Ada Embedded Systems Testbed (AEST) Project using bare target computers with several Ada compilers. %A E. Altmann %A T. A. Marsland %A T. Breitkreutz %Z U. Alberta %T Accounting for Parallel Tree Search Overheads %J Proceedings of the 1988 International Conference on Parallel Processing %V III, Algorithms and Applications %I Penn State %C University Park, Penn %D August 1988 %P 198-201 %K Non-Numeric Algorithms, loosely coupled architectures, vertex cover problem, synchronization loss, MANIP, configurations, message passing, overheads: communication, search, synchronization, master alone process, overrun method, %A G. Alverson %A R. Alverson %A D. Callahan %A B. Koblenz %A A. Porterfield %A B. Smith %T Integrated Support for Heterogeneous Parallelism %B Multithreading: A Summary of the State of the Art %E Bob Iannucci %I Kluwer %D 1992? %K tera system, shared memory multiprocessor, %A G. A. Alverson %A R. Alverson %A D. Callahan %A B. Koblenz %A A. Porterfield %A B. Smith %L %T Exploiting Heterogeneous Parallelism on a Multi-threaded Multiprocessor %J 6th ACM International Conference on Supercomputing %C Washington, D.C. %D July 1992 %P 188-197 %K tera system, shared memory multiprocessor, %A Gail A. Alverson %A William G. Griswold %A David Notkin %A Lawrence Snyder %Z U WA %T A Flexible Communication Abstraction for Nonshared Memory Parallel Computing %J Proceedings Supercomputing'90 %I IEEE %C New York, New York %D November 1990 %P 584-593 %K parallel programming, Ensemble, %A Gail A. Alverson %A David Notkin %T Abstracting Data-Represenation and Partitioning-Scheduling on Parallel Programs %E Norihisa Suzuki %B Shared Memory Multiprocessing %I MIT Press %C Cambridge, MA %D 1992 %P 315-338 %O Chap. 13. %K software system, C++, NUMA, UMA, %A R. Alverson %T Integer Division Using Reciprocals %J 10th IEEE Symposium on Computer Arithmetic %D June 1991 %P 186-190 %K tera system, %A Robert Alverson %A David Callahan %A Daniel Cummings %A Brian Koblenz %A Allan Porterfield %A Burton Smith %T The Tera Computer System %J Proceedings 1990 International Conference on Supercomputing, ACM SIGARCH Computer Architecture News %V 18 %N 3 %D September 1990 %P 1-6 %K shared memory multiprcessors, coarse grain parallel architectures, %K parallel architecture, MIMD, NUMA, pario bib %X Amsterdam, Netherlands, June 1990. %X Reproduced in David J. Lilja's (ed.) Architectural Alternatives for Exploiting Parallelism, IEEE Press, Los Alamitos, CA, 1991, page 272-. %X Interesting architecture. 3-d mesh of pipelined packet-switch nodes, e.g., 16x16x16 is 4096 nodes, with 256 procs, 512 memory units, 256 I/O cache units, and 256 I/O processors attached. 2816 remaining nodes are just switching nodes. Each processor is 64-bit custom chip with up to 128 simultaneous threads in execution. It alternates between ready threads, with a deep pipeline. Inter-instruction dependencies explicitly encoded by the compiler, stalling those threads until the appropriate time. Each thread has a complete set of registers! Memory units have 4-bit tags on each word, for full/empty and trap bits. Shared memory across the network: NUMA. [David.Kotz@Dartmouth.edu] %A K. A. Aly %A P. W. Dowd %T Reconfigurable Parallel Computer Architecture Based on Wavelength-Division Multiplexed Optical Interconnextion Network %J Parallel Processing Letters %V 2 %N 2 & 3 %D September 1992 %P 117-128 %A Khaled A. Aly %A Patrick W. Dowd %T Parallel Computer Reconfigurability Through Optical Interconnects %J Proceedings of the 1992 International Conference on Parallel Processing %V I, Architecture %I CRC Press %C Boca Raton, FL %D August 1992 %P I-105--I-108 %K multicomputer networks, %A Khaled A. Aly %A Patrick W. Dowd %T WDM Cluster Ring: A Low-Complexity Partitionable Reconfigurable Processor Interconnection Structure %J Proceedings of the 1993 International Conference on Parallel Processing %V I - Architecture %I CRC Press %C Boca Raton, FL %D August 1993 %P I-150--I-153 %K architecture, wavelength division multiplexing, M-WDM, %A M. Amamiya %A N. Takahashi %A others %T An operating system kernel mechanism for the poly-processor system PPS-R %J AFIPS Proc. of the NCC %V 49 %D 1980 %P 147-156 %K Poly-Processor System R %K bmiya, %A M. Amamiya %A R. Hasegawa %A H. Mikami %T List processing and data flow machine %R Lecture note series, No. 436 %I Research Institute for Mathematical Sciences, Kyoto, Univ. %C Japan %D September 1980 %A M. Amamiya %A K. Hakozaki %A T. Yokoi %A I. Fusaoka %A Y. Tanaka %T New Architecture for Knowledge Based Mechanisms %B Fifth Generation Computer Systems %E T. Moto-Oka %I North Holland %D 1982 %P 179-188 %A Makoto Amamiya %A Ryuzo Hasegawa %A Osamu Nakamura %A Hirohide Mikami %T A List-Processing-Oriented Data Flow Machine Architecture %J National Computer Conference \(em Proceedings %I AFIPS %V 51 %D 1982 %P 143-151 %K VALID %A Makoto Amamiya %T Parallel and Pipeline Executions in Symbol Manipulation %J Second International Conference on Supercomputing, Proceedings Supercomputing '87, Industrial Systems, Supercomputer Projects and Prototype Architectures %V I %I International Supercomputing Institute, Inc. %D 1987 %P 401-407 %A Makoto Amamiya %T A New Parallel Graph Reduction Model and Its Machine Architecture %J Proceedings of the 1987 International Conference on Parallel Processing %I Penn State %C University Park, Penn. %D August 1987 %P 46-49 %K Multiprocessor Concurrency %A Makoto Amamiya %T A New Parallel Graph Reduction Model and its Machine Architecture %E John A. Sharp %B Data Flow Computing: Theory and Practice %I Ablex Publishing %C Norwood, NJ %D 1992 %P 441-460 %A Mokoto Amamiya %A Masaru Takesue %A Ryuzo Hasegawa %A Hirohide Mikami %T Implementation and Evaluation of a List-Processing-Oriented Data Flow Machine %J Proc. 13th Annual International Symposium on Computer Architecture, Computer Architecture News %I ACM %V 14 %N 2 %D June 1986 %P 10-19 %K DFM, %X Paper has a photograph of the machine. %A J. F. Amann %T Applications of an array processor to data analysis in medium energy physics %J IEEE Trans. Nuclear Science %V NS-26 %N 4 %D August 1979 %P 4567-4568 %K blouie %A H. Amano %A T. Yoshida %A H. Aiso %T (SM)^2: Sparse Matrix Solving Machine %J Proceedings of 10th Annual International Symposium on Computer Architecture, SIGARCH Newsletter %D 1983 %V 11 %N 3 %P 213-221 %K Performance evaluation of scientific computers %X The characteristics of the problems to be solved and the behavior of the PUs will be discussed, and the optimum system configuration for the "Sparse Matrix Solving Machine" will be shown and its effectiveness will be justified through behavior analysis and simulations. %A H. Amano %A G. Kalidou %T A Batcher Double Omega Network with Combining %J Proceedings of the 1991 International Conference on Parallel Processing %V I, Architecture %I CRC Press %C Boca Raton, FL %D August 1991 %P I-718--I-719 %K poster paper, connection technology, %A Hideharu Amano %A Taisuke Boku %A Tomohiro Kudoh %A Hideo Aiso %T (SM)^2-II: A New Version of the Sparse Matrix Solving Machine %J Proceedings of the 12th International Symposium on Computer Architecture %I IEEE %D June 1985 %K Special Purpose Parallel Processors, Receiver Selected Multicast (RSM), DLOPS data driven local operating system, contention analysis, MIMD %C Boston, MA %P 100-107 %T A Fault Tolerant Batcher Network %P I-441--I-444 %A Hideharu Amano %Z CSL, Stanford U. %J Proceedings of the 1990 International Conference on Parallel Processing %V I, Architecture %I Penn State U. Press %C University Park, Penn %D August 1990 %K Fault Tolerant Interconnection Networks, %A Hirofumi Amano %A Kouichi Fukumi %A Ken'ji Imasaki %A Akifumi Makinouchi %T Design of a Programming Language for Set-Oriented Massively Parallel Processing %J Proceedings Second Parallel Computing Workshop (PCW'93) %I Fujitsu Laboratories %C Kawasaki, Japan %D November 1993 %P P2-B-1--P2-B-9 %K INADA/MPP, %K FPCRF, AP1000, %A V. Ambriola %A P. Ciancarini %A M. Danelutto %T Design and Distributed Imlmentation of the Parallel Logic Language Shared Prolog %J Proc. Second ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, ACM SIGPLAN Notices %V 25 %N 3 %D March 1990 %P 40-49 %K 2 PPOPP 2, %A John Ambrosiano %A Leslie Greengard %A Vladimir Rokhlin %T Gridless plasma simulations via the Fast Multipole Method %J Proceeding Supercomputing Projects, Applications and Artificial Intelligence %I Third International Conference on Supercomputing (ICS '88) %C St. Petersberg, FL %V 1 %D 1988 %P 334-350 %A G. M. Amdahl %A G. S. Blaauw %A F. P. Brooks, Jr. %T Architecture of the IBM System/360 %J IBM Journal of Research and Development %D April 1974 %P 87-101 %K btartar %A Gene M. Amdahl %T Validity of the single processor approach to achieving large scale computing capabilities %J AFIPS Proc. of the SJCC %V 31 %D 1967 %P 483-485 %K grecommended91, %K bmiya, %K ak, %X should be reread every week %X Well known (infamous ?) Amdahl's law that suggests that if x % of an algorithm is not parallelizable then the maximum speedup is 1/x. Limits of vectorization. Arthur Goldberg @cs.ucla.edu %A Gene M. Amdahl %T Limits of Expectation %J International Journal of Supercomputer Applications %V 2 %N 1 %D Spring 1988 %P 88-97 %K Amdahl's law, %X Amdahl's pronouncements on hypercubes (massive parallelism) and high speed circuitry like GaAs and HEMT. Should be read by every one. %A W. Ameling %T The Development and Application of Digital Differential Analyzers %B Parallel Computers, Parallel Mathematics %E M. Feilmeier %I North-Holland %D 1977 %P 31-38 %A W. Ameling %A H. Weber %A S. Hoener %T Parallel Processor Solutions for a Certain Class of Optimization Strategies %B Parallel Computers, Parallel Mathematics %E M. Feilmeier %I North-Holland %D 1977 %P 243-246 %K SMS 101, parallel numerical algorithms %A W. Ameling %A S. Hoener %A W. Roehder %T Interconnection Structures for Parallel Systems %B Parallel Computers, Parallel Mathematics %E M. Feilmeier %I North-Holland %D 1977 %P 297-300 %K multi-processors and parallel computers %X A simple look at multiplexing and bus structures. It does not look at cross bars or more sophisticated interconnections. %A Paul D. Amer %T A Measurement Center for the NBS Local Area Computer Network %J IEEE Transactions on Computers %V C-31 %N 8 %D August 1982 %P 723-729 %K broadcast network, CSMA/CD, local network, measurement, multiple access channel, performance evaluation, distributed computing %A Paul D. Amer %A Ram N. Kumar %T Local Area Broadcast Network Measurement: Traffic Characterization %J Spring COMPCON '87 %I IEEE %D February 1987 %P 64-70 %A P. America %T Design Issues in Parallel Object-oriented language %J Parallel Computing %D 1985 %A P. America %T Definition of the programming language POOL-T %R ESPRIT project 415A, Doc. Nr. 0091 %I Philips Research Labortories %C Eindhoven, the Netherlands %D Oct 1985 %A P. America %T POOL-T -- A parallel object-oriented language %I MIT Press %D 1986 %K book, text, Object-oriented concurrent programming %A Pierre America %T POOL-T: A Parallel Object-Oriented Language %B Object-Oriented Concurrent Programming %E Akinori Yonezawa %E Mario Tokoro %I MIT Press %C Cambridge, MA %D 1987 %P 199-220 %A Pierre America %T Inheritance and Subtyping in a Parallel Object-Oriented Language %B ECOOP '87--European Conference on Object-Oriented Programming %E G. Goos %E J. Hartmanis %S Lecture Notes in Computer Science %I Springer-Verlag %V 276 %D jun 1987 %P 234-242 %K k-inheritance %A W. G. Ames %A P. G. Buning %A D. A. Calahan %A D. A. Orbits %A E. J. Sesek %T Sparse Matrix and Other High-Performance Algorithms for the CRAY-1 %R SEL Report No. 124 %I University of Michigan %C Ann Arbor, MI %D January 1979 %K Ginsberg biblio: %A P. R. Amestoy %A M. J. Dayde %A I. S. Duff %T Use of Computational Kernels in the Solution of Full and Sparse Linear Equations %E Michael Cosnard %E Yves Robert %E Patrice Quinton %E Michael Raynal %B Parallel and Distributed Algorithms %I North Holland %C Amsterdam %D 1989 %P 13-19 %A Patrick R. Amestoy %A Iain S. Duff %T Vectorization of a Multiprocessor Multifrontal Code %J International Journal of Supercomputer Applications %V 3 %N 3 %D Fall 1989 %P 41-59 %Q Ametek %T Series 2010 Multicomputer %J 3rd Conference on Hypercube Concurrent Computers and Applications %V I, Architecture, Software, Computer Systems and General Issues %I ACM %C Pasadena, CA %D January 1988 %P 836-839 %K current multicomputer systems, %X Advertisement. What's this doing here? %A Alpesh Amin %A Anil Chaudhary %A P. Sadayappan %T A Parallel Approach to Solving a 3-D Finite Element Problem on a Distributed Memory MIMD Machine %J Sixth Distributed Memory Computing Conference Proceedings %I IEEE %C Portland, OR %D April/May 1991 %P 324-331 %K DMCC6, computation and algorithms, finite element methods, %A Mohammad Amini %T The Status of Supercomputing in Corporate America %J Supercomputing Review %D September 1901 %P 40-41 %A Mohammad M. Amini %A Richard S. Barr %T Network Reoptimization: A Computational Comparison of Algorithmic Alternatives %R 90-CSE-4 %I Department of Computer Science and Engineering, Southern Methodist University %C Dallas, TX 75275-0122 %D 1990 %O $3.75 %A Mohammad M. Amini %A Richard S. Barr %T Network Reoptimization: A Survey of Methodological Applications %R 90-CSE-7 %I Department of Computer Science and Engineering, Southern Methodist University %C Dallas, TX 75275-0122 %D 1990 %O $1.50 %A I. I. Amitan %A I. V. Romanovskij %T A Signal Language to Describe the Interaction of Parallel Processes %J Cybernetics %V 15 %N 1 %D January-February 1979 %P 82-89 %t Iazik signalov dlia opisania vzaimodeistvia parallel'nikh protcessov %j Kibernetika %n 1 %p 73-77 %K Maeder biblio: parallel programming %X Russian. %A Hans M. Amman %Z Univ. of Amsterdam, Netherlands %T Applying supercomputers for optimal control experiments in economics %E H. J. Te\ Riele %E Th. J. Dekker %E H. A. van\ der\ Vorst %B Algorithms and Applications on Vector and Parallel Computers %S Special Topics in Supercomputing %V 3 %I Elsevier Science Publishers B.V. (North-Holland) %C Amsterdam %D 1987 %P 373-378 %K applications, measurements, %A Hans M. Amman %Z U. Amsterdam %T Nonlinear Control Simulation on a Vector Machine %J Parallel Computing %V 10 %N 1 %D March 1989 %P 123-127 %K nonlinear control, vector processing, supercomputers, economics, %X Short communications. %A Hans M. Amman %A David A. Kendrick %T Parallel Processing for Large-Scale Non-Linear Control Experiments in Economics %J International Journal of Supercomputer Applications %V 5 %N 1 %D Spring 1991 %P 90-95 %K correspondence, %A H. H. Ammar %A S. M. R. Islam %A M. Ammar %A S. Deng %Z Clarkson U., NY %T Performance Modeling of Parallel Algorithms %J Proceedings of the 1990 International Conference on Parallel Processing %V III, Algorithms and Applications %I Penn State U. Press %C University Park, Penn %D August 1990 %P III-68--III-71 %K GSPN, Petri, stochastic, %A Hany Ammar %A Ruey-wen Liu %T Hierarchical models for parallel processing systems using generalized stochastic Petri nets %J Proceedings of the 1984 International Conference on Parallel Processing %I IEEE %D August 1984 %P 123-125 %K performance modeling %A Z. Ammarguellat %T A Control-Flow Normalization Algorithm and Its Complexity %J IEEE Transactions on Software Engineering %V SE-18 %N 3 %D March 1992 %P 237-251 %K if parallelization %A Zahira Ammarguellat %T Normalization of Program Control Flow %R CSRD Rpt. No. 885 %I University of Illinois %C Urbana-Champaign %D May 1989 %A Zahira Ammarguellat %A Luddy Harrison %Z U. Ill., Urbana-Champaign %T Issues in the Archiecture of Direct Interconnection Schemes for %J Proc. SIGPLAN 1990 %C Yorktown Heights, NY %V 25 %N 6 %D June 1990 %P 283-295 %r CSRD Report #980 %d March 1990 %A Zahira Ammarguellat %T A Control-Flow Normalization Algorithm and its Complexity %R CSRD Report #1042 %I U. Ill. %C Urbana-Champaign %D June 1990 %A P. Amodio %A L. Brugnano %T Parallel Factorizations and Parallel Solvers for Tridiagonal Linear Systems %J Linear Algebra and Its Applications %N 172 %P 347 %D 1992 %K block, algorithms, %A Claudio L. Amorim %T Simulated Performance of a Class of Vector Processors %J Second International Conference on Supercomputing, Proceedings, Supercomputer '87, Supercomputer Design, Performance Evaluation and Education %V III %I International Supercomputing Institute, Inc. %D 1987 %P 350-358 %A O. Amyay %A G. Juanole %A S. Zwecker %T An Epistemic Logic Based Synthesis of Communication Services and Protocols %J 12th International Conference on Distributed Computing Systems %I IEEE %C Yokohama, Japan %D June 1992 %P 674-681? %K Distributed Artificial Intelligence %A B. T. An %A E. Gelenbe %T Near Optimal Behavior of the Packet Switch Broadcast Channel %J Computer Software and Applications Conference (COMPSAC78) %I IEEE %D November 1978 %P 728-733 %K distributed processing %A G. Anagnostou %A Y. Maday %A A. T. Patera %A P. F. Fischer %A E. M. Ronquist %T Numerical Simulation of Incompressible Fluid Flows %E Paul Messina %E Almerico Murli %B Practical Parallel Computing %J A.K.A. Concurrency -- Practice and Experience %V 3 %N 6 %I John Wiley and Sons %C New York %D 1992 %P 667-686? %A George Anagnostou %A Einar Ronquist %A Anthony T. Patera %T A Computational Procedure for Part Design %E Jill P. Mesirov %B Very Large Scale Computation in the 21st Century %I SIAM %C Philadelphia, PA %D 1991 %P 178-203 %K engineering, %A A. L. Ananda %A B. Srinivasan %T An Extensive Bibliography on Computer Networks %J Computer Communications Review (USA) %V 13,14 %N 1,5 %P 78-98 %O 478 REFS Treatment BIBLIOGRAPHY/LITERATURE SURVEY, GENERAL OR REVIEW %D January 1984 %K computer networks reviews data communication computer networks bibliography %X One of the prime problems faced by the researchers and designers in a rapidly expanding area is the complete awareness of the work carried out by other researchers. The problem is compounded when technology itself changes rapidly. This precisely is the case in the area of data communication and computer networks. The compilation of this bibliography attempts to collect various research papers that are published in this area. In order to keep the collection within the manageable proportions, only prominent, pioneering and historical works appeared in well known journals which are easily available to the researchers and implementers are reported. It is likely that there might have been some omissions because of the selective nature of the reference, but it does not imply that they are by no means unimportant, one can hope that a complete compilation will be available in the near future. A crude copy was posted to the Usenet in August 1985. We are trying to integrate it into this file. %A R. Ananthanarayanan %A Mustaque Ahamad %A Richard J. LeBlanc %Z College of Computing, Georgia Institute of Technology %T Application Specific Coherence Control for High Performance Distributed Shared Memory %J Symposium for Experiences with Distributed and Multiprocessor Systems %I Usenix %D March 1992 %P 109-128 %K SEDMS III, Distributed Shared Memory, %A R. Ananthanarayanan %A Mustaque Ahamad %A Richard J. LeBlanc %T Coherence, Synchronization and State-sharing in Distributed Shared-memory Applications %J Proceedings of the 1993 International Conference on Parallel Processing %V I - Architecture %I CRC Press %C Boca Raton, FL %D August 1993 %P I-324--I-331 %A T. S. Anantharaman %A R. Bisiani %T Computer Architectures for Speech Recognition %B The Characteristics of Parallel Algorithms %I MIT Press %C Cambridge, MA %E Leah H. Jamieson %E Dennis B. Gannon %E Robert J. Douglass %D 1987 %K Application Domain Characterizations of Parallelism %P 169-190 %A Mark S. Anastas %A Russell F. Vaughan %T Parallel Transition Machines %J Proceedings of the 1979 International Conference on Parallel Processing %D August 1979 %P 76-85 %K Models and Analysis of Parallel Computation %A Thomas A. Anastasio %T A Critical Survey of the Literature on Mapping Static Dataflow Programs by Level %R SRC-TR-91-040 %I Supercomputing Research Center, IDA %C Bowie, MD %D August 1991 %K critical path, mapping, dataflow, scheduling, %A Thomas A. Anastasio %A William W. Carlson %T An Observation of the C Library Procedure random() %R SRC-TR-91-044 %I Supercomputing Research Center, IDA %C Bowie, MD %D September 1991 %K C, random, %A Kasi Anatha %A Fred Long %T Code Compaction for Parallel Architectures %J Software-Practice and Experience %V 20 %N 6 %D June 1990 %P 537-554 %A P. Ancilotti %A N. Lijtmaer %A M. Boari %A A. Natali %T Linguistic Mechanisms for Resource Management Strategies %J Software Practice and Experience %V 11 %N 3 %D March 1981 %P 291-314 %A Massimo Ancona %A Gabriella Dodero %A Vittoria Gianuzzi %A Andrea Clematis %A Eduardo B. Fernandez %T A System Architecture for Fault Tolerance in Concurrent Software %J Computer %V 23 %N 10 %D October 1990 %P 23-32 %K special issue on dependability modelling for multiprocessors recovery meta program %A Birger Andersen %T Hypercube Experiments with Joyce %J ACM SIGPLAN Notices %V 24 %N 8 %D August 1989 %P 13-22 %A Flemming Andersen %A Kim Dam Petersen %T Recursive Boolean Functions in HOL %J 1991 International Workshop on the HOL Theorem Proving System and its Applications %I IEEE Computer Society %D August 1991 %P 367-377 %A Flemming Andersen %T A Theorem Prover for UNITY in Higher Order Logic %R PhD thesis %I Technical University of Denmark %D March 1992 %K verification, theorem proving, %A Flemming Andersen %T A Theory for UNITY in The Cambridge HOL System %R TFL LD 1992-9 %I TFL - Telecommunications Research Laboratory %D March 1992 %A Vidar S. Andersen %A Torstein Haugland %A Oddvar Sorasen %T CESAR - A Programmable Systolic Array Multiprocessor System %J Problems in Designing Supercomputers: Technologies and Devices SCS 85, First International Conference on Supercomputing Systems %I IEEE Computer Society %P 8-15 %K Problems in Designing Supercomputers: Technologies and Devices %A Mark S. Andersland %A Thomas L. Casavant %T Recovering Uncorrupted Event Traces from Corrupted Event Traces in Parallel/Distributed Computing Systems %J Proceedings of the 1991 International Conference on Parallel Processing %V II, Software %I CRC Press %C Boca Raton, FL %D August 1991 %P II-108--II-112 %K performance evaluation, concise paper, %A Charles W. Anderson %T Learning and Problem Solving with Multilayer Connectionist Systems %R TR 86 5 %I COINS Dept, University of Mass. %C Amherst %D 12/31/1986 %K Ph.D. Thesis %A D. Anderson %T Experience with Flamingo: A Distributed, Object-Oriented User Interface System %J Object-Oriented Programming Systems, Languages and Applications Conference Proceedings %D September 1986 %K oopsla86 %A D. A. Anderson %T Operating Systems %J Computer %I IEEE %V 14 %N 6 %D June 1981 %P 69-82 %X A survey, simpler than Computing Surveys articles. Reproduced in "Distributed Computing: Concepts and Implementations" edited by McEntire, O'Reilly and Larson, IEEE, 1984. %A D. P. Anderson %T A Software Architecture for Network Communication %R Rept. No. UCB/CSD 87/386 %I University of California %C Berkeley %D December 1987 %A D. P. Anderson %A D. Ferrari %A P. V. Rangan %A B. Sartirana %T A Protocol for Secure Communication in Large Distributed Systems %R Rept. No. UCB/CSD 87/342 %I University of California, Berkeley %D February 1987 %A D. P. Anderson %A S. Y. Tzou %A R. Wahbe %A R. Govindan %A M. Andrews %T Support for Continuous Media the DASH System %J Proc. 10th International Conference on Distributed Computing Systems %I IEEE %C Paris, France %D May-June 1990 %P 54-61 %X \fBAbstract:\fP Future distributed systems will support \fIcontinuous media\fP such as digital audio and video, allowing user programs to convert, process, store, and communicate continuous-media data. The DASH project is building an experimental kernel for such a system. We have defined the \fIDASH resource model\fP as a basis for reserving and scheduling resources (disk, CPU, network, etc.) involved in end-to-end handling of continuous media data. The model uses primitives that express workload characteristics and performance requirements, and defines an algorithm for negotiated reservation of distributed resources. This algorithm is embodied in the Session Reservation Protocol (SRP), defined in the DoD Internet protocol family. %A D. P. Anderson %A P. Chan %T Comet: A Toolkit for Multiuser Audio/Video Applications %J 12th International Conference on Distributed Computing Systems %I IEEE %C Yokohama, Japan %D June 1992 %P 555-561? %K Computer-Supported Cooperative Work %A D. W. Anderson %A F. J. Sparacio %A R. M. Tomasulo %T The IBM System/360 Model 91: Machine Philosophy and Instruction Handling %J IBM Journal of Research and Development %V 11 %N 1 %D January 1967 %P 8-24 %K btartar %A Dan Anderson %Z NCAR %T The Distributed Computing Environment at NCAR %J Cray User Group 1988 Spring Proceedings %C Minneapolis, MN %D 1988 %P 393-394 %K 21st Meeting, %A Dan Anderson %T The Distributed Computing Environment at NCAR %J 1988 Spring Proceedings Cray User Group Meeting %I CUG %D Spring 1988 %P 393-394? %K graphics, %A Dan Anderson %A Linda Sattler %T Effective Storage and Communication Schemes for Implementation of the Conjugate Gradient Method on an Intel iPSC/860 %J Sixth Distributed Memory Computing Conference Proceedings %I IEEE %C Portland, OR %D April/May 1991 %P 510-513 %K DMCC6, computation and algorithms, short papers, solvers, %A David P. Anderson %A Domenico Ferrari %T The DASH Project %J ACM SIGOPS Workshop on Distributed Systems %C Amsterdam %D SEP 1986 %X Very early position paper. Superceded. %A David P. Anderson %A P. Venkat Rangan %T A Basis for Secure Communication in Large Distributed Systems %J IEEE Symposium on Security and Privacy %D APR 1987 %O Also Technical Report 87/328, UC Berkeley CS Division %X Describes the DASH scheme for network security. Security principals (hosts, owners, etc.) are authenticated by PKE, and public keys are distributed by a hierarchical name server. Host-to-host channels (which use SKE) are established as needed. %X Owners are authenticated (using PKE signatures) across these channels, and kernels maintain "authentication caches" to avoid repeating this procedure. It is argued that this "subtransport-level" security mechanism is more efficient than higher-level mechanisms. %X The basic idea of the design is used in the current DASH system, but many of the details have changed. %A David P. Anderson %A P. Venkat Rangan %T High-Performance Interface Architectures for Cryptographic Hardware %J Eurocrypt '87 %C Amsterdam %D APR 1987 %X Assuming that a fast encryption chip is available, where is the best place to put it in a system architecture? The goals are to reduce CPU overhead and I/O bus bandwidth. %A David P. Anderson %A Domenico Ferrari %A P. Venkat Rangan %A Bruno Sartirana %Z University of California, Berkeley %T The Empirical Evaluation of a Security-Oriented Datagram Protocol %J IFIP Performance '87 %C Brussels %D DEC 1987 %r Rept. No. UCB/CSD 87/350 %d April 1987 %X Similar to TR 87/328, with additional performance measurements. %A David P. Anderson %A Domenico Ferrari %A P. Venkat Rangan %A Shin-Yuan Tzou %T The DASH Project: Issues in the Design of Very Large Distributed Systems %R Technical Report 87/338 %I UC Berkeley CS Division %D JAN 1987 %X Early position paper. Main points: 1) technological trends point to large scale (global) and high network performance; 2) distributed system research should anticipate and study the new opportunities (multimedia communication, massive distributed parallelism) and problems (security, high network delay, etc.) arising from this change; 3) optimal solutions often involve integration between system levels (network design, process scheduling, VM), which may justify discarding existing standards and starting over. %A David P. Anderson %A Domenico Ferrari %A P. Venkat Rangan %T Subtransport Level: The Right Place for End-to-End Security Mechanisms %R Rept. No. UCB/CSD 87/346 %I University of California, Berkeley %D March 1987 %X Cleaned-up version of TR 87/328. %A David P. Anderson %A Domenico Ferrari %T The DASH Project: An Overview %R Technical Report 88/405 %I UC Berkeley CS Division %D February 1988 %X Snapshot of the project as of 1/88. The basic design of the system (real-time kernel, VM system, channel-based IPC architecture) is described. Somewhat sketchy, since implementation was still at an early stage. %A David P. Anderson %Z UC Berkeley %T A Software Architecture for Network Communications %J 8th International Conference on Distributed Computing Systems %I IEEE Computer Society %C San Jose, CA %D June 1988 %P 376-383 %K protocols for reliable real-time systems, real-time message streams (RMS), DASH, transport, queueing, multiplexing, %O Also Technical Report 87/386, UC Berkeley CS Division %X Also UCBTR 87/386 Explores the idea of basing a communication architecture on "channels" with meaningful performance, reliability, security parameters. Calls them "real-time message streams (RMS)"; later changed to "channels". Superceded by TR 89/498. %A David P. Anderson %T Automated Protocol Implementation with RTAG %J IEEE Transactions on Software Engineering %V SE-14 %N 3 %D March 1988 %P 291-300 %K Attribute grammars, communication protocols, formal specification %A David P. Anderson %A Shin-Yuan Tzou %T The DASH Local Kernel Structure %R Technical Report 88/463 %I UC Berkeley CS Division %D NOV 1988 %X Design document for the DASH kernel. Describes process scheduling (multiprocessor deadline scheduling), kernel message-passing, timers, synchronization, user program interface (message-passing, object references, system calls). Network communication and the VM system are described in two other TR's. All three design documents just present and describe the C++ interfaces; no discussion or comparison with other systems. %A David P. Anderson %A Robert Wahbe %T The DASH Network Communication Architecture %R Technical Report 88/462 %I UC Berkeley CS Division %D NOV 1988 %X Design document for the DASH network communication architecture. This is based on the abstraction of simplex "channels" with performance, reliability and security parameters. The abstraction is used at several levels; at higher levels the delay parameters include CPU processing time. A "subtransport layer" manages local resources, does multiplexing and caching, and does security and reliability functions. Slightly out-of-date; channel parameters have been changed, and the management protocol used by the ST layer now recursively calls a higher-level RPC facility. %A David P. Anderson %A Shin-Yuan Tzou %A G. Scott Graham %T The DASH Virtual Memory System %R Technical Report 88/461 %I UC Berkeley CS Division %D NOV 1988 %X Design document for the DASH VM system. Basic ideas: use different mechanisms (and different fixed regions of each VAS) for the different VM functions: private read/write data, shared read-only data, and IPC buffers. %A David P. Anderson %A Robert Wahbe %T A Framework for Multimedia Communication in a General-Purpose Distributed System %J Technical Report 89/498 %I UC Berkeley CS Division %D MAR 1989 %X Motivates the design given in TR 88/462, gives some comparisons, and discusses implications for protocol and local system design. Description of channel parameters supercedes TR 88/462. %A David V. Anderson %T Avoiding Common Errors in Multitasking %J The NMFECC Buffer %V 10 %N 11 %D November 1986 %P 12-14 %K Debugging, Cray X-MP, %X The identification of problems, no real solutions. %A E. Anderson %A Y. Saad %T Solving Sparse Triangular Linear Systems on Parallel Computers %R CSRD TR #794 %I Ctr. for Supercomputing Res. and Develop., U. Ill. %C Urbana, Ill. %D June 1988 %A E. Anderson %A Z. Bai %A J. Dongarra %A A. Greenbaum %A A. McKenney %A J. Du\ Croz %A S. Hammarling %A J. Demmel %A C. Bischof %A D. Sorensen %T LAPACK: A Portable Linear Algebra Library for High-Performance Computers %J Proceedings Supercomputing'90 %I IEEE %C New York, New York %D November 1990 %P 2-11 %K linear algebra algorithms, %A E. J. Anderson %A M. Ferris %T Parallel Genetic Algorithms in Optimization %J Proc. of the 4th SIAM Conf. on Parallel Processing for Scientific Comp. %D 1989 %A Ed Anderson %A Annamaria Benzoni %A Jack Dongarra %A Steve Moulton %A Susan Ostrouchov %A Bernard Tourancheau %A Robert van\ de\ Geijn %T LAPACK for Distributed Memory Architectures: Progress Report" %J Proceedings of the Fifth SIAM Conference on Parallel Processing for Scientific Computing %C Houston %D 1991 %X Abstract: We describe an ongoing project that investigates the reusability of LAPACK code for distributed memory MIMD architectures. Related projects are described and experience with the Intel iPSC/860 is reported. %A Ed Anderson %A Annamaria Benzoni %A Jack Dongarra %A Steve Moulton %A Susan Ostrouchov %A Bernard Tourancheau %A Robert van\ de\ Geijn %T Basic Linear Algebra Communication Subprograms %J Sixth Distributed Memory Computing Conference Proceedings %I IEEE %C Portland, OR %D April/May 1991 %P 287-290 %K DMCC6, software technology and tools, short papers, routing, %A Edward Anderson %A Youcef Saad %T Preconditioned Conjugate Gradient Methods for General Sparse Matrices on Shared Memory Machines %E Garry Rodrigue %B Parallel Processing for Scientific Computing %I SIAM %C Philadelphia, PA %D 1989 %P 88-92 %K matrix computations, %A Edward Anderson %A Youcef Saad %T Solving Sparse Triangular Linear Systems on Parallel Computers %J International Journal of High Speed Computing %V 1 %N 1 %D May 1989 %P 73-95 %K triangular systems, parallel algorithms, level scheduling, jagged diagonal storage %A Edward Charles Anderson %T Parallel Implementation of Precoditioned Conjugate Gradient Method for Solving Sparse Systems of Linear Equations %R CSRD TR #805 %I Ctr. for Supercomputing Res. and Develop., U. Ill. %C Urbana, Ill. %D August 1988 %K masters thesis, %A G. A. Anderson %T Multiple Match resolvers: A New Design Method %J IEEE Transactions on Computers %D Dec. 1974 %P 1317-1320 %K btartar %A George A Anderson %A Richard Y. Kain %T A content-addressed memory designed for data base applications %J Proceedings of the 1976 International Conference on Parallel Processing %D August 1976 %I IEEE %P 191-195 %K STARAN and related topics %A George A. Anderson %T Interconnecting a distributed processor system for avionics %J Proc. 1st Ann. Symp. on Computer Architecture %I IEEE %C Gainesville, Florida %D 1973 %K Rwa, %X Must determine page numbers, etc. %A George A. Anderson %A E. Douglas Jensen %T Computer Interconnection: Taxonomy, Characteristics and Examples %J Computing Surveys %V 7 %N 4 %D December 1975 %P 197-213 %K distributed processing, distributed computers, multiprocessors, multicomputer bus structures, computer networks CR categories: 3.81, 4.32, 6.20 maeder biblio: architecture %K bsatya %X Reprinted in "Tutorial: Distributed Processing," IEEE, compiled by Burt H. Liebowitz and John H. Carson, 1981, 3rd edition. %X * This paper presents a taxonomy, or naming scheme, for systems of interconnected computers. %A George L. Anderson %A K. Bartlett %T Hardware allocation of data system resources %J Computer Design %V 13 %N 7 %D July 1974 %P 89-97 %K multiprocessor architectures and operating systems. %K bsatya %A H. Stephen Anderson %Z OSCP, OSC %T Distributed Supercomputer Graphics Using UNIX Tools %J Proc. Workshop on UNIX and Supercomputers %I Usenix Assoc. %C Pittsburgh, PA %D Sept. 1988 %P 25-32 %K distributed visualization, network, animation, apE, chimp, remote shells, filters, Convex, Cray X-MP, %A H. Stephen Anderson %A John Andrew Berton, Jr. %A Peter G. Carswell %A John C. Donkin %A D. Scott Dyer %A Jeffery T. Faust %A Barbara Helfer-Dean %A Jill L. Kempf %A Jeffery B. Light %A Robert E. Marshall %A Michelle D. Messenger %A Steven N. Spencer %Z OSU %T apE: A Basis for Visualization and Animation of Scientific Data %J Proceedings Fifth Convex User Group Worldwide Conference %C Richardson, TX, USA %D May 1990 %P Session 7 %K paper, %X Title looks like a TOG paper. %A J. P. Anderson %T Program Structures for Parallel Processing %J Communications of the ACM %V 8 %N 12 %D December 1965 %P 786-788 %K maeder biblio: parallel programming, concurrency, synchronization, %A J. Wayne Anderson %T Portable Standard LISP on the CRAY %B New Computing Environments: Parallel, Vector and Systolic %I SIAM %E Arthur Wouk %D 1986 %P 100-106 %A James A. Anderson %A Edward J. Wisniewski %A Susan R. Viscuso %T Software for Neural Networks %J Computer Architecture News %V 16 %N 1 %D March 1988 %P 26-36 %A James B. Anderson %T Quantum Chemistry by Random Walk %E Jill P. Mesirov %B Very Large Scale Computation in the 21st Century %I SIAM %C Philadelphia, PA %D 1991 %P 73-76 %A James H. Anderson %A Mohamed G. Gouda %T Atomic Semantics of Nonatomic Programs %R TR-87-2 %I CS Dept., Univ. Texas %C Austin, TX %D March 1988 %X We argue that it is possible, and sometimes useful, to reason about nonatomic programs within the conventional atomic model of concurrency. %A Judy M. Anderson %A William S. Coates %A Alan L. Davis %A Robert W. Hon %A Ian N. Robinson %A Shane V. Robison %A Kenneth S. Stevens %T FAIM-1: The General Architecture %I Schlumberger Palo Alto Research %C Palo Alto, CA %R TR-61 %D April 1986 %K OIL, Hectogon, 19 processor prototype, SPAR, %A Judy M. Anderson %A William S. Coates %A Alan L. Davis %A Robert W. Hon %A Ian N. Robinson %A Shane V. Robison %A Kenneth G. Stevens %T The Architecture of FAIM-1 %J Computer %V 20 %N 1 %D January 1987 %P 55-65 %A M. Anderson %A R. D. Pose %A C. S. Wallace %T A Password-Capability System %J The Computer Journal (British) %V 29 %N 1 %P 1-8 %D February 1986 %K capabilities, multiprocessor %A M. Anderson %A F. Berman %T Removing Useless Tokens for a Dataflow Computation %J Proceedings of the 1987 International Conference on Parallel Processing %I Penn State %C University Park, Penn. %D August 1987 %P 614-617 %K Architecture %A Mark Anderson %A Francine Berman %T Removing Useless Tokens from a Dataflow Computation %E John A. Sharp %B Data Flow Computing: Theory and Practice %I Ablex Publishing %C Norwood, NJ %D 1992 %P 292-331 %X Similar to ICPP87 paper. %A P. Anderson %A D. Bolton %A P. Kelly %T Paragon Specifications: Structure, Analysis and Implementation %E D. Etiemble %E J.-C. Syre %B PARLE '92, Parallel Architectures and Languages Europe %S LNCS %V 605 %I Springer-Verlag %C Berlin %D 1992 %P 783-800? %K implementation of parallel languages, %A Paul B. Anderson %A Judith L. Flippen-Anderson %T A Crystallographic Application for the Connection Machine %J Proceeding Supercomputing Projects, Applications and Artificial Intelligence %I Third International Conference on Supercomputing (ICS '88) %C St. Petersberg, FL %V 1 %D 1988 %P 260-268 %A Richard Anderson %T The Complexity of Parallel Algorithms %I Stanford University %C Stanford, CA %R STAN-CS-86-1092 %D November 1985 %K P-RAM, EREW, CREW, CRCW, circuit value problem, P-complete, NP-complete, graph problems, %A Richard Anderson %A Ernst Mayr %T Parallel and Greedy Algorithms %E Franco P. Preparata %B Advances in Computing Research, Parallel and Distributed Computing %V 4 %I JAI Press, Inc. %C Greenwich, Conn. %D 1987 %P 17-38 %A Richard Anderson %A Ashfaq A. Munshi %A Barbara Simons %T Scheduling Sequential Loops on Parallel Processors %I University of Washington %D No Date (not much information) %A Richard E. Anderson %A Roger G. Grimes %A Horst D. Simon %T Performance Comparison of the CRAY X-MP/24 with SDD and the CRAY-2 %J The Journal of Supercomputing %V 1 %N 4 %D August 1988 %P 409-419 %X They ran two 1-D and one 2-D FFTs (along with 21 other benchmarks). %A Richard J. Anderson %A Ernest W. Mayr %A Manfred K. Warmuth %T Parallel Approximation Algorithms for Bin Packing %J Information and Computation %N 82 %D 1989 %P 262-277 %K parallel knapsack, %X Theoretical. %A Roger E. Anderson %T Mini-Supercomputing Approach to Supercomputing %J Second International Conference on Supercomputing, Proceedings Supercomputing '87, Industrial Supercomputer Applications and Computations %V II %I International Supercomputing Institute, Inc. %D 1987 %P 48 %A Roger E. Anderson %T High Performance Parallel Architectures %J Proc. Supercomputing '89 %I ACM %C Reno, NV %D November 1989 %P 410-415 %K Architectures, %A Steven Anderson %A Marina C. Chen %T Parallel Branch-and-Bound Algorithms on the Hypercube %B Hypercube Multiprocessors 1987 %I SIAM %C Philadelphia %D 1987 %P 309-317 %K parallel chess, %X ANALYSE DU BRANCH AND BOUND ET DE SA PARRALELISATION. %A T. E. Anderson %Z U. Wa. %T The Performance Implications of Spin-Waiting Alternatives for Shared-Memory Multiprocessors %J Proceedings of the 1989 International Conference on Parallel Processing %V II - Software %I Penn State %C University Park, Penn %D August 1989 %P II-170--II-174 %K operating systems and synchronization, %A T. E. Anderson %A B. N. Bershad %A E. D. Lazowska %A H. M. Levy %T Scheduler Activations: Effective Kernel Support for the User-Level Management of Parallelism %J PROC of the Thirteenth SOSP %V 25 %N 5 %C Pacific Grove, CA %D 14-16 October 1991 %P 95-109 %O In \f2\&OSR 25\fP:5; revised version to appear in \f2\&TOCS\P %Z uwash %A Tera Lougenia Anderson %Z Univ. of Washington %T The Database Semantics of Time %I UMI %C Ann Arbor, MI %D 1981 %R PhD thesis. %A Thomas E. Anderson %A Edward D. Lazowska %A Henry M. Levy %T The Performance Implications of Thread Management Alternatives for Shared Memory Multiprocessors %R TR 88-09-04 %I Department of Computer Science, University of Washington %D 1988 %X This report examines five different data structure and locking alternatives for threads ("light weight" processes), and three different spin lock strategies. We present measurement data from an implementation of each of these on a Sequent Symmetry 81 with 20 processors. We also present analytic modelling results, to confirm the validity of our explanations for the observed behavior, and to extrapolate the results to environments that we were unable to measure (e.g., larger numbers of processors). %A Thomas E. Anderson %A Edward D. Lazowska %A Henry M. Levy %Z DCS, University of Washington, Seattle, WA %T The Performance Implications of Threaded Management Alteratives for Shared-Memory Multiprocessors %J Performance'89, ACM SIGMETRICS, Performance Evaluation Review %V 17 %N 1 %D 1989 %P 49-60 %d September 1988 %r 88-09-04 %K multiprocessor, thread, locking, performance, parallel software, parallel computing, synchronization, communication, %A Thomas E. Anderson %T The Performance of Spin Lock Alternatives for Shared-Memory Multiprocessors %J IEEE Transactions on Parallel and Distributed Systems %V PDS-1 %N 1 %D January 1990 %P 6-16 %K architecture, cache coherence, locking, multiprocessor, performance, %A Thomas E. Anderson %A Henry M. Levy %A Brian N. Bershad %A Edward D. Lazowska %Z University of Washington %T The Interaction of Architecture and Operating System Design %J Fourth International Conference on Architectural Support for Programming Languages and Operating Systems %C Santa Clara, California %D April 1991 %K Architectural Support For Operating Systems %A Thomas Edward Anderson %T Operating System Support for High Performance Multiprocessing %R TR \# 91-08-10 %I University of Washington, Department of Computer Science \& Engineering %C Seattle, WA %D 1991 %X This dissertation concerns operating system support for high performance parallel applications on shared-memory multiprocessors. %X A primary motivation behind building multiprocessors is to increase a system's peak processing power at relatively low cost. Multiprocessors lose their advantage, however, if this added processing power is not effectively utilized, and it has proven difficult in practice to get good performance from parallel applications. %X In this dissertation, I argue that this is in part due to poor support for high performance parallel programs in traditional operating systems, and I describe techniques that address some of the problems that have limited multiprocessor system performance. %X First, I examine the performance implications of several data structure and algorithm alternatives for thread management. I show that for applications with fine-grained parallelism, small differences in thread management have a significant performance impact, often posing a tradeoff between throughput and latency. Per-processor data structures can be used to improve throughput, and in some circumstances to improve latency as well. %X Second, I show that normal methods of spin (or ``busy") waiting for criticalresources can substantially degrade the performance of processors doing useful work. I present two methods that largely eliminate this effect: an Ethernet-style backoff algorithm and a novel method of explicitly queueing spinning processors in software. %X Third, I argue that traditional operating system kernels do not appropriately support high performance thread management, yielding either inefficient threads or poor integration of threads with multiprogramming, I/O, and virtual memory. I describe a new kernel interface and user-level thread package that together provide high performance threads that behave correctly in the presence of these services. %X Fourth, even with an efficient and correctly behaving thread system, initialimplementations of parallel programs typically yield disappointing performance. I describe a parallel program tuning tool and novel metric, normalized processor time, that together efficiently capture what is important to parallel performance. %X The viability and performance of these techniques have been demonstrated by implementations on the Sequent Symmetry and DEC Systems Research Center Firefly multiprocessors. %A Thomas Lee Anderson %T The Design of a Multiprocessor Development System %R MIT/LCS/TR-279 %I MIT %C Cambridge, MA 02139 %D September 1982 %K multiprocessor systems, segmented computer buses, parallel processing, computer architecture, Concert project, %A Sten Andler %T Predicate Path Expressions %J Sixth Annual ACM Symposium on Principles of Programming Languages %C San Antonio, Texas %D 1979 %P 226-236 %K k-path-expressions, k-predicate-path-expressions, POPL6, %X This paper describes the usage of Predicate Path Expressions, their formal semantics and an efficient implementation. %A A. Ando %A P. Beaumont %A M. Ando %T Efficiency of the CYBER 205 for Stochastic Simulations of Simultaneous, Nonlinear, Dynamic Econometric Model %J The international journal of supercomputer applications %V 1 %N 2 %D Winter 1987 %P 54-81 %A C. Andre %A P. Armand %A F. Boeri %T Synchronic Relations and Applications in Parallel Computation %J Digital Processes %V 5 %D 1979 %P 99-113 %K maeder biblio: parallel programming, concurrency, synchronisation, %A F. Andre %A J. P. Banatre %A J. P. Routeau %T A Multiprocessing Approach to Compile-Time Symbol Resolution %J ACM Transactions on Programming Languages and Systems %V 3 %N 1 %D January 1981 %P 11-23 %K Multiprocessing, compilation, control structures, parallelism, events, processes, nondeterminism CR Categories: 4.12, 4.22, 4.32 %A F. Andre %A J. P. Verjus, ed. %T Hypercube and Distributed Computers %I North-Holland %C Amsterdam %D 1989 %K book, text, %X Conference on European Hypercube and Distributed Computers %A Francoise Andre %A Daniel Herman %A Jean-Pierre Verjus %T Synchronization of Parallel Programs %I MIT Press %C Cambridge, MA %D 1985 %K book, text, %K k-synchronisation, k-synchronisation-counters, Comandos, %X Translated from the French. In a slim volume, they capture the history, essence and application of all the current synchronisation techniques and implement these in Ada. The example of the swimming pool is very good! %X A gem. %X Original French language edition (Synchronisation de Programmes Parall\`{e}les, Dunod) \(co BORDAS 1983. Also published in England: North Oxford Academic. %X A whole book on using boolean expressions as a means of expressing synchronisation constraints. This book seems to have provided a basis for the Activation Conditions of the Guide language Comandos. %A Francoise Andre %A Jean-Louis Pazat %A Hnery Thomas %Z IRISA %T Data Distribution in Pandore %J Proceedings of the Fifth Distributed Memory Computing Conference %V II, Architecture Software Tools, and Other General Issues %I IEEE %C Charleston, SC %D April 1990 %P 1115-1119 %K Automatic Exploitation of Parallelism, DMCC5, %A Francoise Andre %A Jean-Louis Pazat %A Henry Thomas %T Pandore: A System to Manage Data Distribution %I IRISA %R Rapport de Recherche 519 %D February 1990 %A Francoise Andre %A Jean-Louis Pazat %A Henry Thomas %T Pandore: A System to Manage Data Distribution %I INRIA %R Rapport de Recherche 1195 %D March 1990 %A Francoise Andre %A Jean-Louis Pazat %A Henry Thomas %T Pandore: A System to Manage Data Distribution %J Proceedings 1990 International Conference on Supercomputing, ACM SIGARCH Computer Architecture News %V 18 %N 3 %D September 1990 %P 380-388 %K compilers, systems, DMPC, %X Amsterdam, Netherlands, June 1990. %A Francoise Andre %A Olivier Cheron %A Jean-Louis Pazat %T Compiling Sequential Programs for Distributed Memory Parallel Computers with Pandore II %R TR 651 %I IRISA/INRIA %D April 1992 %A Francoise Andre %A Olivier Cheron %A Jean-Louis Pazat %A Henry Thomas %T Efficient Code Generation for Distributed Memory Machines %B Parallel Computing '91 %I Parallel Computing Society, Elsevier Science Publishers B.V. %D September 1992 %K PANDORE II, %A J. -P. Andre %A J. -C. Petit %T GALAXIE: A Reconfigurable Network of Processors with Distributed Control %J 2nd International Conference on Distributed Computing Systems %I IEEE %C Paris, France %D April 1981 %P 86-94 %K Architecture %A Clay Andreason %T Batch Jobs on UNICOS %J Proceedings CUG %I Cray User Group %D Spring 1986 %P 43-54 %A G. Andreoni %A V. Saletti %T Direct connection of a mainframe to a packet switched network by use of a microprocessor based protocol converter: the performance aspect %Z CREI-Politecnico di Milano, Italy %J Int. J. Mini & Microcomput. (USA) %V 5 %N 3 %P 40-43 %O 5 REFS. Treatment PRACTICAL %D 1983 %K computer networks computer interfaces protocols packet switching data communication equipment converters packet switched network microprocessor based protocol converter performance Sperry Univac 1100/80 mainframe X.25 network link level hardware interface bit oriented protocols sublayering Z80 processor SIO 2 LSI chip throughput Euronet communication %X The way in which a specific problem of connecting a large Sperry Univac 1100/80 mainframe to an X.25 network has been solved by means of a microprocessor based device is described. The problem arises at the link level, because the hardware interface available does not have the capability of handling bit-oriented protocols. After a general description, the paper first shows how the problem can be properly handled, from the architectural point of view, with a sublayering of the said level. Then a brief description of the functionalities in the microprocessor device is given, followed by an overview of the implementation based on an Z80 processor and an SIO-2 LSI chip. Finally, the paper reports some considerations on the modalities for the insertion of this device, in order to minimise the impact on the throughput of the mainframe. Some figures of the performances achieved with the host connected to the node of Euronet in Rome by means of this device are reported. The conclusion underlines how microprocessor devices can help in solving, in a cheap and effective way, communication problems otherwise very difficult to manage %A Michael J. Andrescavage %T Framework: a General Purpose, Heterogeneous, Distributed Concurrent/Parallel Processing Architecture %J Proceedings of the 1991 International Conference on Parallel Processing %V II, Software %I CRC Press %C Boca Raton, FL %D August 1991 %P II-258--II-259 %K poster paper, %A Steinar Andresen %T The Looping Algorithm Extended to Base 2^t: Rearrangeable Switching Networks %J IEEE Transactions on Communications %V COM-25 %N 10 %D October 1977 %P 1057-1063 %X Reproduced in the 1984 tutorial: "Interconnection Networks for parallel and distributed processing" by Wu and Feng. %A A. Andrews %J Proceedings of the 1981 International Conference on Parallel Processing %D August 1981 %T Parallel Processing of the Kalman Filter %P 216-220 %K Special-Purpose Processors %A G. Andrews %A others %T Synchronizing Resources %J ACM Transactions on Programming Languages and Systems %V 10 %N 1 %D January, 1988 %P 51-86 %K TOPLAS %X SR (Synchronizing Resources) is designed for writing distributed programs. The main language constructs are resources and operations. Resources encapsulate processes and variables they share; operations provide the primary mechanism for process interaction. SR provides a novel integration of the mechanisms for invoking and servicing operations. Consequently, all of local and remote procedure call, rendezvous, message passing, dynamic process creation, multicast, and semaphores are supported. An overview of the language and implementation. %X SR is available by anonymous FTP from Arizona.EDU (128.196.128.118 or 192.12.69.1). [Copy over the README file for an explanation.] uunet!Arizona!sr-project %A G. R. Andrews %A J. R. McGraw %T Language features for parallel processing and resource control %J Proc. Conf. on Design and Implementation of Programming Languages %C Ithaca, N.Y. %D October 1976 %K theoretical results %K bsatya %A G. R. Andrews %T The Design of a Message Switching System: An Application and Evaluation of Modula %J IEEE Transactions on Software Engineering %V SE-5 %N 2 %D February 1979 %P 138-147 %K %A G. R. Andrews %A D. P. Dobkin %A P. J. Downey %T Active data structures %J 5th International Conference on Software Engineering %C San Diego, CA, USA %D 9-12 March 1981 %P 354-362 %O 46 REFS. Treatment PRACTICAL %I IEEE. New York, USA, 1981, xv+472 %K data structures distributed processing data structures passive software objects microprocessor technology file directory system distributed processing %A G. R. Andrews %T Parallel programs: Proofs, principles, and practice %J Communications of the ACM %V 24 %N 3 %D March 1981 %P 140-146 %K maeder biblio: concepts, parallel programming, concurrency, synchronisation %A G. R. Andrews %T The Distributed Programming Language SR -- Mechanisms, Design and Implementation %J Software Practice and Experience %V 12 %N 8 %D 1982 %P 719-753 %A G. R. Andrews %T Distributed programming languages %I Computer Science Department, Arizona University %D 1982 %R 82-13 %K Rdpsdis.bib Rsingh %T The distributed programming language SR-mechanisms, design and implementation %A G. R. Andrews %J Software-Pract. & Exper. (GB) %V 12 %N 8 %P 719-753 %O 36 REFS. Treatment PRACTICAL %D Aug. 1982 %K parallel processing distributed processing high level languages high level languages distributed programming language SR software parallel resources operations input statements separate compilation type abstraction dynamic communication links arrays procedures %A G. R. Andrews %A D. P. Dobkin %A P. J. Downey %T Distributed Allocation with Pools of Servers %J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing %I ACM %C Ottawa, Canada %D August 1982 %P 73-83 %A G. R. Andrews %A G. M. Levin %T On-the-fly Deadlock Prevention %J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing %r U. of Arizona Tech. Report %d February 1982 %I ACM %C Ottawa, Canada %D August 1982 %P 165-172 %A G. R. Andrews %A R. D. Schlichting %A N. C. Buchholz %A R. Hayes %A T. Purdin %T The Saguaro Distributed Operating System %I Department of Computer Science, University of Arizona, Tucson %R Technical Report 85-9 %D April 1985 %A Gregory R. Andrews %T Synchronizing Resources %J ACM Transactions on Programming Languages and Systems %V 3 %N 4 %D October 1981 %P 405-430 %K Parallel Programming, processes, synchronization, process communication, monitors, distributed processing, programming languages, operating systems, databases, concurrency, CR Categories: 4.20, 4.22, 4.32, 4.35 %K bmiya, %A Gregory R. Andrews %A Fred B. Schneider %T Concepts and Notations for Concurrent Programming %J Computing Surveys %V 15 %N 1 %P 3-43 %O 133 REFS. Treatment BIBLIOGRAPHIC SURVEY, PRACTICAL %D March 1983 %i University of Arizona, Tucson %r CS Dept. TR 82-12 %d Sept. 1982. %K grecommended91, %K bmiya, %K fpst, parallel processing programming OS parallel processing concurrent programming language notations processes communication synchronization primitives %X This is not a book, but probably the best place to start in understanding concurrency. Well written, though dated a bit. %X Literature search yields: 01391537 E.I. Monthly No: EI8309072043 E.I. Yearly No: EI83016908 Title: Concepts And Notations For Concurrent Programming. Author: Andrews, Gregory R.; Schneider, Fred B. Corporate Source: Univ of Arizona, Dep of Computer Science, Tucson, Ariz, USA Source: Computing Surveys v 15 n 1 Mar 1983 p 3-43 Publication Year: 1983 CODEN: CMSVAN ISSN: 0010-4892 Language: ENGLISH Journal Announcement: 8309 Abstract: This paper identifies the major concepts of concurrent programming and describes some of the more important language notations for writing concurrent programs. The roles of processes, communication, and synchronization are discussed. Language notations for expressing concurrent execution and for specifying process interaction are surveyed. Synchronization primitives based on shared variables and on message passing are described. Finally, three general classes of concurrent programming languages are identified and compared. 133 refs. Descriptors: *COMPUTER PROGRAMMING Classification Codes: 723 (Computer Software) 72 (COMPUTERS & DATA PROCESSING) %A Gregory R. Andrews %A Ronald A. Olsson %T Report on the Distributed Programming Language SR %I University of Arizona %R TR 85-23 %C Tucson, Arizona %D November 27, 1985 %A Gregory R. Andrews %A Ronald A. Olsson %T The Evolution of the SR Language %I University of Arizona %R TR 85-22 %C Tucson, Arizona %D October 14, 1985 %A Gregory R. Andrews %A Richard D. Schlicting %A Roger Hayes %A Titus D. M. Purdin %Z University of Arizona, Tucson, AZ %T The Design of the Saguaro Distributed Operating System %J IEEE Transactions on Software Engineering %V SE-13 %D January 1987 %P 104-118 %r TR 86-5a %d July 1986 %K Special Issue on Distributed Systems, Distributed computing, distributed operating system, file systems, type systems, user interface %X From: norm@arizona.edu (Norm Hutchinson) Saguaro is an operating system for computers connected by a local-area network. Saguaro is implemented in the SR distributed programming language. Contact: Richard D. Schlichting Department of Computer Science The University of Arizona Tucson, AZ 85721 602-621-4324 rick@arizona.edu %A Gregory R. Andrews %T Concurrent Programming: Principles and Practice %I Benjamin/Cummings Publishing Company, Inc. %C Redwood City, California %D 1991 %K book, text, %K grecommended91, %K book, text, recommended by someone, %K jc, %O ISBN 0-8053-0086-4 %X Extremely heavy on assertional reasoning... which is supposed to make us better programmers! %X Part I Basic Concepts 1 Hardware and Applications; Synchronization; Program Properties Chapter 1 Sequential Programming 7 1.1 Language Notation 7 Declarations; Statements; Procedures 1.2 Logic, Propositions, and Predicates 14 Formal Logical Systems; Propositions; Predicates 1.3 A Programming Logic 23 Axioms; Inference Rules 1.4 Proofs in Programming Logic 31 Proof Outlines; Equivalence and Simulation 1.5 Program Derivation 36 Weakest Preconditions; Weakest Preconditions of Statements; Linear Search Revisited; Sorting Historical Notes and References 47 Exercises 49 Chapter 2 Concurrency and Synchronization 57 2.1 Specifying Concurrent Execution 57 2.2 Atomic Actions and Synchronization 59 Fine-Grained Atomicity; Specifying Synchronization 2.3 Semantics of Concurrent Execution 64 2.4 Techniques for Avoiding Interference 67 Disjoint Variables; Weakened Assertions; Global Invariants; Synchronization 2.5 Auxiliary Variables 78 2.6 Safety and Liveness Properties 81 Proving Safety Properties; Scheduling Policies and Fairness Historical Notes and References 86 Exercises 89 Part II Shared Variables 95 Chapter 3 Fine-Grained Synchronization 97 3.1 The Critical Section Problem 98 A Coarse-Grained Solution; Spin Locks: A Fine-Grained Solution; Implementing Await Statements 3.2 Critical Sections: Tie-Breaker Algorithm 107 A Coarse-Grained Solution; A Fine-Grained Solution; An N-Process Solution 3.3 Critical Sections: Ticket Algorithm 112 Coarse-Grained Solution; Fine-Grained Solutions 3.4 Critical Sections: Bakery Algorithm 115 Coarse-Grained Solution; A Fine-Grained Solution 3.5 Barrier Synchronization 120 Shared Counter; Flags and Coordinators; Symmetric Barriers 3.6 Data Parallel Algorithms 127 Parallel Prefix Computations; Operations on Linked Lists; Grid Computations; Synchronous Multiprocessors 3.7 On-The-Fly Garbage Collection 134 Problem Specification; Solution Outline; A Coarse-Grained Solution; A Fine-Grained Solution 3.8 Implementing Processes 146 A Single-Processor Kernel; A Multiprocessor Kernel Historical Notes and References 155 Exercises 159 Chapter 4 Semaphores 171 4.1 Notation and Semantics 172 4.2 Basic Uses and Programming Techniques 175 Critical Sections: Changing Variables; Barriers: Signaling Events; Producers and Consumers: Split Binary Semaphores; Bounded Buffers: Resource Counting 4.3 Selective Mutual Exclusion 189 Dining Philosophers; Readers and Writers 4.4 General Condition Synchronization 197 Readers and Writers Revisited; The Technique of Passing the Baton; Readers and Writers Solution; Alternative Scheduling Policies 4.5 Resource Allocation 204 Problem Definition and General Solution Pattern; Shortest-Job-Next Allocation 4.6 Implementation 210 Historical Notes and References 212 Exercises 214 Chapter 5 Conditional Critical Regions 225 5.1 Notation and Semantics 226 Examples; Inference Rules; Safety and Liveness Properties 5.2 Dining Philosophers Revisited 232 5.3 Readers/Writers Revisited 235 Readers' Preference Solution; Writers' Preference Solution 5.4 Interprocess Communication 238 Bounded Buffer With Exclusive Access; Bounded Buffer With Concurrent Access 5.5 Scheduling and Resource Allocation 242 5.6 Implementations 245 Using Busy Waiting; Using Semaphores with Passing the Baton; Using Semaphores with Rem's Algorithm; Using a Kernel Historical Notes and References 254 Exercises 255 Chapter 6 Monitors 263 6.1 Programming Notation 264 Synchronization in Monitors; Additional Operations on Condition Variables 6.2 Formal Semantics and Program Proofs 271 Axioms and Proof Obligations; A Procedure Call Inference Rule; Safety and Liveness Properties; An Example: Readers and Writers 6.3 Synchronization Techniques 283 Interval Timer: Covering Conditions and Priority Wait; A Fair Semaphore: Passing the Condition; The Sleeping Barber Problem: Rendezvous 6.4 Disk Scheduling: Program Structures 295 Scheduler as a Separate Monitor; Scheduler as an Intermediary 6.5 Alternative Approaches to Synchronization 305 Alternative Signaling Disciplines; Equivalence of the Signaling Disciplines; Differences Between the Signaling Disciplines; Alternatives to Mutual Exclusion; Path Expressions 6.6 Implementations 319 Using Semaphores; Using a Kernel Historical Notes and References 325 Exercises 329 Part III Message Passing 339 Chapter 7 Asynchronous Message Passing 343 7.1 Programming Notation 344 7.2 Formal Semantics 346 Axioms and Satisfaction Proofs; Auxiliary Variables and Non-Interference; An Example; Safety and Liveness Properties 7.3 Filters: A Sorting Network 355 7.4 Clients and Servers 359 Active Monitors; A Self-Scheduling Disk Driver; File Servers: Conversational Continuity 7.5 Heartbeat Algorithms 370 Network Topology: Shared-Variable Solution; Network Topology: Distributed Solution 7.6 Probe/Echo Algorithms 376 Broadcast in a Network; Network Topology Revisited 7.7 Broadcast Algorithms 383 Logical Clocks and Event Ordering; Distributed Semaphores 7.8 Token-Passing Algorithms 388 Distributed Mutual Exclusion; Termination Detection in a Ring; Termination Detection in a Graph 7.9 Replicated Servers 396 Replicated Files; Replicated Workers: Adaptive Quadrature 7.10 Implementations 402 Shared-Memory Kernel; Distributed Kernel Historical Notes and References 410 Exercises 415 Chapter 8 Synchronous Message Passing 423 8.1 Programming Notation 424 Communication Statements; Guarded Communication 8.2 Formal Semantics 429 Axioms, Inference Rules, and Satisfaction Proofs; Auxiliary Variables and Non-Interference; An Example; Safety and Liveness Properties 8.3 Networks of Filters 439 Prime Number Generation: The Sieve of Eratosthenes; Matrix/Vector Multiplication 8.4 Interacting Parallel Processes 443 Parallel Sorting: A Heartbeat Algorithm; Parallel Prefix Computations; Matrix Multiplication: Broadcast Algorithm; Matrix Multiplication: Heartbeat Algorithm 8.5 Clients and Servers 453 Resource Allocation; File Servers and Conversational Continuity; Centralized Dining Philosophers; Decentralized Dining Philosophers 8.6 Implementations 460 Centralized Clearing House; Decentralized Implementations Historical Notes and References 472 Exercises 474 Chapter 9 RPC and Rendezvous 483 9.1 Remote Procedure Call 484 Synchronization in Modules; A Time Server; Caches in a Distributed File System; A Sorting Network of Merge Filters; Formal Semantics 9.2 Rendezvous 494 Client/Server Examples; A Sorting Network of Merge Filters; Formal Semantics; An Example Proof; Safety and Liveness Properties 9.3 A Multiple Primitives Notation 509 Invoking and Servicing Operations; Examples; Formal Semantics 9.4 Clients and Servers 515 Readers/Writers Revisited: Encapsulated Access; Replicated Files; Network Topology Using Probe/Echo Algorithms 9.5 Parallel Algorithms 522 Region Labeling: A Heartbeat Algorithm; The Traveling Salesman Problem: Replicated Workers 9.6 Implementations 529 RPC in a Kernel; Rendezvous Using Asynchronous Message Passing; Multiple Primitives in a Kernel Historical Notes and References 540 Exercises 543 Part IV Practice 551 Chapter 10 Language Overviews 553 10.1 Turing Plus: Monitors 555 Program Structure; Process Interaction; Example: File Difference Checker 10.2 Occam: Synchronous Message Passing 561 Program Structure; Sequential and Parallel Constructors; Communication and Synchronization; Example: Prime Number Sieve 10.3 Ada: Rendezvous 567 Program Components; Communication and Synchronization; Example: The Dining Philosophers 10.4 SR: Multiple Primitives 575 Program Components; Communication and Synchronization; Example: The Traveling Salesman Problem 10.5 Linda: Distributed Data Structures 581 Tuple Space and Process Interaction; Example: Prime Numbers with Replicated Workers 10.6 Comparison and Performance 588 Performance Experiments; Interpretation of Results %A Gregory R. Andrews %T Paradigms for Process Interaction in Distributed Programs %J Computing Surveys %V 23 %N 1 %D March 1991 %P 49-90 %K C.1.2 [Processor Architectures]: multiple data stream architectures (multiprocessors) -- multiple-instruction stream, multiple-data stream processors (MIMD), C.2.4 [Computer Communications Networks]: Distributed Systems -- distributed applications, D.1.3 [Programming Techniques]: concurrent programming; D.3.3 [Programming Languages]: Language Constructs -- concurrent programming structures; D.4.1 [Operating Systems]: process management; D.4.7 [Operating Systems] Organization and Design -- distributed systems; F.3.1 [Logics and Meanings of Programs]: specifying and verifying and reasoning about programs -- invariants General Terms: Algorithms, Languages Additional Key Words and Phrases: clients and servers, distributed and parallel algorithms, distributed programming, distributed programming, distributed programming methods, heartbeat algorithms, networks of filters, patterns for inter process communications, and probe/echo algorothems, replicated servers, token passing algoritims, %A Gregory R. Andrews %A Ronald A. Olsson %T The SR Programming Language: Concurrency in Practice %I Benjamin/Cummings %C %D 1993 %K book, text, %O ISBN 0-8053-0088-0 %A John Andrews %T A Hardware Tracing Facility for a Multiprocessing Supercomputer %R CSRD TR #1009 %I Ctr. for Supercomputing Res. and Develop., U. Ill. %C Urbana, Ill. %D May 1990 %K master thesis, %A John. B. Andrews %A Constantine D. Polychronopoulos %T An Analytic Approach to Performance/Cost Modelling of Parallel Computers %J Journal of Parallel and Distributed Computing %V 12 %D 1991 %P 343-356 %K heterogenous homogenous, %A M. Andrews %A J. S. Walicki %Z CSU Fort Collins %T Concurrency and Parallelism - Future of Computing %J 1985 ACM Annual Conference %C Denver, CO %D October 1985 %P 224-231 %K SIMD, GAPP, systolic array, Geometric Arithmetic Parallel Processor, %X NCR45 based system to be used for image processing and database functions. %A Phil Andrews %T Integrating Graphics in Supercomputing Environments %J Proceedings, 27th Semi-Annual Cray User Group Meeting %I CUG %C London %D April 1991 %P 124-131? %K graphics, %A Patrick Andrich %A Gurvan Madec %A Didier L'Hostis %T Performance Evaluation for an Ocean Circulation Model: Vectorization and Multitasking %J 1988 International Conference on Supercomputing (ICS) %I ACM Press %C St. Malo, France %D July 1988 %P 295-303 %K supercomputer applications, incompressible Navier-Stokes, Boussineq approximation, 100 x 100 horizontal gridpoints, 16 vertical levels, successive over-relaxation (SOR) method, preconditioned conjugate gradient (PCG), baroclinic equations, %A Rick Angelini %T Superingres: The Ingres RDMBS in a Supercomputer Environment %J 1990 Fall Proceedings Cray User Group Meeting %I CUG %C Washington DC %D Fall 1990 %P 335? %K software tools, %A F. Anger %A J. Hwang %A Y. Chow %T Scheduling with Sufficient Loosely Coupled Processors %J Journal of Parallel and Distributed Computing %V 8 %N 9 %D October? 1990 %A Francoise Angrand %A Jocelyne Erhel %T Simulation Par Elements Finis D'Ecoulements Compressibles Sur Calculateurs Vectoriels %R TR 622 %I INRIA %D Fevrier 1987 %A I. Angus %A et al. %T Solving problems on concurrent processors, Software for concurrent processors %V II %I Prentice Hall %D 1990 %K book, text, hypercube, %X The `long awaited' second book (Fox). %A I. G. Angus %A W. T. Thompkins %T Data Storage, Concurrency, and Portability: An Object Oriented Approach to Fluid Dynamics %J Fourth Conference on Hypercubes, Concurrent Computers, and Applications %I IEEE %C Monterey, CA %D March 1989 %K poster presentation? %K DMCC4, %A Ian G. Angus %Z Northrup %T Parallel Programs as X-Window Clients: An Implementation %J Proceedings of the Fifth Distributed Memory Computing Conference %V II, Architecture Software Tools, and Other General Issues %I IEEE %C Charleston, SC %D April 1990 %P 1154-1159 %K Software Development Tools, graphics, DMCC5, %A Ian G. Angus %T Domain Objects: A New Approach to Parallel Programming %J Proc. 1991 Annual Users Conference %I Intel Supercomputer Users' Group %C Dallas, TX %D 1991 %P 241-267 %A M. L. Anido %A D. J. Allerton %A E. J. Zaluska %Z U. Southampton %T A Three-Port/Three-Access Register File for Concurrent Processing and I/O Communication in a RISC-like Graphics Engine %J Proc. 16th Annual Symposium on Computer Architecture, Computer Architecture News %I ACM %V 17 %N 3 %D June 1989 %P 354-361 %K computer architecture, reduced instruction set computers, VLSI design, computer image generation, interprocessor communication (IPC), %A Sadun Anik %A Wen-mei W. Hwu %T Executing Nested Parallel Loops on Shared-Memory Multiprocessors %J Proceedings of the 1992 International Conference on Parallel Processing %V III, Algorithms & Applications %I CRC Press %C Boca Raton, FL %D August 1992 %P III-241--III-244 %K scheduling, %A Shoshana Anily %A Awi Federgruen %T Ergodicity in Parametric Nonstationary Markov Chains: An Application to Simulated Annealing Methods %J Operations Research %V 35 %N 6 %D nov 1987 %P 867-874 %A A. V. Anisimov %A Yu. E. Boreisha %T Dynamic Parallelism in Transputer Systems %E N. N. Mirenkov %B Parallel Computing Technologies %I World Scientific Publishing %C Singapore/New Jersey %D 1990 %P 477-486? %K resource controlling tools, %A N. A. Anisimov %T A Petri Net Entity as a Formal Model for LOTOS, a Specification Language for Distributed and Concurrent Systems %E N. N. Mirenkov %B Parallel Computing Technologies %I World Scientific Publishing %C Singapore/New Jersey %D 1990 %P 440-449? %K simulation, evaluation, analysis, %A V. A. Anisimov %A V. E. Malyshkin %T Assemble Parallel Programming System INYA %E N. N. Mirenkov %B Parallel Computing Technologies %I World Scientific Publishing %C Singapore/New Jersey %D 1990 %P 316-324? %K parallel programming tools, %A H. Anlauff %T Design of a Hierarchical Multiprocessor System for Multi-Level Parallel Computation %E W. Handler %B Computer Architecture %P 223-265 %I Springer-Verlag %K bhibbard %D 1976 %A M. Annaratone %A M. G. Sami %T Software Testing Techniques for Universal Building Blocks of Multimicrosystems %J National Computer Conference \(em Proceedings %I AFIPS %V 51 %D 1982 %P 117-124 %A M. Annaratone %A E. Arnould %A P. K. Hsiung %A H. T. Kung %T Extending the CMU Warp Machine with a Boundary Processor %J S.P.I.E. Symposium, Real-Time Signal Processing VIII %V 564 %D August 1985 %K Rhighnam, architecture, %A M. Annaratone %A E. Arnould %A H. T. Kung %A O. Menzilcioglu %T Using Warp as a supercomputer in signal processing %J IEEE International Conference on Acoustics, Speech and Signal Processing %D April 1986 %K Rhighnam, algorithm, boundary-processor, SVD, Warp %A M. Annaratone %A E. Amould %A R. Cohn %A T. Gross %A H. T. Kung %A M. Lam %A O. Menzilcioglu %A K. Sarocky %A J. Senko %A J. Webb %Z CMU %T Architecture of Warp %J Spring COMPCON '87 %I IEEE %D February 1987 %P 264-267 %K Systolic arrays, %K Rhighnam, %A M. Annaratone %A M. Fillo %A M. Halbherr %A R. Ruhl %A P. Steiner %A M. Viredaz %T The K2 Project: Distributed-Memory Parallel Processor: Architecture, Compiler, and Operating System %J Proceedings Supercomputing'91 %I IEEE %C Albuquerque, New Mexico %D November 1991 %P 900-910 %K system issues, %A Marco Annaratone %A Emmanuel Arnould %A Thomas Gross %A H. T. Kung %A Monica S. Lam %A Onat Menzilcioglu %A Ken Sarocky %A Jon A. Webb %T Warp Architecture and Implementation %J Proc. 13th Annual International Symposium on Computer Architecture, Computer Architecture News %I ACM %V 14 %N 2 %P 346-356 %D June 1986 %K Rhighnam, VME bus, %X Article has a photograph. A more complete paper collection is found in the TR from CMU. %A Marco Annaratone %A Emmanuel Arnould %A Thomas Gross %A H. T. Kung %A Monica Lam %A Onat Menzilcioglu %A Jon A. Webb %Z Robotics Lab, CMU %T The Warp Computer: Architecture, Implementation, and Performance %J IEEE Transactions on Computers %V C-36 %N 12 %D December 1987 %P 1523-1538 %d July 1987 %r CMU-RI-TR-87-18 %K Rhighnam, algorithms, architecture, compiler, W2 %X Reproduced in David J. Lilja's (ed.) Architectural Alternatives for Exploiting Parallelism, IEEE Press, Los Alamitos, CA, 1991, page 338-. %X The Warp machine is a systolic array computer of linearly connected cells, each of which is a programmable processor capable of performing 10 million floating-point operations per second (10 MFLOPS). A typical Warp array includes 10 cells, thus having a peak computation rate of 100 MFLOPS. The Warp array can be extended to include more cells to accommodate applications capable of using the increased computational bandwidth. Warp is integrated as an attached processor into a UNIX host system. Programs for Warp are written in a high-level language supported by an optimizing compiler. %X The first 10-cell prototype was completed in February 1986; delivery of production machines started in April 1987. Extensive experimentation with both the prototype and production machines has demonstrated that the Warp architecture is effective in the application domain of robot navigation, as well as in other fields such as signal processing, scientific computation, and computer vision research. For these applications, Warp is typically several hundred times faster than a VAX 11/780 class computer. %X This paper describes the architecture, implementation and performance of the Warp machine. Each major architectural decision is discussed and evaluated with system, software and application considerations. The programming model and tools developed for the machine are also described. The paper concludes with performance data for a large number of applications. @i<(25 pages)> %A Marco Annaratone %A Emmanuel Arould %A H. T. Kung %A Onat Menzilcioglu %T Using Warp as a Supercomputer in Signal Processing %J Collection of Papers on Warp %I Carnegie-Mellon University %D January 1987 %P 2895-2898 %A Marco Annaratone %A Emmanuel Arnould %A Robert Cohn %A Thomas Gross %A H. T. Kung %A Monica Lam %A Onat Menzilcioglu %A Ken Sarocky %A John Senko %A Jon A. Webb %Z Carnegie-Mellon University %T Warp Architecture: From Prototype to Production %J Proc. NCC %I AFIPS %D June 1987 %K Rhighnam, analysis, architecture, %j Collection of Papers on Warp %d January 1987 %p 1-13 %A Marco Annaratone %A Francois Bitz %A Jeff Deutsch %A Leonard Hamey %A H. T. Kung %A P. C. Maulik %A P. S. Tseng %A Jon A. Webb %Z Carnegie-Mellon University %T Applications Experience on Warp %J Proc. NCC %I AFIPS %D June 1987 %K Rhighnam, algorithms, applications, Warp %j Collection of Papers on Warp %d January 1987 %p 2-16 %A Marco Annaratone %A Marco Fillo %A Kiyoshi Nakabayashi %A Marc Viredaz %T The K2 Parallel Processor: Architecture and Hardware Implementation %J Proc. 17th Annual Symposium on Computer Architecture, Computer Architecture News %I ACM %V 18 %N 2 %D June 1990 %P 92-101 %K Special-Purpose Architectures %A Marco Annaratone %T MPPs, Amdahl's Law, and Comparing Computers %J Proc. Frontiers '92: Fourth Symp. on Massively Parallel Computation %C McLean, VA %I IEEE %D October 1992 %P 465-470 %K making massive parallelism a reality: the industrial viewpoint, %A Fred Annexstein %A Marc Baumslag %A Arnold L. Rosenberg %T Group Action Graphs and Parallel Architectures %R TR 87 13 %I COINS Dept, University of Mass. %C Amherst %D 12/31/1987 %A Fred Annexstein %T Fault Tolerance in Hypercube-Derivative Network %J Symposium on Parallel Algorithms and Architecture, Computer Architectures News %V 19 %N 1 %D March 1991 %P 25-34 %K special issue, SPAA'91, %A Nick Anning %A David Hebditch %T New chip displays its powers %J New Scientist %D 20 Mar. 1986 %P 43-46 %K transputer, %A J. K. Annot %T A Deadlock Free and Starvation Free Network of Packet Switching Communication Processors %J Parallel Computing %V 9 %N 2 %D January 1989 %P 147-162 %K PARLE: conference on parallel architectures and languages -- Europe, network, packet switching, communication processor, deadlock, starvation, progress, constructive proof, DOOM: decentralized object oriented machine, ESPIRIT, %A Anonymous %T Credit-card size Transputer modules can turn a PC into a supermini %J Electronics %D 21 Jan. 1988 %P 85 %A Anonymous? %T A Report on the First Native X-MP Unicos Installation %J Proceedings CUG %I Cray User Group %D Spring 1986 %P 122 %K operating systems, %A A. Ansari %A A. B. Martinez %T Locally Optimum Quantization for Distributed Detection %R 88-00 %I Department of Electrical Engineering, Tulane University %C New Orleans, LA 70118-5674 %D 04-22-88 %X A distributed network of sensors is considered where each sensor quantizes its observation optimally. It is shown that if the global decision test statistic is obtained as the sum of the statistics of each sensor, then the efficacy of the network is maximized by maximizing the efficacy of each sensor. The quantizer minimizing the mean square error between the locally optimum nonlinearity and the quantizer output can, therefore, be used at each sensor. The result is an extension of locally optimum quantization to the multisensor case. %A A. Ansari %A A. B. Martinez %T A Bayesian Approach to Optimal Quantization for Distributed Detection %R 88-00 %I Department of Electrical Engineering, Tulane University %C New Orleans, LA 70118-5674 %D 05-19-88 %X The problem of optimal quantization by a network of distributed sensors is considered. It is shown that the quantization rule at the sensors and the fusion rule at the central processor are coupled. To minimize the cost, a multidimensional search for the parameters is needed. Suboptimal systems are obtained for either a fixed sensor performance or a given fusion rule. Computational complexity reduction is achieved for a restricted case of identical quantization rule at each sensor. %A Roberto Ansolani %A Stefano Evangelisti %A Giuseppe Paruolo %A Elda Rossi %T Efficient Parallel Implementation of a Full Configuration Interaction Algorithm for Circular Polyenes on a Cray Y-MP %J International Journal of Supercomputer Applications %V 6 %N 4 %D Winter 1992 %P 351-360 %A S. R. Anstead %A J. L. Baer %T Concurrent Accesses of B*-trees in a Paging Environment %J Proceedings of the 1978 International Conference on Parallel Processing %I IEEE %D August 1978 %P 235-237 %K Data Base Machines %A Robert N. Anthony %T Planning and Control Systems: A framework for analysis %I Division of Research, Harvard Business School, Harvard University %D 1965 %K Rdpsdis.bib Rsingh %A A. Antola %A R. Negrini %A N. Scarabottolo %T Time-Folding A solution for Functional and Fault-Tolerance Reconfiguration of Systolic FFTS %J Proceedings Supercomputing '88: Supercomputer Design: Hardware & Software %V 3 %I International Supercomputing Institute, Inc. %C St. Petersburg, Florida %D 1988 %P 262-271 %K Fault-Tolerance in Array Supercomputers %A A. Antola %A R. Negrini %A M. G. Sami %A R. Stefanelli %Z P. di Milano %T Interconnection Networks for Highly Parallel Supercomputing Architectures %E Janusz S. Kowalik %B Supercomputing %S NATO ASI, Series F: Computer and System Sciences %V 62 %I Springer-Verlag %C Berlin %D 1990 %P 379-396 %K networks, %A A. Antola %A R. Negrini %A M. G. Sami %A N. Scarabottolo %T Arrays for Digital Signal Processing Functions: Fault Tolerance and Functional Reconfiguration %E Hungwen Li %E Quentin F. Stout %B Reconfigurable Massively Parallel Computers %I Prentice Hall %C Englewood Cliffs, NJ %D 1991 %P 170-222 %A Anna Antola %A Ciro F. Bonzio %A Roberto Negrini %T Sar Real-Time on-Board Processing: The Architecture %J Second International Conference on Supercomputing, Proceedings Supercomputing '87, Industrial Systems, Supercomputer Projects and Prototype Architectures %V I %I International Supercomputing Institute, Inc. %D 1987 %P 254-264 %A Anna Antola %T Multiple Transform Pipelines for Image Coding %J 1988 International Conference on Supercomputing (ICS) %I ACM Press %C St. Malo, France %D July 1988 %P 66-75 %K special purpose computers, pipelined VLSI/ WLSI architecture, FFT, discrete Fourier transform (DFT), discrete cosine transform (DCT), discrete sine transform (DST), Walsh-Hadamard Transform (WHT), %A Renzo Di\ Antonio %A John Eilert %A Marcello Vitaletti %Z IBM %T Using PAGE-AHEAD for Large FORTRAN Programs %J Proc. Supercomputing '89 %I ACM %C Reno, NV %D November 1989 %P 511-520 %K Software Environments - Performance Tools %A John K. Antonishe %A Robert D. Snelick %Z ICST %T Emulation Through Time Dilation %J Proceedings of the Fifth Distributed Memory Computing Conference %V II, Architecture Software Tools, and Other General Issues %I IEEE %C Charleston, SC %D April 1990 %P 1271-1275 %K communication, emulation, hypercube, measurements, models, performance, time dilation, DMCC5, %K Performance Evaluation and Analysis %A Vadim G. Antonov %Z demos coop, Moscow %T A Regular Architecture for Operating System %J Operating Systems Review %V 24 %N 3 %D July 1990 %P 22-39 %A D. Antonsson %A P.-E. Danielsson %A B. Gudmundsson %A T. Hedblom %A B. Kruse %A A. Linge %A P. Lond %A T. Ohlsson %T PICAP - A system approach to image processing %J IEEE Computer Society Workshop on Computer Architectures for Pattern Analysis and Image Database Management %D November 1981 %P 35-42 %K Rhighnam, architecture, PICAP %A Dan Antonsson %A Bjorn Gudmundsson %A Tomas Hedblom %A Bjorn Kruse %A Arne Linge %A Peter Lord %A Tomas Ohlsson %T PICAP - A System Approach to Image Processing %J IEEE Transactions on Computers %V C-31 %N 10 %D October 1982 %P 997-1000 %K Computer architecture, image processing, multiprocessor system, parallel processing, picture processing, Special issue on computer architecture for pattern analysis and image database management %A J. Aoe %A Y. Yamamoto %A R. Shimada %T An Efficient Implementation of Static String Pattern Matching Machines %J Problems in Designing Supercomputers: Technologies and Devices SCS 85, First International Conference on Supercomputing Systems %I IEEE Computer Society %P 491-498 %K Parallelization of Application Algorithms %A Jun-ichi Aoe %A Masayuki Fujikawa %A Ei-ichi Shinomiya %T An Efficient Representation of Hierarchical Semantic Primitives -an Aid to Machine Translation Systems %J Second International Conference on Supercomputing, Proceedings Supercomputing '87, Industrial Supercomputer Applications and Computations %V II %I International Supercomputing Institute, Inc. %D 1987 %P 361-370 %A M. Aoki %A G. Estrin %A R. Mandell %T Analysis of computing-load assignment in a multi-processor computer %J AFIPS Proc. of the FJCC %V 24 %D 1963 %P 147-160 %K bmiya, %A Mutsumi Aoyagi %A Ron Shepard %A Albert F. Wagner %T An AB Initio Theoretical Study of the $CH ~+~ H sub 2 <=> CH sub 3 * <=> CH sub 2 ~+~ H$ Reactions %J International Journal of Supercomputer Applications %V 5 %N 1 %D Spring 1991 %P 72-89 %A Brian Apgar %A Bret Bersack %A Abraham Mammen %Z Stellar Computer %T A Display System for the Stellar Graphics Supercomputer Model GS1000 %J Computer Graphics (Proc. SIGGRAPH '88) %V 22 %N 4 %D August 1988 %P 255-262 %X The display system of the Stellar machine is outlined. An interesting aspect is their use of tagged data to allow time dependent operations to be executed in the correct order. Comparisons are made with other systems. %A John Apostolakis %A Christopher S. Kochanek %Z Caltech %T Statistical Gravitational Lensing on the Mark III Hypercube %J The 3rd Conference on Hypercube Concurrent Computers and Applications %V II, Applications %I ACM %C Pasadena, CA %D January 1988 %P 963-970 %r cccp-581 %K applications in astronomy and astrophysics, ray-tracing, parallel algorithm, %A John Apostolakis %A Clive Baillie %A Hong-Qiang Ding %A Jon Flower %Z Caltech %T Lattice Gauage Theory on the Hypercube %J The 3rd Conference on Hypercube Concurrent Computers and Applications %V II, Applications %I ACM %C Pasadena, CA %D January 1988 %P 1278-1287 %r cccp-605 %K applications in physics, cosmic cube, monte carlo, NCUBE, Mark IIIfp, Fermions, %A A. Apostolico %A M. Atallah %T Efficient Parallel Algorithms for String Editing and Related Problems %I Dept. of Computer Sciences, Purdue University %C W. Lafayette, IN 47907-2004 %R TR #724 %D 11/25/87 %A A. Apostolico %A C. Iliopoulos %A G. M. Landau %A B. Schieber %A U. Vishkin %T Parallel Construction of a Suffix Tree %I Dept. of Computer Sciences, Purdue University %C W. Lafayette, IN 47907-2004 %R TR #714 %D 9/30/87 %A Alberto Apostolico %A Alberto Negro %T Systolic Algorithms for String Manipulations %J IEEE Transactions on Computers %V C-33 %N 4 %D April 1984 %P 361-364 %K Parallel computation, pattern matching, repetitions in a string, statistics of a string, systolic architectures, Correspondence, %A T. K. Apostolopoulos %A E. N. Protonotarios %T Queueing analysis of buffered slotted multiple access protocols %J Comput. Communication (GB) %V 8 %N 1 %P 9-21 %O 13 REFS. Treatment APPLICATIONS, THEORETICAL %D Feb. 1985 %K protocols multi access systems queueing theory infinite buffer capacity queueing analysis buffered slotted multiple access protocols URN protocol ALOHA protocol random TDMA finite buffer capacity user process M/G/1 queueing system packet delay distribution %A Andrew W. Appel %T An Efficient Program for Many-Body Simulation %J SIAM J. Sci. Stat. Comput. %V 6 %N 1 %D 1985 %P 85 %K n-body simulations, tree-oriented algorithms which don't parallelize well, %A Andrew W. Appel %A Aage Bendiksen %Z Princeton %T Vectorized Garbage Collection %J The Journal of Supercomputing %V 3 %N 3 %D September 1989 %P 151-160 %A Andrew W. Appel %A Kai Li %Z Princeton University %T Virtual Memory Primitives for User Programs %J Fourth International Conference on Architectural Support for Programming Languages and Operating Systems %C Santa Clara, California %D April 1991 %K Architectural Support For Operating Systems %A Bill Appelbe %T Static Debugging for Multitasking Programs %J Proceedings CUG %I Cray User Group %D Spring 1986 %P 66-73 %K software tools, %A Bill Appelbe %A Balakrishnan Lakshmanan %T Optimizing Parallel Programs Using Affinity Regions %J Proceedings of the 1993 International Conference on Parallel Processing %V II - Software %I CRC Press %C Boca Raton, FL %D August 1993 %P II-246--II-249 %K task graph, data flow, PAT, %A W. Appelbe %A C. McDowell %T Integrating Tools for Debugging and Developing Multitasking Programs %J Proc. of the ACM Workshop on Parallel and Distributed Debugging ACM SIGPLAN Notices %V 24 %N 1 %P 78-88 %D January 1989 %d May 5-6, 1988 %C Madison, Wisconsin %A William Appelbe %A Charles McDowell %A Kevin Smith %T Start/Pat: a Parallel Programming Toolkit %J IEEE Software %D July 1989 %P 29-38 %A William F. Appelbe %A Charles E. McDowell %T Anomaly Reporting - a Tool for Debugging and Developing Parallel Numerical Algorithms %J Problems in Designing Supercomputers: Technologies and Devices SCS 85, First International Conference on Supercomputing Systems %I IEEE Computer Society %P 386-391 %K Program Design and Analysis %A Douglas E. Appelt %T A Planner for Reasoning about Knowledge and Action %J AAAI-80 %I The American Association for Artificial Intelligence %C Stanford, California %D August 1980 %P 131-133 %K Rdpsdis.bib Rsingh %A Douglas E. Appelt %T Planning natural language utterances to satisfy multiple goals %I SRI International, Menlo Park, California %R 259 %D 1982 %A E. Appiani %A G. Barbagelata %A F. Cavagnaro %A B. Conterno %A R. Manara %T EMMA 2 - An Industry-Developed Hierarchical Multiprocessor for Very High Performance Signal Processing Applications %J Problems in Designing Supercomputers: Technologies and Devices SCS 85, First International Conference on Supercomputing Systems %I IEEE Computer Society %P 310-319 %K Industrial Supercomputers: Performance Evaluation and Implementation Details %A E. Appiani %A D. Bianco %A L. Merlo %A L. Roncarolo %T The EMMA2 Multiprocessor Operating System %E Paul Messina %E Almerico Murli %B Practical Parallel Computing %J A.K.A. Concurrency -- Practice and Experience %V 3 %N 6 %I John Wiley and Sons %C New York %D 1992 %P 541-558? %A J. H. Applegate %A M. R. Douglas %A Y. Gursel %A P. Hunter %A C. L. Seitz %A G. J. Sussman %T A Digital Orrery %B The Use of Supercomputers in Stellar Dynamics %I Springer-Verlag %C Berlin %D 1986 %E P. Hut %E S. McMillan %V 267 %P 86-95 %K Super/Parallel Computers, hypercube, cosmic cube, MIMD, message passing, %A J. H. Applegate %A M. R. Douglas %A Y. Gursel %A G. J. Sussman %A J. Wisdom %T The Outer Solar System for 200 Million Years %B The Use of Supercomputers in Stellar Dynamics %I Springer-Verlag %C Berlin %D 1986 %E P. Hut %E S. McMillan %V 267 %P 96-116 %K Super/Parallel Computers %A C. M. Applewhite %T Distributed Computer Architecture for the Discrete Address Beacon System %J 1st International Conference on Distributed Computing Systems %I IEEE %D October 1979 %P 480-489 %K Applications of distributed computing to radar systems %A H. L. Applewhite %A others %T MMBC Software Structures and Implementation %J 1st International Conference on Distributed Computing Systems %I IEEE %D October 1979 %P 725-735 %K Application of distributed computing to modular missile-borne computers %A K. R. Apt %T Recursive Assertions and Parallel Programs %J Acta Informatica %V 15 %D 1981 %P 219-232 %A K. R. Apt %T Formal justification of a proof system for communicating sequential processes %J J. ACM %V 30 %N 1 %P 197-216 %D 1983 %K proof systems CSP %A K. R. Apt %T Correctness proofs of distributed termination algorithms %B Logics and Model of Concurrent Systems %I Springer-Verlag %S NATO ASI %V 13 %E Krzystof R. Apt %P 147-167 %D October 1984 %X See also ACM TPLS paper, vol. 8, no. 3, July 1986, pages 388-407. %A K. R. Apt %A G. D. Plotkin %T Countable nondeterminism and random assignment %J Journal of the ACM %V 33 %N 4 %P 724-767 %D 1986 %K nondeterminism %A K. R. Apt %A L. Bouge %A P. Clermont %T Two normal form theorems for CSP programs %C Amsterdam %D 1987 %R CWI. Department of Computer Science ; R 8735 %M f 4,-- %A K. R. Apt %A N. Francez %A S. Katz %T Appraising fairness in languages for distributed programming %C Amsterdam %D 1988 %M f 5,20 %R CWI. Department of Computer Science ; R 8811 %A Krzysztof R. Apt %A Nissim Francez %A Willem P. De\ Roever %T A Proof System for Communicating Sequential Processes %J ACM Transactions on Programming Languages and Systems %V 2 %N 3 %D July 1980 %P 359-385 %K Hoare-style proof rules, partial correctness, global invariant, cooperating proofs, CSP, communicating processes, concurrency, absence of deadlock, blocking CR Categories: 4.32, 5.24 %A Krzysztof R. Apt %T Ten Years of Hoare's logic: A Survey--Part I %J TOPLAS %D Oct. 1981 %V 3 %N 4 %P 431-483 %K theory, %K from Steve Stevenson (fpst@hubcap.clemson.edu) %A Krzysztof R. Apt, ed. %T Logics and Models of Concurrent Systems %I Springer-Verlag %C Berlin, New York %S NATO ASI %V 13 %D October 1984 %K book, text, proceedings, %A Krzysztof R. Apt %T Proving Correctness of CSP Programs-A Tutorial %B Control Flow and Data Flow: Concepts of Distributed Programming %E Manfred Broy %V 14 %I Springer-Verlag %C Berlin %D 1985 %P 441-474 %A Krzysztof R. Apt %T Real Time Clocks Versus Virtual Clocks %B Control Flow and Data Flow: Concepts of Distributed Programming %E Manfred Broy %V 14 %I Springer-Verlag %C Berlin %D 1985 %P 475-501 %A Krzysztof R. Apt %T Correctness Proofs of Distributed Termination Algorithms %J ACM Transactions on Programming Languages and Systems %V 8 %N 3 %D JUL 1986 %P 388-407 %K AA08 AI11 %K correctness termination %X See also his book Logics and Model of Concurrent Systems. %A Krzysztof R. Apt %A Ernst-Rudiger Olderog %T Verification of Sequential and Concurrent Systems %I Springer-Verlag %C Berlin, New York %S Texts and Monographs in Computer Science %D 1991 %K book, text, %A H. R. Arabnia %A M. A. Olvier %Z Univ. of Kent %T Fast Operations on Raster Images with SIMD Machine Architectures %J Computer Graphics Forum %V 5 %N 1 %D 1986 %P 179-188 %K ICL DAP, %A H. R. Arabnia %A M. A. Olvier %Z Univ. of Kent %T Arbitrary Rotation of Raster Images with SIMD Machine Architectures %J Computer Graphics Forum %V 6 %N 1 %D January 1987 %P 3-12 %K ICL DAP, %A H. R. Arabnia %T Towards a General-Purpose Parallel System for Imaging Operations %J Proceedings of the 1991 International Conference on Parallel Processing %V I, Architecture %I CRC Press %C Boca Raton, FL %D August 1991 %P I-644--I-645 %K poster paper, parallel architectures, %T A Multi-Ring Transputer Network for the Arbitrary Rotation of Raster Images %P I-591--I-592 %A Hamid R. Arabnia %Z U GA %J Proceedings of the 1990 International Conference on Parallel Processing %V I, Architecture %I Penn State U. Press %C University Park, Penn %D August 1990 %K poster session, Application-Specific Parallel Architectures and Systems, %A Ziya Aral %A Ilya Gertner %Z Encore Computer %T Parasight: A High-Level Debugger/Profiler Architecture for Shared-Memory Multiprocessors %J 1988 International Conference on Supercomputing (ICS) %I ACM Press %C St. Malo, France %D July 1988 %P 131-139 %K environments, UNIX, MACH, UMAX, parasite processes, %A Ziya Aral %A Ilya Gertner %Z Encore %T Non-Intrusive and Interactive Profiling in Parasight %J Proceedings ACM/SIGPLAN PPEALS 1988 Parallel Programming: Experience with Applications, Languages and Systems, July 1988, SIGPLAN Notices %C New Haven, CT. %V 23 %N 9 %D September 1988 %P 21-30 %K analysis tools, performance measurement, debugging, %A Ziya Aral %A Ilya Gertner %A Greg Schaffer %T Efficient Debugging Primitives for Multiprocessors %J 3rd Symposium on Architectural Support for Programming Languages and Operating Systems, Computer Architecture News %V 17 %N 2 %C Boston, MA %D April 1989 %P ??? %A Ziya Aral %A Ilya Gertner %A Alan Langerman %A Greg Schaffer %T Variable Weight Processrs With Flexible Resources %J USENIX 1989 Winter Conference %C San Diego, CA %D February, 1989 %A Ziya Aral %A Ilya Gertner %T High-level Debugging in Parasight %J Proc. of the ACM Workshop on Parallel and Distributed Debugging ACM SIGPLAN Notices %T An Integrated Approach to Parallel Programming Debugging and Performance Analysis on Large-Scale Multiprocessors %C Madison, Wisconsin %V 24 %N 1 %P 151-162 %D January 1989 %d May 5-6, 1988 %A Ziya Aral %A Ilya Gertner %A Greg Schaffer %A Jim Grier %T Performance Monitoring on a Shared-Memory Multiprocessor %J Proc. HICSS %V 23 %C Hawaii %D January, 1990 %K debugging, %A Ziya Aral %A Ilya Gertner %A Dave Mitchell %T Process Control Structures for Multiprocessors %J Proc. HICSS %V 24 %C Hawaii %D January, 1990 %K debugging, %A Ziya Aral %A Ilya Gertner %A Dave Mitchell %T Combining Real-Time and Time-Sharing Services on a Multiprocessor %J Proc. Interservice/Industry Training Systems Conference %D October, 1990 %K debugging, %A Mauricio Arango %A Hussein Badr %A David Gelernter %T Staged Circuit Switching %J IEEE Transactions on Computers %V C-34 %N 2 %D February 1985 %P 174-180 %K Communication architectures, communication protocols, network computers, network operating systems, reconfigurable networks Correspondence %A J. L. Aravena %A A. El-Amawy %Z USL %T Time-Optimal Operation of Heterogeneous Arrays %J Proceedings of the 1989 International Conference on Parallel Processing %V I - Architecture (Hardware) %I Penn State %C University Park, Penn %D August 1989 %P I-266--I- %K Regular and Systolic Arrays %A Peter Arbenz %A Kevin Gates %A Christoph Sprenger %T A Parallel Implementation of the Symmetric Tridiagonal QR Algorithm %J Proc. Frontiers '92: Fourth Symp. on Massively Parallel Computation %C McLean, VA %I IEEE %D October 1992 %P 382-388 %K QR algorithm, symmetric tridiagonal matrix, %A M. A. Arbib %A J. A. Robinson %T Natural and Artificial Parallel Computation %I MIT Press %C Cambridge, MA %D 1990 %K book, text, %A Michael A. Arbib %T Neural Computing and Parallel Computation (Invited Talk) %E Garry Rodrigue %B Parallel Processing for Scientific Computing %I SIAM %C Philadelphia, PA %D 1989 %P 393-402 %K architectures, %A Michael A. Arbib %T Neural Computing. Guest Editor's Introduction %J Journal of Parallel and Distributed Computing %V 6 %N 2 %D April 1989 %P 183-184 %K special issue: neural computing %A Michael A. Arbib %T Schemas and Neural Networks for Sixth Generation Computing. Invited Survey %J Journal of Parallel and Distributed Computing %V 6 %N 2 %D April 1989 %P 185-216 %K special issue: neural computing %A James Archibald %A Jean-Loup Baer %T An Economical Solution to the Cache Coherence Problem %J Proceedings of the 11th International Symposium on Computer Architecture, SIGARCH Newsletter %V 12 %N 3 %I IEEE %D June 1984 %K caches in multiprocessors %P 355-362 %X Review and qualitatively evaluate schemes to maintain cache coherence in tightly-coupled multiprocessor systems. %A James Archibald %A Jean-Loup Baer %T Cache Coherence Protocols: Evaluation Using a Multiprocessor Simulation Model %J ACM Transactions on Computer Systems %V 4 %N 4 %D November 1986 %P 273-298 %K JLb, %K grecomended91, %A James Archibald %Z BYU %T A Cache Coherence Approach for Large Multiprocessor Systems %J 1988 International Conference on Supercomputing (ICS) %I ACM Press %C St. Malo, France %D July 1988 %P 337-345 %K memory systems, general interconnection networks, snooping protocols, efficient distributed-write protocol (EDWP), write miss, replacement, %A James K. Archibald %T The Cache Coherence Problem in Shared-Memory Multiprocessors %I Univ. of Washington %R 87-02-06 %D February 1987 %A B. W. Arden %A A. D. Berenbaum %T A multi-microprocessor computer system architecture %J Proc. 5th Symp. on Operating Systems Principles, ACM Operating Systems Review %V 9 %N 5 %C Austin, Texas %D November 1975 %P 114-121 %K multiprocessor architectures and operating systems, maeder biblio: concepts, parallel architecture %K bsatya %A B. W. Arden %A R. Ginosar %T MP/C: A Multiprocessor/Computer Architecture %J Proceedings of 8th Annual International Symposium on Computer Architecture, SIGARCH Newsletter %V 9 %N 3 %D May 1981 %P 3-20 %K Architecture maeder biblio: %X Also check out IEEE TOC May 1982, pages 455-473. %A Bruce W. Arden %A Hikyu Lee %T Analysis of a chordal ring network %J Proc. Workshop on Interconnection Networks for Parallel and Distributed Processing %I Purdue University %D April 1980 %P 93-100 %K Chordal Ring, regular networks, message-passing, multi-microcomputer systems, distributed routing %K bmiya, %A Bruce W. Arden %A Hikyu Lee %T Analysis of Chordal Ring Network %J IEEE Transactions on Computers %V C-30 %N 4 %D April 1981 %P 291-295 %K Chordal Ring, distributed routing, message-passing, multi(micro)computer system, regular networks, multicomputer interconnection, Correspondence %X Reproduced in the 1984 tutorial: \fI Interconnection Networks for parallel and distributed processing\fP by Wu and Feng. Reproduced in Dharma P. Agrawal's (ed.) "Advanced Computer Architecture," IEEE, 1986, pp. 291-295. %A Bruce W. Arden %A Hikyu Lee %T A Regular Network for Multicomputer Systems %J IEEE Transactions on Computers %V C-31 %N 1 %D January 1982 %P 60-69 %K Moore bound, multicomputer system, multitree structured (MTS) graph, regular, grecommended, Multicomputer systems %X Reproduced in the 1984 tutorial: "Interconnection Networks for parallel and distributed processing" by Wu and Feng. %A Bruce W. Arden %A Ran Ginosar %T MP/C: A Multiprocessor/Computer Architecture %J IEEE Transactions on Computers %V C-31 %N 5 %D May 1982 %P 455-473 %K Computer architecture, multicomputers, multiprocessors, supersystems, switched bus, tree-structured computer Special issue on supersystems %X Also see the 1981 Comp. Arch. conference pages 3-20. %A Bruce W. Arden %A Ran Ginosar %T A multi-microcomputer interconnector %J Proceedings of the 1984 International Conference on Parallel Processing %I IEEE %D August 1984 %P 353-355 %K Serializing Star Chip (SSC), VLSI, computer networks %X This interconnector is presented as a VLSI alterative to cross bar switches. The is no real analysis comparing this switch to other switching schema. No failure analysis either. %A A. Ardo %A L. Philipson %T Evaluation of commercially available retargetable and rehostable Ada compilers %J Proc. of the Third Ada-European/AdaTEC Conference %D June 1984 %K preliminary studies, %X Reproduced in the book Lars Philipson, Anders Ardo, and Per Stenstrom, eds. Design Principles for Shared Memory Multiprocessors A collection of papers from the MUMS project Lund University, Lund, Sweden, May 1990 %A Anders Ardo %A Lars Philipson %T A Simple Ada Compiler Invalidation Test %J ACM Ada Letters %V III %N 5 %D April 1984 %P 69-74 %K preliminary studies, %X Reproduced in the book Lars Philipson, Anders Ardo, and Per Stenstrom, eds. Design Principles for Shared Memory Multiprocessors A collection of papers from the MUMS project Lund University, Lund, Sweden, May 1990 %A Anders Ardo %A Lars Philipson %T Implementation of a Pascal Based Parallel Language for a Multiprocessor Computer %J Software - Practice and Experience %V 14 %N 7 %D July 1984 %P 643-657 %K Pascal, multiprocessor, concurrent programming, preliminary studies, %X Reproduced in the book Lars Philipson, Anders Ardo, and Per Stenstrom, eds. Design Principles for Shared Memory Multiprocessors A collection of papers from the MUMS project Lund University, Lund, Sweden, May 1990 %A Anders Ardo %T Experimental implementation of an Ada tasking on the multiprocessor computer Cm* %J Proc. of the Washington Ada Symposium %D March 1984 %P 145-153 %K preliminary studies, %X Reproduced in the book Lars Philipson, Anders Ardo, and Per Stenstrom, eds. Design Principles for Shared Memory Multiprocessors A collection of papers from the MUMS project Lund University, Lund, Sweden, May 1990 %A Anders Ardo %T Efficiency Aspects on Ada run time support for multiprocessors with Shared Memory %R Technical Report %I Lund University %C Lund, Sweden %D March 1986 %K implementation and efficiency aspects of parallel Ada %X Reproduced in the book Lars Philipson, Anders Ardo, and Per Stenstrom, eds. Design Principles for Shared Memory Multiprocessors A collection of papers from the MUMS project Lund University, Lund, Sweden, May 1990 %A Anders Ardo %T Experience Acquiring and Retargeting a Portable Ada Compiler %J Software - Practice and Experience %V 17 %N 4 %D April 1987 %P 291-307 %K Ada, retargeting, back-end, validation, implementation and efficiency aspects of parallel Ada %X Reproduced in the book Lars Philipson, Anders Ardo, and Per Stenstrom, eds. Design Principles for Shared Memory Multiprocessors A collection of papers from the MUMS project Lund University, Lund, Sweden, May 1990 %A Anders Ardo %T Real time efficiency of Ada in a multiprocessor environment %J Proc. of the Intl. Workshop on real time Ada issues, Ada Letters %D May 1987 %K Ada, retargeting, back-end, validation, implementation and efficiency aspects of parallel Ada %X Reproduced in the book Lars Philipson, Anders Ardo, and Per Stenstrom, eds. Design Principles for Shared Memory Multiprocessors A collection of papers from the MUMS project Lund University, Lund, Sweden, May 1990 %A Anders Ardo %T Hardware support for efficient execution of Ada tasking %J Proc. 21st Hawaii Intl. Conf. on System Sciences %V 1 %I IEEE %D January 1988 %P 194-202 %K implementation and efficiency aspects of parallel Ada %X Reproduced in the book Lars Philipson, Anders Ardo, and Per Stenstrom, eds. Design Principles for Shared Memory Multiprocessors A collection of papers from the MUMS project Lund University, Lund, Sweden, May 1990 %A Anders Ardo %A Lars Lundberg %T The MUMS multprocessor Ada Project %J Proc. of the Distributed Ada Symp. '89 %I U. of Southampton %D December 1989 %K layered experimental system, %X Reproduced in the book Lars Philipson, Anders Ardo, and Per Stenstrom, eds. Design Principles for Shared Memory Multiprocessors A collection of papers from the MUMS project Lund University, Lund, Sweden, May 1990 %A James W. Arendt %T Parallel Genome Sequence Comparison Using a Concurrent File System %R UIUCDCS-R-91-1674 %I Univeristy of Illinois %C Urbana-Champaign %D 1991 %K parallel file system, parallel I/O, Intel iPSC/2, %X Studies the performance of Intel CFS. Uses an application that reads in a huge file of records, each a genome sequence, and compares each sequence against a given sequence. Looks at cache performance, message latency, cost of prefetches and directory reads, and throughput. He tries one-disk, one-proc transfer rates. Because of contention with the directory server on one of the two I/O nodes, it was faster to put all of the file on the other I/O node. Striping is good for multiple readers though. Best access pattern was interleaved, not segmented or separate files, because it avoided disk seeks. Apparently the files are stored contiguously. Can get good speedup by reading the sequences in big integral record sizes, from CFS, using a load-balancing scheduled by the host. Contention for directory blocks -- through single-node directory server. [David.Kotz@Dartmouth.edu] %A Ian Argus %Z Caltech %T FORTRAN CUBIX: Definition and Implementation %J 3rd Conference on Hypercube Concurrent Computers and Applications %V I, Architecture, Software, Computer Systems and General Issues %I ACM %C Pasadena, CA %D January 1988 %P 787-791 %r cccp-575 %K general productivity tools, CrOS, Mark III, %A M. B. Ari %T On transposing large 2**n x 2**n matrices %J IEEE Transactions on Computers %D January 1979 %K transpose %A J. Arlat %A W. C. Carter %T Implementation and Evaluation of a (b,k)-Adjacent Error-Correcting/Detecting Scheme for Supercomputer Systems %J IBM Journal of Research and Development %V 28 %N 2 %D March 1984 %P 159-169 %K Omega network %A Ramune Arlauskas %Z Intel %T iPSC/2 System: A Second Generation Hypercube %J 3rd Conference on Hypercube Concurrent Computers and Applications %V I, Architecture, Software, Computer Systems and General Issues %I ACM %C Pasadena, CA %D January 1988 %P 38-42 %K computer systems, NX/2 operating system, NEKTON, %X Commercial presentation, also see articles by Close and Nugent. %A Francois Armand %A Michel Gien %A Frederic Herrmann %A Marc Rozier %Z Chorus Systems, En Yvelines %T Revolution 89 or "Distributing UNIX Brings it Back to its Original Virtues" %J Workshop on Experiences with Distributed and Multiprocessor Systems (WEBDMS) %I Usenix Association %C Ft. Lauderdale, FL %D October 1989 %P 153-174 %r CS-TR-89-36 %K Performance Considerations, Chorus distributed operating system, %A Francois Armand %T UNIX et la re'partition: retour a` la simplicite' originelle ? %I Chorus syste`mes %R CS-TR-90-11 %D 1990 %K Chorus distributed operating system, %X Article publie' a` la convention AFUU'90 %A J.W. Armitage %A J.V. Chelini %T Ada Software on Distributed Targets: A Survey of Approaches %J Ada Letters %V 4 %N 4 %P 32-37 %D January, February 1985 %A Cedric V.W. Armstrong %A Eli T. Fathi %T A Fault-tolerant Multimicroprocessor-based Computer System for Space-based Signal Processing %J Micro %I IEEE %V 4 %N 6 %D Dec. 1984 %P 54-65 %K fasp multiprocessor interconnection network %A J. Armstrong %T Optimization of Householder Transformations Part I: Linear Least Squares %J Proceedings of the 1987 International Conference on Parallel Processing %I Penn State %C University Park, Penn. %D August 1987 %P 495-498 %K Numerical Algorithms %A J. A. Armstrong %T Technology Overview %B Supercomputing %E N. Metropolis %E D. H. Sharp %E W. J. Worlton %E K. R. Ames %I University of California %D 1986 %P 4-15 %A J. R. Armstrong %A F. G. Gray %T Fault Diagnosis in a Boolean n Cube Array of Microprocessors %J IEEE Transactions on Computers %V C-30 %N 8 %D August 1981 %P 587-590 %K Array, diagnosability, faults, fault tolerance, microprocessor, network correspondence %X Reproduced in the 1984 tutorial: \fI Interconnection Networks for parallel and distributed processing\fP by Wu and Feng. %A Jim Armstrong %Z Convex %T Algorithm and Performance Notes for Block LU Factorization %J Proceedings of the 1988 International Conference on Parallel Processing %V III, Algorithms and Applications %I Penn State %C University Park, Penn %D August 1988 %P 161-164 %K Numeric Algorithms, Gaussian elimination, dense systems, matrix-vector algorithms, Fortran, linear algebra, %A Joe Armstrong %A Robert Virding %A Mike WIlliams %T Concurrent Programming in ERLANG %I Prentice-Hall %C New York %D 1993 %K book, text, %A Phil Armstrong %T Computer Security and Its Changing Emphasis %J 1989 Spring Proceedings Cray User Group Meeting %I CUG %C Washington DC %D Spring 1989 %P 48-53? %A S. Armstrong %A K. Marzullo %A E. Morrison %A F. Schmuck %A K. P. Birman %A T. A. Joseph %T RNFS - A Highly Available Network File Service %J Proceedings: Workshop on Workstation Operating Systems %I IEEE Computer Society Technical Committee on Operating Systems %C Cambridge, MA %D 5-6 November 1987 %A S. V. W. Armstrong %A N. A. Brans %A H. M. Ahmed %T An Adaptive Multimicroprocessor Array Computing Structure for Radar Signal Processing Applications %J Proceedings of 6th Annual Symposium on Computer Architecture %D 1979 %K University of Ottawa, I. P. Sharp Associates Ltd, Miller Communications Systems Ltd. %P 68-74 %A W. W. Armstrong %A A. S. Mohamed %T A Mixed-Flow Query Processing Strategy for a Multiprocessor Database Machine %J Proceedings of the 5th International Conference on Distributed Computing Systems %I IEEE Computer Society %C Denver, Colorado %D May 1985 %K Distributed Query Processing %P 292-299 %A W. W. Armstrong %A T. A. Marsland %A M. Olafsson %A J. Schaeffer %T Solving Equations of Motion on a Virtual Tree Machine %E C. W. Gear %E R. G. Voigt %B Selected Papers from the Second Conference on Parallel Processing for Scientific Computing %I SIAM %C Philadelphia %D 1987 %P s59-s72 %K dynamics of open chains, equations of motion, animation, robotics, parallel computation, ordinary differential equations AMS(MOS) subject classification 65L99 70-04 70-08 70-09 %X Also noted as: SIAM Journal of Statistical and Scientific Computing, vol. 8, no. 1 (January 1987). %A Speros Armyros %T ON THE BEHAVIOUR OF ETHERNET: ARE EXISTING ANALYTIC MODELS ADEQUATE? %R CSRI-259 %I Computer Systems Research Institute, the University of Toronto %D February 1992 %K M.Sc. Thesis, DCS %A W. David Arnett %Z University of Chicago %T Creative Supercomputing %J Proceedings of 1986 Array Conference %C Portland, Oregon %D April 1986 %$ 35.00 %X Our experiences with an Apollo DOMAIN as a 4.2 BSD Unix host for a Floating Point Systems 164 Scientific Computer have direct implications for (1) strategy and practice of supercomputer use, (2) design of future very high performance scientific workstations, (3) choice of software environments for interactive use of supercomputers, and (4) design of nodes for remote use of supercomputers. The solved and unsolved problems will be discussed. We plan to use the system as a testbed and analysis engine for problems computed on the Cray XMP at the National Center for Supercomputing Applications at Urbana. %A Steven Arno %A Ken Iobst %T The Petasys Supercomputer and a Class of Pseudo-Random Number Generators %R SRC-TR-92-069 %I Supercomputing Research Center, IDA %C Bowie, MD %D April 1992 %K Mersenne Prime, multiplicative Fibbonaci sequence, PETASYS supercomputer, pseudo-random number generator, SIMD, PASSWORK, %A A. Arnold %T Synchronisation Behaviours of Processes and Rational Relations %J Acta Informatica %V 17 %D 1982 %P 21-29 %A C. Arnold %A M. Parr %A M. Dewe %T An Efficient Parallel Algorithm for the Solution of Large Sparse Linear Matrix Equations %J IEEE Transactions on Computers %V C-32 %P 265-273 %D 1983 %X Must find keywords and write a short annotation. %A C.N. Arnold %T Programming the ETA10 for Large Problems in Stellar Dynamics %B The Use of Supercomputers in Stellar Dynamics %I Springer-Verlag %C Berlin %D 1986 %E P. Hut %E S. McMillan %V 267 %K Super/Parallel Computers %P 54-61 %A Clifford Arnold %T Parallel Fortran: Why You Can't How You Can. (Abstract) %E Garry Rodrigue %B Parallel Processing for Scientific Computing %I SIAM %C Philadelphia, PA %D 1989 %P 306 %K languages, %A Clifford N. Arnold %T Performance evaluation of three automatic vectorizer packages %J Proceedings of the 1982 International Conference on Parallel Processing %D August 1982 %I IEEE %P 235-242 %K CDC, CYBER 203/205, LLNL kernels, Large-scale scientific processing %A Clifford N. Arnold %T Vector optimization on the CYBER 205 %J Proceedings of the 1983 International Conference on Parallel Processing %I IEEE %D August 1983 %P 530-536 %K CDC, pipelining %X Also reprinted in the text compiled by Kai Hwang: "Supercomputers: Design and Application," IEEE, 1984. %A Clifford N. Arnold %T Machine Independent Techniques for Scientific Supercomputing %J Digest of Papers COMPCON, Spring 84 %I IEEE %D Feb. 1984 %P 74-83 %K Supercomputing, parallelism, vector processing, memory partitioning, hierarchical memory, multiprocessing, Super scientific computers %X A plea for programs to use machine independent techniques for programming (Programming for long-range portability). Memory partitioning is given as an example. %A Edward Arnold %A Michael G. Rossman %T Analysis and Representation of Complex Biological Structure by Computer: Application to the Three-dimensional Structure Determination of a Human Common Cold Virus %J Second International Conference on Supercomputing, Proceedings Supercomputing '87, Industrial Supercomputer Applications and Computations %V II %I International Supercomputing Institute, Inc. %D 1987 %P 351 %A J.O. Arnold %A D.M. Cooper %T Computational Chemistry %J Second International Conference on Supercomputing, Proceedings Supercomputing '87, Industrial Supercomputer Applications and Computations %V II %I International Supercomputing Institute, Inc. %D 1987 %P 166-179 %A J.O. Arnold %A G.S. Deiwert %A D.M. Cooper %T Aerothermodynamics and Computational Chemistry at NASA Ames Research Center: Current Capabilities and Projected Supercomputer Needs %J Proceeding Supercomputing '88: Technology Assessment, Industrial Supercomputer Outlooks, European Supercomputing Accomplishments, and Performance & Computations %I Third International Conference on Supercomputing (ICS '88) %C St. Petersberg, FL %V 2 %D 1988 %P 25-43 %A J. S. Arnold %A D. P. Casey %A R. H. McKinstry %T Design of tightly-coupled multiprocessing programming %J IBM Systems Journal %V 13 %N 1 %D 1974 %P 60-87 %K rwa, %A Jeffrey M. Arnold %A Duncan A. Buell %A Elaine G. Davis %T SPLASH II %R SRC-TR-92-061 %I Supercomputing Research Center, IDA %C Bowie, MD %D March 1992 %K DNA sequence matching, SIMD computing, SPLASH, systolic computing, text retrieval, Xilinx FPGA, %A L. Arnold %T Possible applications of array processors for the problem of image data compression %B Products of Automata %E W. Brauer %E G. Rosenberg %E A. Salomaa %D 1986 %I Springer-Verlag %C Berlin %P 53-62 %K Array Systems %A R. G. Arnold %A E. W. Page %T A hierarchical restructurable multi-microprocessor architecture %J Proceedings of the 3rd Annual Symposium on Computer Architecture %C Clearwater, Florida %D January 1976 %P 40-45 %K multiprocessor architectures and operating systems, multi-microprocessors %K bsatya %A R. G. Arnold %A others %T MMBC Architecture %J 1st International Conference on Distributed Computing Systems %I IEEE %D October 1979 %P 707-724 %K Application of distributed computing to modular missile-borne computers %A Robert G. Arnold %A Robert O. Berg %A James W. Thomas %T A Modular Approach to Real-Time Supersystems %J IEEE Transactions on Computers %V C-31 %N 5 %D May 1982 %P 385-398 %K Architectural building blocks, architecture optimization, data driven software structure, distributed computing, example system sizing, expandable, high performance, high throughput, memory/processor tradeoff, real-time embedded computers, Special issue on supersystems %A Dennis S. Arnon, ed. %T Report of the Workshop on Supercomputers and Symbolic Computation %I Computer Science Department, Purdue University %R CSD-TR-481 %D June 1984 %X Discusses issues like LISP vs. prolog, interfacing both to FORTRAN, automatic parallelism, and the like. It was a "here are our problems" meeting. %A N. Arnot %A G. Wilkinson %A R. Burge %T Applications of the ICL DAP for two-dimensional Image Processing %I Queen Elizabeth College (QEC) %C London %J Proceedings of Chester Conference %K Rdap, %A Matthew Arnott %A Sara Latta %Z NCSA %T Perspectives on visualization %J IEEE Spectrum %V 29 %N 9 %D September 1992 %P 61-65 %K special issue on supercomputing, Teraflops galore, emerging applications, %K survey, computer graphics, %X Uses Rashomon analogy. %A E. Arnould %A H. T. Kung %A O. Menzilcioglu %A K. Sarocky %T A systolic array computer %J IEEE International Conference on Acoustics, Speech and Signal Processing %D March 1985 %P 232-235 %K Rhighnam, architecture, Warp %A Emmanuel A. Arnould %A Francois J. Bitz %A Eric C. Cooper %A H. T. Kung %A Robert D. Sansom %A Peter A. Steenkiste %Z CMU %T The Design of Nectar: A Network Backplane for Heterogeneous Multicomputers %J 3rd Symposium on Architectural Support for Programming Languages and Operating Systems, Computer Architecture News %V 17 %N 2 %C Boston, MA %D April 1989 %P 205-216 %A A. Arora %A S. Dolev %A M. Gouda %T Maintaining Digital Clocks in Step %J Parallel Processing Letters %V 1 %N 1 %D September 1991 %P 11-18 %A R. K. Arora %A S. P. Rana %T On Module Assignment in Two Processor Distributed Systems %J Information Processing Letters %V 9 %N 3 %D 1979 %P 113-117 %A R. K. Arora %A S. P. Rana %T Analysis of the Module Assignment Problem in Distributed Systems with Limited Memory %J Information Processing Letters %V 10 %N 3 %D 1980 %P 111-115 %A R. K. Arora %A N. K. Sharma %T Guarded Procedure: A Distributed Programming Concept %J Information Processing Letters %V 13 %N 4/5 %D 1981 %P 199-203 %A Dale J. Arpasi %A Edward J. Milner %Z NASA LeRC %T Mathematical Model Partitioning and Packing for Parallel Computer Calculation %J Proceedings of the 1986 International Conference on Parallel Processing %I IEEE %D August 1986 %P 67-74 %K Mathematical analysis and computation, ODEs, critical path, multiprocessor, parallel algorithm, %X This is not problem partitioning. %A David A. Arpin %A Yongmin Kim %Z U Wa %T ParSOR: A Parallel Processor for Sparse Matrix Solution by SOR Iteration %J Proceedings of the 1986 International Conference on Parallel Processing %I IEEE %D August 1986 %P 684-687 %K Systolic Architecture, Gauss-Seidel, simulation, bus/mesh, %X Yet another ILLIAC design. Paper says nothing about software. %A Shala Arshi %A Ray Asbury %A Joe Brandenburg %A David Scott %Z Intel %T Application Performance Improvement on the iPSC*/2 %J 3rd Conference on Hypercube Concurrent Computers and Applications %V I, Architecture, Software, Computer Systems and General Issues %I ACM %C Pasadena, CA %D January 1988 %P 149-154 %K performance analysis, LINCUBE, FFT, %A E. Arthurs %A B. W. Stuck %T A Performance Analysis of Single versus Multiple Processors %J Computer Software and Applications Conference (COMPSAC79) %I IEEE %D November 1979 %P 788 %K Bell Labs %A Y. Artsy %T Routing Objects on Action Paths %J Proc. 10th International Conference on Distributed Computing Systems %I IEEE %C Paris, France %D May-June 1990 %P 572-579 %A Yeshayahu Artsy %A Hung-Yang Chang %A Raphael Finkel %T Charlotte: Design and Implementation of A Distributed Kernel %I University of Wisconsin-Madison %R Computer Sciences Technical Report #554 %D August 1984 %A Yeshayahu Artsy %A Hung-Yang Chang %A Raphael Finkel %T Processes migrate in Charlotte %R Technical Report 655 %I Computer Sciences Department, University of Wisconsin-Madison %D August 1986 %K Dynamic Load Balancing in Distributed Systems %A Yeshayahu Artsy %A Hung-Yang Chang %A Raphael Finkel %Z University of Wisconsin-Madison %T Interprocess Communication in Charlotte %J IEEE Software %V 4 %N 1 %r 632 %d February 1986 %D January 1987 %P 22-28 %K Crystal multicomputer, %A Yeshayahu Artsy %A Raphael Finkel %T Designing a Process Migration Facility: The Charlotte Experience %J Computer %I IEEE %V 22 %N 9 %D September 1989 %P 47-56 %A Arvind %A K. P. Gostelow %T A new interpreter for dataflow and its implications %R Tech. Rep. 72 %I Dept. of Information and Computer Science, Univ. of California %C Irvine, CA %D October 1975 %A Arvind %A K. P. Gostelow %T A Computer Capable of Exchanging Processors for Time %J Information Processing 77: Proceedings of the IFIP Congress 77 %P 849-853 %D August 1977 %K Rdf, %A Arvind %A K. P. Gostelow %T Some Relationships Between Asynchronous Interpreters of a Dataflow Language %B Formal Descriptions of Programming Concepts: Proceedings of the IFIP Working Conference %E E. J. Neuhold %D August 1977 %P 95-119 %K Rdf, %A Arvind %A K. P. Gostelow %A W. Plouffe %T Indeterminacy, Monitors and Dataflow %J Proceedings of the Sixth ACM Symposium on Operating System Principles, Operating Systems Review %V 11 %N 5 %D November 1977 %P 159-169 %K Rdf, R sosp, %A Arvind %A K. P. Gostelow %A W. Plouffe %T An Asynchronous Programming Language and Computing Machine %R 114a %I University of California %C Irvine, CA %K bhibbard %D 1978 %A Arvind %A K. P. Gostelow %T Dataflow Computer Architecture: Research and Goals %I Dept. of Information and Computer Science, Univ. of California %C Irvine, CA %R TR-113 %D February 1978 %A Arvind %A R. Bryant %T Parallel Computers for Partial Differential Equations Simulation %J Proceedings Scientific Computer Information Exchange Meeting %C Livermore, CA %D 1979 %P 94-102 %A Arvind %A R. E. Bryant %T Design Considerations for a Partial Differential Equation Machine %J Scientific Computer Information Exchange Meeting %P 92-102 %D September 1979 %K Rdf, %A Arvind %T Decomposing a Program for Multiple Processor Systems %J Proceedings of the 1980 International Conference on Parallel Processing %I IEEE %D August 1980 %P 7-14 %K Software and Languages %A Arvind %A V. Kathail %A K. Pingali %T A Processing Element for a Large Multiple Processor Dataflow Machine %J Proceedings IEEE International Conference on Circuits and Computers %I IEEE %V 2 %P 601-605 %D October 1980 %K Rdf, %A Arvind %A R. E. Thomas %T I-Structures: An Efficient Data Type for Functional Languages %I Laboratory for Computer Science %R TM-178 %C Cambridge, MA %D September 1980 %K Rdf, %A Arvind %A V. Kathail %T A Multiple Processor Data Flow Machine that Supports Generalized Procedures %J Proceedings of 8th Annual International Symposium on Computer Architecture, SIGARCH Newsletter %V 9 %N 3 %D May 1981 %P 291-302 %K data flow machines %A Arvind %A Kim P. Gostelow %T The U-interpreter %J Computer %V 15 %N 2 %D February 1982 %P 42-49 %K programming languages, %K bmiya, %X Special issue on data flow computation. Reproduced in "Selected Reprints on Dataflow and Reduction Architectures" ed. S. S. Thakkar, IEEE, 1987, 205-212. %X Reproduced in David J. Lilja's (ed.) Architectural Alternatives for Exploiting Parallelism, IEEE Press, Los Alamitos, CA, 1991, pages 176-. %X * By giving a unique name to every activity generated during a computation, the U-interpreter can provide greater concurrency in the interpretation of data flow graphs. %A Arvind %A Robert A. Iannucci %T A Critique of Multiprocessing von Neumann Style %J Proceedings of 10th Annual International Symposium on Computer Architecture, SIGARCH Newsletter %D June 1983 %V 11 %N 3 %P 426-436 %r Computation Structures Group Memo 226 %i Laboratory for Computer Science, MIT %d April 1982 %K caches, cache coherence, data flow, multiported memories, multiprocessors, packet communication, von Neuman architecture, artificial intelligence, %X A thoughtful article for those unfamiliar with the problem of general control flow multiprocessing. Also reprinted in the text compiled by Kai Hwang: "Supercomputers: Design and Application," IEEE, 1984. %X The ability to tolerate long latencies for memory requests and the ability to achieve unconstrained, yet synchronized, access to shared data are defined and the ways in which they are addressed by some of the current and past von Neumann multiprocessor projects are examined. %A Arvind %A Robert A. Iannucci %T Two Fundamental Issues in Multiprocessing: The Dataflow Solution %R MIT/LCS/TM-241 %I MIT %C Cambridge, MA 02139 %D September 1983 %X See MIT 226-5 July 25 1986 which succeed this memo. %A Arvind %A Vinod Kathail %A Keshav Pingali %T Sharing Computation in Functional Language Implementations %J International Workshop on High-Level Computer Architecture %I Univ. of Maryland %D May 1984 %P 5.1-5.12 %K Reduction language architectures, Rhlca, %A Arvind %A Robert A. Iannucci %T Two Fundamental Issues in Multiprocessing: The Dataflow Solution %R Computation Structures Group Memo 226-3 %D August 7, 1985 %I Massachusetts Institute of Technology %C Cambridge, Massachusetts %A Arvind %A David E. Culler %T Dataflow Architectures %Z MIT %J Annual Reviews in Computer Science %V 1 %P 225-53 %D 1986 %r TM-294 %d February 1986 %K grecommended91, %K jlh, dp, JLb, %X Not detailed, but reasonably current survey paper on data flow. Includes status information of American, English, France, and Japanese dataflow projects like the SIGMA-1 (Japan), Manchester (English), and so forth. Reproduced in "Selected Reprints on Dataflow and Reduction Architectures" ed. S. S. Thakkar, IEEE, 1987, pp. 79-101. %X (JLH & DP) This paper discusses the basic ideas behind dataflow machines. The basic concepts of dataflow were espoused by Dennis: Dennis, J. [1980]. "Dataflow Supercomputers," Computers vol. 13, no. 11 (November), pages 48-56. %A Arvind %A Robert A. Iannucci %T Two Fundamental Issues in Multiprocessing %R Computational Structures Group Memo 226-5 %I MIT %C Cambridge, MA 02139 %D July 1986 %K caches, cache coherence, dataflow architectures, hazard resolution, instruction pipelining, load/store architectures, memory latency, multiprocessors, multi-thread architectures, semaphores, synchronization, von Neumann architecture, %X Very similar to MIT LCS Tech Rept 241 in 1983. Reproduced in "Selected Reprints on Dataflow and Reduction Architectures" ed. S. S. Thakkar, IEEE, 1987, pp. 140-164. %A Arvind %A R. A. Iannucci %T Two Fundamental Issues in Multiprocessing %J Proceedings of DFVLR Conference on Parallel Processing in Science and Engineering %D 1987 %K dataflow processors, fine-grain parallel architectures, %X Reproduced in David J. Lilja's (ed.) Architectural Alternatives for Exploiting Parallelism, IEEE Press, Los Alamitos, CA, 1991, page 184-. %A Arvind %A Kattamuri Ekanadham %T Future Scientific Programming on Parallel Machines %I IBM T. J. Watson Research Center %C Yorktown Heights, NY %R RC 12856 (#57810) %D June 1987 %A Arvind %A Rishiyur S. Nikhil %T Executing a program on the MIT Tagged-Token Dataflow %B PARLE: Parallel Architectures and Languages Europe (Vol. II) %S Lecture Notes in Computer Science %E G. Goos %E J. Hartmanis %V 259 %P 1-29 %I Springer-Verlag %D June 1987 %C Eindhoven, The Netherlands %A Arvind %A David E. Culler %A Gino K. Maa %T Assessing the Benefits of Fine-Grain Parallelism in Dataflow Programs %J International Journal of Supercomputer Applications %V 2 %N 3 %D Fall 1988 %P 10-36 %A Arvind %A David E. Culler %A Gino K. Maa %Z LCS, MIT %T Assessing the Benefits of Fine-grain Parallelism in Dataflow Programs %J Proceedings Supercomputing'88 %I IEEE and ACM SIGARCH %C Orlando, FL %D November 1988 %P 60-69 %K data flow systems, parallelism profile, granularity, program graphs, ideal execution, PIC, SIMPLE, %X Looks like some stuff done for IBM RP3. %A Arvind %A Kattamuri Ekanadham %T Future Scientific Programming on Parallel Machines %J Journal of Parallel and Distributed Computing %V 5 %N 5 %D October 1988 %P 460-493 %K special issue on languages, compilers, and environments for parallel programming, grecommended (2), %K parallel execution functional languages %A Arvind %A R. S. Nikhil %T Executing a Program on the MIT Tagged-Token Dataflow Architecture %J IEEE Transactions on Computers %V C-39 %N 3 %D March 1990 %P 300-318 %X Overview of Id programming language, compilation to dataflow graphs and the TTDA architecture. %K Monsoon, dynamic dataflow, Id %K Monsoon architecture, %K Id compilation dataflow graphs Tagged-Token Dataflow Architecture, including split phase transactions %A Arvind %A K. Pingali %T Safe Data-Driven Evaluation %I Functional Languages and Architectures Group, Laboratory for Computer Science, MIT %C Cambridge, MA %D 19xx %K Rdf, %A S. Arvindam %A V. Kumar %A V. N. Rao %T Efficient Parallel Algorithms for Search Problems: Applications in VLSI CAD %J Proc. Frontiers 90 Conference on Massively Parallel Computation %D October 1990 %A Sunil Arvindam %A Vipin Kumar %A V. Nageshwara Rao %T Floorplan Optimization on Multiprocessors %J Proc. ICCD-89 (Intl. Conference on Computer Design) %D October 1989 %A Sunil Arvindam %A Vipin Kumar %A V. Nageshwara Rao %A Vineet Singh %T Automatic Test Pattern Generator on Parallel Processors %R TR 90-20 %I Univ. MN %C Minneapolis, MN %D May 1990 %X Short version in Proc. Intl. Conference on Knowledge-Based Computer Systems, December 1989 %A Arun K. Arya %A David Woods %A Charles Murphy %T Mathematical Syntax for SISAL %E John T. Feo %E Christopher Frerking %E Patrick J. Miller %B Proceedings of the Second Sisal User's Conference %R CONF-9210270 %I LLNL %C Livermore, CA %D December 1992 %P 175-191 %A S. Arya %A D. Calahan %T Optimal Scheduling of Assembly Language Kernels for Vector Processors %J 19th Allerton Conference on Communications, Control, and Computers %I University of Illinois %D 1981 %A Siamak Arya %T Optimal Instruction Scheduling for a Class of Vector Processors: An Integer Programming Approach %R CRL-TR-19-83 %I Univ. of MI, Computing Research Lab. %C Ann Arbor, MI %D April 1983 %A Siamak Arya %T An Integer Programming Model for Optimal Register Assignment To Achieve Optimal Instruction Schedules for Super-Computers %J Second International Conference on Supercomputing, Proceedings Supercomputing '87, Industrial Supercomputer Applications and Computations %V II %I International Supercomputing Institute, Inc. %D 1987 %P 451-458 %A Siamak Arya %A Blaine Gaither %Z Gould, CSD, San Diego %T Parallel Algorithm Development Workbench %J Proceedings Supercomputing '88 %I IEEE and ACM SIGARCH %C Orlando, FL %D November 1988 %P 11-17 %K program development, %X Presentation lacked fire. Implementation details thin. %A Katsuhiko Asada %A Hiroaki Terada %T Hardware Structure of a One-Chip Data-Driven Processor: Q-p %J Proceedings of the 1987 International Conference on Parallel Processing %I Penn State %C University Park, Penn. %D August 1987 %P 327-329 %K Architecture %A Koichi Asakura %A Toyohide Watanabe %A Noboru Sugie %T A Program Partitioning Method for Parallelization on Distributed Processing Environment %J Proceedings Second Parallel Computing Workshop (PCW'93) %I Fujitsu Laboratories %C Kawasaki, Japan %D November 1993 %P P1-A-1--P1-A-11 %K FPCRF, AP1000, %A Tetsuo Asano %A Hiroshi Umeo %T Systolic algorithms for computing the visibility polygon and triangulation of a polygonal region %J Parallel Computing %V 6 %N 2 %D February 1988 %P 209-216 %K Systolic algorithm, computational geometry, algorithm design, visibility polygon, triangulation %A G. G. Asatiani %a T. O. Kublashvili %A R. Z. Mirianashvili %A L. V. Skobeleva %A V. G. Chachanidze %T Design of Multifunctional Cells in a Rearrangeable Multi-Purpose Uniform Computing Array %t Voprosi synteza mnogofunktcionalnikch iatcheek perestraivaemoi universalnoi odnorodnoi vitchislitelnoi strukturi %J Avtomatika i telemekchanika %N 7 %D 1979 %P 146-155 %p 1064-1071 [English translation] %X Russian. Try Automation and Remote Control by Plenum Publishing. %A G. G. Asatiani %A V. G. Chachanidze %T Redundancy of Digital Units in Uniform Computing Arrays %t Voprosi rezervirovania tcifrovikch ustroistv v odnorodnikch vitchislitelnikch strukturakch %J Avtomatika i telemekchanika %N 1 %D 1981 %P 154-165 %X Russian only. Try Automation and Remote Control by Plenum Publishing. %A Raymond K. Asbury %A David S. Scott %T FORTRAN I/O on the iPSC/2: Is there read after write? %J Fourth Conference on Hypercube Concurrent Computers and Applications %I IEEE %C Monterey, CA %D March 1989 %P 129-132 %K parallel I/O, hypercube, Intel iPSC/2, file access pattern, %K DMCC4, %A Victor Aschenbach %T The Field Test Process at CRAY Research, Inc. %J Fall 1986 Proceedings Cray User Group Meeting %I CUG %C Albuquerque, NM %D Fall 1986 %P 150-151? %K operating systems, %A R. A. Aschenbrenner %A M. J. Flynn %A G. A. Robinson %T Intrinsic Multiprocessing %J Proc. AFIPS 1967 Spring Joint Computer Conference %I AFIPS Press %D 1967 %P 81-86 %A W. L. Ash %T Mxec: Parallel Programming with an Advanced Macro Facility %J Communications of the ACM %V 24 %N 8 %D August 1981 %P 502-509 %A Thomas Ashbrook %T DD-40 and DD-49 Disk Drives on the X-MP %J 1988 Spring Proceedings Cray User Group Meeting %I CUG %D Spring 1988 %P 406-410? %K performance, %A Thomas V. Ashbrook %Z CRI %T DD-40 and DD-49 Disk Drives on the X-MP %J Cray User Group 1988 Spring Proceedings %C Minneapolis, MN %D 1988 %P 406-410 %K 21st Meeting, %A Raymond Ashbury %Z Intel %T High Performance Fortran: The Intel/Digital Collaboration %J Proceedings Intel Supercomputer Users' Group 1992 Annual Users' Conference %C Dallas, TX %D October 1992 %P 63-73 %K viewgraphs, %A Ashcraft %A Eisenstat %A Liu %T A fan-in algorithm for distributed sparse numerical factorization %J SIAM J. Sci. Stat. Comput. %V 11 %P 593-599 %D 1990 %K memory scaling, %A Ashcraft %T A taxonomy of distributed Dense LU factorization methods %R Technical Report ECA-TR-161 %I Boeing Computer Services %D March 1991 %K memory scaling, %A C. Cleveland Ashcraft %T A Moving Computation Front Approach for Vectorizing ICCG Calculations %I General Motors Research Laboratories %R GMR-5174 %D October 25, 1985 %A E. A.? Ashcraft %T The fan-both family of column-based distributed Cholesky factorization algorithms %R Technical Report ECA-TR-208 %I Boeing Computer Services %D December 1992 %A E. A. Ashcroft %A R. Jagannathan %A A. A. Faustini %A B. Huey %T Eazyflow Engines for Lucid- A Family of Supercomputer Architectures Based upon Demand-Driven and Data-Driven Computation %J Problems in Designing Supercomputers: Technologies and Devices SCS 85, First International Conference on Supercomputing Systems %I IEEE Computer Society %P 513-523 %K Software Problems of Data-Flow Architectures %A E. A. Ashcroft %A W. W. Wadge %T Lucid, a Nonprocedural Language with Iteration %J Communications of the ACM %V 20 %N 7 %P 613-641 %D August 1978 %K Rdf, %A E. A. Ashcroft %T Eazyflow Architecture %R Technical Report CSL-147 %I SRI International %C Menlo Park %D April 1985 %K hybrid systems, operator nets, Lucid, demand-driven computation, %X Reproduced in "Selected Reprints on Dataflow and Reduction Architectures" ed. S. S. Thakkar, IEEE, 1987, pp. 395-432. %A E. A. Ashcroft %A R. Jagannathan %T Operator Nets %B Fifth Generation Computer Architectures %I North-Holland %E J. V. Woods %D 1986 %P 177-201 %A E. A. Ashcroft %T Dataflow and education: data-driven and demand-driven distributed computation %B Current Trends in Concurrency: Overviews and Tutorials %E J. W. de\ Bakker %E W.-P. de\ Roever %E G. Rozenberg %S Lecture Notes in Computer Science %V 224 %I Springer-Verlag %C New York, NY %D 1986 %P 1-50 %A E. A. Ashcroft %A J. I. Glasgow %A R. Jagannathan %A G. H. MacEwen %A D. B. Skillicorn %T Syntax, Semantics, and Application of Operator Nets %E John A. Sharp %B Data Flow Computing: Theory and Practice %I Ablex Publishing %C Norwood, NJ %D 1992 %P 508-532 %A Immanenni Ashok %A John Zohorjan %T Scheduling a Mixed Interactive and Batch Workload on a Parallel, Shared Memory Supercomputer %J Proceedings Supercomputing'92 %I IEEE %C Minn., MN %D November 1992 %P 616-625 %K distributed storage, %A Mike Ashworth %A Andrew G. Lyne %T A segmented FFT algorithm for vector computers %J Parallel Computing %V 6 %N 2 %D February 1988 %P 217-224 %K CYBER-205, FFT, vector computers, vectorization %A Ole John Aske %A Oystein Torbjornsen %Z Norw. Inst. Tech. %T Communication on H16 - A Study of Methods and Performance in a Hypercubic Network Based on Dual Port RAM %J Proceedings of the Fifth Distributed Memory Computing Conference %V II, Architecture Software Tools, and Other General Issues %I IEEE %C Charleston, SC %D April 1990 %P 660-669 %K Dual Ported Memory Computers 5th DMCC, %A C. Askew, ed. %T Occam and the Transputer - Research and Applications %I IOS %C P. O. Box 2848, Springfield, VA, 22152-2848 %D 1988 %A C. R. Askew %A D. B. Carpenter %A J. T. Chalker %A A. J. G. Hey %A M. Moore %A D. A. Nicole %A D. J. Pritchard %T Monte Carlo simulation on transputer arrays %J Parallel Computing %V 6 %N 2 %D February 1988 %P 247-258 %K Multiprocessors, transputer array, Monte Carlo simulation, two-dimensional spin system simulation, parallelization, parallelism. %A S. Askew %A F. Walkden %T On The Design and Implementation of a Package for Solving a Class of Partial Differential Equations %B Supercomputers and Parallel Computation %E D. Paddon %I Clarendon Press %C Oxford %D 1984 %P 107-114 %A S. L. Askew %A F. Walkden %T On Programming Parallel Computers to Solve Engineering Fluid Dynamics Problems %I North-Holland %B Parallel Computing 83 %E M. Feilmeier %E G. Joubert %E U. Schnedel %P 279-285 %D 1984 %K DAP, %A S. L. Askew %A F. Walkden %T On the Design and Implementation of a Package for Solving a Class of Partial Differential Equations on the ICL Distributed Array Processor %E D. J. Paddon %B Supercomputers and Parallel Computation %I Clarendon Press %C Oxford, England %D 1984 %P 107-114 %K Explicit solvers, computational fluid dynamics, PDEPACA, DAP, %T On Designing Hardware-Efficient Parallel Architectures for the Class NC %P I-194--I-197 %A Javaid Aslam %Z SUNY, Buffalo %J Proceedings of the 1990 International Conference on Parallel Processing %V I, Architecture %I Penn State U. Press %C University Park, Penn %D August 1990 %K Performance Modeling and Evaluation, VLSI area efficiency, communication efficiency, interconnection networks, NC algorithms, distributed processing, %A S. Aslam %A R. Bramley %A H. C. Chen %A G. Cybenko %A others %T The Advanced Software Development and Commercialization Project Progress Report PR-1 %R CSRD Report #1047 %I U. Ill. %C Urbana-Champaign %D September 1990 %K parallel applications in CFD and SD, %A Moritoshi Aso %T Simulator of XP's %R TR-041 %I ICOT %C Tokyo, Japan %D January 1984 %K parallel prolog, or-parallelism, guarded command, synchronization, %X In Japanese. %A D. Aspinall %T Architecture %B Distributed Computing - Part IV Closely-Coupled Systems %E Fred B. Chambers %E David A. Duce %E Gillian P. Jones %I Academic Press %S APIC Studies in Data Processing %V 20 %D 1984 %P 219-229 %K shared memory, transputer, test and set, %A D. Aspinall %T Cyba-M %B Distributed Computing - Part IV Closely-Coupled Systems %E Fred B. Chambers %E David A. Duce %E Gillian P. Jones %I Academic Press %S APIC Studies in Data Processing %V 20 %D 1984 %P 267-276 %A M. W. Asprey %T Vectorization for a Large Code Point of View %J Proceedings of the 1978 LASL Workshop on Vector and Parallel Processors %R LA-7491-C %I Los Alamos Scientific Laboratory %C Los Alamos, New Mexico %D October 1978 %P 16-40 %K Ginsberg biblio: CRAY-1 %A Roland ASSOUS %A Christine CHARRETTON %T Etiquetage des structures d'evenements du point de vue des ordres et des graphes %R TR 89-15 %I Laboratoire de l'Informatique du Parallelisme, Ecole Normale Superieure %C Lyon, France %D 1989 %A Greg Astfalk %T Solving PDE's on Supercomputers and Minisupercomputers %J Second International Conference on Supercomputing, Proceedings Supercomputing '87, Industrial Supercomputer Applications and Computations %V II %I International Supercomputing Institute, Inc. %D 1987 %P 56-63 %A Chandra R. Asthagiri %A Jerry L. Potter %T An Optimizing Parallel Algorithm for Evaluating Infix Operator Expressions on an Associative SIMD Computer %R CS-9010-30 %I Dept. of Mathematics and Computer Science, Kent State University %C Kent, Ohio 44242 %D 1990 %X ABSTRACT: This paper presents an efficient associative optimizing operator precedence algorithm ({\bf AOOPA}) to evaluate infix operator expressions. AOOPA does not use the standard shift-reduce concept in parsing an expression, but uses massive parallel associative search instead. While conventional approaches separate the optimization of the number of registers needed for the evaluation of an expression from the parsing of the expression, AOOPA incorporates optimization into the parsing process itself. A conventional algorithm takes 3 passes and 4n steps in compiling an expression of n operators, AOOPA takes only one pass and $\lfloor 5n/2 \rfloor$ steps. %A A. Asthana %A H. V. Jagadish %A B. T. Mathews %Z AT&T %T Impact of Advanced VLSI Packaging on the Design of a Large Parallel Computer %J Proceedings of the 1989 International Conference on Parallel Processing %V I - Architecture %I Penn State %C University Park, Penn %D August 1989 %P I-323--I- %A Abhaya Asthana %T Design and Control of a Three-Stage Switch Matrix in the Presence of Fan-Out %J IEEE Transactions on Computers %V C-27 %N 10 %D October 1978 %P 886-895 %K Blocked state, conflicts, conflict transfer, input, middle blocks, move operation, output, full and maximal assignments, 3-stage connection network, Automatic switching of analog computation %A Abhaya Asthana %A H.V. Jagadish %A Jonathan A. Chandross %A Daniel Lin %A Scott C. Knauer %T A High Bandwidth Intelligent Memory for Supercomputers %J Proceeding Supercomputing Projects, Applications and Artificial Intelligence %I Third International Conference on Supercomputing (ICS '88) %C St. Petersberg, FL %V 1 %D 1988 %P 517-524 %A Chandra R. Asthariri %A Jerry L. Potter %T Using Massive Parallelism for Context Sensitive Rule Compilation %R CS-9006-22 %I Dept. of Mathematics and Computer Science, Kent State University %C Kent, Ohio 44242 %D 1990 %X ABSTRACT: This paper describes a ``{\bf Context Sensitive Grammar (CSG)}'' model which allows the use of an associative processor to compile production rules into equivalent procedural rules thus increasing the executional efficiency of a production system. A compiled procedural rule is a sequence of {\bf ANDIFs} and {\bf ANDFORs} which are special parallel constructs in the ASP ({\bf AS}sociative {\bf P}rogramming) language that preserve the production rule concept. The massive parallelism of associative processors using the CSLG model and the ANDIF and ANDFOR constructs allow direct non-RETE matching resulting in an estimated throughput of about 6000 rules per second [18] as opposed to 70 [12] and 900 [15] rules for SIMD approaches adhering to the sequential RETE algorithm [7]. %A M. J. Atallah %A F. Dehne %A R. Miller %A A. Rau-Chaplin %A J.-J. Tsay %T Multisearch techniques for implementing data structures on a mesh-connected computer %J Symposium on Parallel Algorithms and Architectures, SPAA'91 %C Hilton Head, South Carolina %D July 1991 %D 1991 %P 204-214 %K parallel search algorithm, %A M. J. Atallah %A et. al. %T Co-Scheduling Compute-Intensive Tasks on a Network of Workstations: Models and Algorithms %J Proceedings of the 11th International Conference on Distributed Computing Systems %I IEEE Computer Society %C Arlington, Texas %D May 1991 %X This paper addresses the problem of distributing a compute intensive and co-operating tasks in a network of workstations. Algorithms which select a subset of WS from a given pool of Idle machines to obtain the most optimal performance is given. The WS's have different performance strengths. %A M. J. Atallah %A R. Cole %A M. Goodrich %T Cascading Divide-and-Conquer: A Technique for Designing Parallel Algorithms %I Dept. of Computer Sciences, Purdue University %C W. Lafayette, IN 47907-2004 %R TR #665 %D 3/9/87 %A Mikhail Atallah %A Uzi Vishkin %R ULTRACOMPUTER NOTE #73 %T Finding Euler Tours in Parallel %I Courant Institute of Mathematical Sciences, Computer Science Dept., New York University %D May 1984 %O Also Computer Science Technical Report #134. %A Mikhail Atallah %A Uzi Vishkin %T Finding Euler Tours in Parallel %R TR-440 %I Purdue University %D May 1984 %A Mikhail J. Atallah %A S. Rao Kosaraju %T A Generalized Dictionary Machine for VLSI %J IEEE Transactions on Computers %V C-34 %N 2 %D February 1985 %P 151-155 %K Dictionary operations, parallel processing, pipelining, tree machine, VLSI Parallel Processing %A Mikhail J. Atallah %A Michael T. Goodrich %T Efficient Parallel Solutions to Some Geometric Problem %J Journal of Parallel and Distributed Computing %V 3 %N 4 %D December 1986 %P 492-507 %A Mikhail J. Atallah %A Richard Cole %A Michael T. Goodrich %T Cascading Divide-and-Conquer: A Technique for Designing Parallel Algorithms %I Courant, New York University %C New York, NY %R ULTRACOMPUTER NOTE #127 %D September 1987 %A Mikhail J. Atallah %A Michael T. Goodrich %A S. Rao Kosaraju %T Parallel Algorithm for Evaluating Sequences of Set-Manipulations Operations %R TR 90-12 %I CS Dept., Johns Hopkins Univ. %C Baltimore %D 1990 %K non-numeric algorithms, %A Mikhail J. Atallah %A Michael T. Goodrich %T Deterministic Parallel Computational Geometry %E John H. Reif %B Synthesis of Parallel Algorithms %I Morgan Kaufmann Publishers %C San Mateo, CA %D 1993 %P 497-536 %K parallel sorting and computational geometry, %O Chap. 11. %A Daya Atapattu %A Dennis Gannon %Z Indiana U. %T Building Analytical Models Into An Interactive Performance Prediction Tool %J Proc. Supercomputing '89 %I ACM %C Reno, NV %D November 1989 %P 521-530 %K Software Environments - Performance Tools %A Gregory G. Athanasiu %A Constantin P. Bachas %A Wilfried F. Wolff %T Invariant Geometry of Spin-Glass States %J Physical Review B %V 35 %N 4 %D 1 feb 1987 %P 1965-1968 %K simulated annealing, %A W. Athas %A D. Briscoe %A R. Sjogren %A C. Steele %T HyperFITH: An Implementation of FITH on an Instance of a Hypercube %r Hm36 %I California Institute of Technology %C Pasadena, CA %D 1983 %K Caltech Cosmic Cube, hypercube, C^3P, Rcccp, %A W. C. Athas %T XCPL: An Experimental Concurrence Programming Language %I Computer Science Department, California Institute of Technology %C Pasadena, CA %D December 1985 %T Cantor: An Actor Programming System for Scientific Computing %A W. C. Athas %A N. J. Boden %J Proc. of the ACM SIGPLAN Workshop on Object-Based Concurrent Programming, ACM SIGPLAN Notices %V 24 %N 4 %D April 1989 %P 66-68 %K Actor-Based Systems %X Describes the fine-grain message passing architecture of the Actor-based language Cantor and consider its application to scientific computation. %A William C. Athas, Jr. %T A VLSI Combinator Reduction Engine %I California Institute of Technology %R 5086:TR-83 %D June 8, 1983 %K pipelining, systolic arrays, %A William C. Athas %A Charles L. Seitz %Z Caltech %T Multicomputers: Message-Passing Concurrent Computers %J Computer %V 21 %N 8 %D August 1988 %P 9-24 %K Cosmic cube, iPSC, NCUBE, hypercubes, CCCP, grain size, latency, Ametek, programming environment, CE/RK, reactive kernel, cantor, Mosaic, eight queens, distributed memory multicomputers, coarse grain and massively parallel architectures. %K dar, %K grecommended91, %X (DAR) an accessible multicomputer overview. %X Reproduced in David J. Lilja's (ed.) Architectural Alternatives for Exploiting Parallelism, IEEE Press, Los Alamitos, CA, 1991, page 294-. %A M. Atiquzzaman %A M. S. Akhtar %T Effect of Hit Spot on the Performance Multistage Interconnection Networks %J Proc. Frontiers '92: Fourth Symp. on Massively Parallel Computation %C McLean, VA %I IEEE %D October 1992 %P 504-505 %K poster session, %A James D. Atkins %T Path Control-The Network Layer of System Network %E Paul E. Green, Jr. %B Computer Network Architectures and Protocols %I Plenum Press %C New York, NY %D 1982 %P 297-326 %K Network Layer %A C. Atkinson %A S. J. Goldsack %T Ada for Distributed Systems - A Compiler Independent Approach %J Proceedings of the IFAC Workshop on Distributed Computer Control Systems %D September 1986 %A C. Atkinson %A S. J. Goldsack %T Ada for Distributed Systems: A Library of Virtual Nodes %J Proceedings Ada-Europe Conference in Stockholm %I Cambridge University Press %D May 1987 %A Colin Atkinson %A et al, eds. %T Ada For Distributed Systems %I Cambridge University Press %C Cambridge, England %D 1988 %O number is 0 521 36154 0 %K book, text, distributed Ada, %A Russell R. Atkinson %A Edward M. McCreight %Z Xerox PARC %T The Dragon Processor %J Proceedings Second International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS II) %J Computer Architecture News %V 15 %N 5 %J Operating Systems Review %V 21 %N 4 %J SIGPLAN Notices %V 22 %N 10 %I ACM %C Palo Alto, CA %D October 1987 %P 65-69 %K languages and instruction sets, %A Rony Attar %A Philip A. Bernstein %A Nathan Goodman %T Site Initialization, Recovery, and Backup in a Distributed Database System %J IEEE Transactions on Software Engineering %V SE-10 %N 6 %D November 1984 %K Distributed database systems, fault recovery, site initialization, Databases %A Giuseppe Attardi %T Concurrent Strategy Execution in Omega %B Object-Oriented Concurrent Programming %E Akinori Yonezawa %E Mario Tokoro %I MIT Press %C Cambridge, MA %D 1987 %P 259-276 %A P. Attie %T A Guide to Raddle87 Semantics %I Microelectronics and Computer Technology Corp. %R STP-340-87 %D January 11, 1987 %A Paul C. Attie %A Ira R. Forman %A Eliezer Levy %T On Fairness as an Abstraction for the Design of Distributed Systems %J Proc. 10th International Conference on Distributed Computing Systems %I IEEE %C Paris, France %D May-June 1990 %P 150-157 %X \fBAbstract:\fP A fairness property called U-fairness is studied in the context of the design of distributed systems with multiparty interactions. This is done with an overlapping model of concurrency. A distributed algorithm implementing this fairness notion is presented. U-fairness is shown to be more appropriate to the design of distributed systems because it provides an abstraction for stable property detection while other known fairness notions do not. %A N. Attig %A V. Sander %A L. Wollschlanger %A R. Krotz %T Automatic Supervision of Cray UNICOS Systems %J Proceedings, 27th Semi-Annual Cray User Group Meeting %I CUG %C London %D April 1991 %P 279-285? %K operating systems, %A C. Attiya %A D. Dolev %A J. Gill %T Asynchronous Byzantine Consensus %J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing %I ACM %D August 1984 %A H. Attiya %A J. L. Welch %T Sequential Consistency versus Linearizability %J Symposium on Parallel Algorithms and Architectures, SPAA'91 %C Hilton Head, South Carolina %D July 1991 %P 304-315 %K weak consistency, %A G. H. Atwood %Z U. Alberta %T Parallel Lagrangian Interpolation %J Proceedings of the 1988 International Conference on Parallel Processing %V III, Algorithms and Applications %I Penn State %C University Park, Penn %D August 1988 %P 120-123 %K Applications, divided differences, polynomial, Newtonian interpolation, evaluation, derivation, theory, PRAM, shared memory architecture, %X The case presented by this paper is a bit weak. It could be improved perhaps it was too shortened. %A J. William Atwood %T Concurrency in Operating Systems %J Computer %V 9 %N 10 %P 18-26 %D October 1976 %K bhibbard %X Examples of OSes include CDC 6000/Kronos and IBM 370/OS. A dated paper needless to say. Reproduced in "Distributed Computing: Concepts and Implementations" edited by McEntire, O'Reilly and Larson, IEEE, 1984. Reprinted in "Tutorial: Distributed Processing," IEEE, compiled by Burt H. Liebowitz and John H. Carson, 1981, 3rd edition. %A P. Aubert %A M. C. Ciccoli %A J. A. Desideri %T Une methode de partition de domaine appliquee a une equation d'advection-diffusion %R RR1740 %I INRIA-SOPHIA %C ANTIPOLIS %D June 1992 %K french language %X Les methodes de decomposition de domaine pour resoudre les equations aux derivees partielles sont particulierement adaptees au calcul parallele. Elles sont basees sur le decoupage du domaine de calcul en sous-domaines plus petits, sur lesquels on resout des sous-problemes independants de taille reduite. %X Ce rapport presente l'etude d'un modele lineaire d'advection-diffusion en une puis deux dimensions d'espace. Il comporte une etude theorique du probleme modele et des resultats numeriques. %X Postscript format, by ftp anonymous on : zenon.inria.fr , directory /pub/rapports ftp.inria.fr , directory /INRIA/publication %Q Auerbach %T Associative Memory Investigations Substructuring, Searching and Data Organizations %R AF 30 (602)4309 %I Auerbach %D May 1968 %K btartar %Q Auerbach %T Guide to International Computer Systems Architecture %C Philadelphia, PA %I Auerbach %D 1976 %K btartar %A J. Auerbach %T File Request Transparency Between Heterogeneous Systems %R Research Report RC 11496 (#51635) %I IBM Hawthorne Research Laboratory %C Hawthorne, New York %D November 1985 %X A shallow look at the problems, with a sketched (not implemented) solution. %A Karl Auerbach %A Robin O'Neill %T A UNIX(tm) Subsystem on the Cray Time Sharing System (CTSS) %J Usenix Technical Conference %C Denver, Colorado %D January 1986 %P 211-218 %A J. M. Auger %T Parallel Implementation on Transputers of Kohonen's Algorithm %E D. Gassilloud %E J. C. Grossetie %B Computing with Parallel Architectures: T.Node %V 2 %S Computer and Information Science %I Kluwer %C Dordrecht %D 1991 %P 215-226 %A Melvin C. August %A Gerald M. Brost %A Christopher C. Hsiung %A Alan J. Schiffleger %T Cray X-MP: The Birth of a Supercomputer %J Computer %I IEEE %V 22 %N 1 %D January 1989 %P 45-52 %X Lacks a discussion on hardware performance monitor and Chen is not an author. %A Francis P. Augustine %A Ravi Varadarajan %T Efficient Mappings for Multi-dimensional Systolic Arrays Using Flexible Buffer Structures %J Proceedings of the 1992 International Conference on Parallel Processing %V I, Architecture %I CRC Press %C Boca Raton, FL %D August 1992 %P I-224--I-227 %K communications, synchronization and data mapping, %A Louis Auslander %A Anna Tsao %T A Divide and Conquer Algorithm for the Eigenproblem via Complementary Invariant Subspace Decomposition %R SRC-TR-89-003 %I Supercomputing Research Center, IDA %C Bowie, MD %D May 1989 %K numerical parallel computing, %A Louis Auslander %A Anna Tsao %T On Parallelizable Eigensolvers %R SRC-TR-91-028 %I Supercomputing Research Center, IDA %C Bowie, MD %D January 1991 %A Donald M. Austin %T The University of Minnesota Army High Performance Computing Center %J International Journal of Supercomputer Applications %V 6 %N 3 %D Fall 1992 %P 215-223 %A Todd M. Austin %A Gurindar S. Sohi %T Dynamic Dependency Analysis of Ordinary Programs %J Proceedings the 19th Annual International Symposium on Computer Architecture,ACM SIGARCH %V 20 %D May, 1992 %C Gold Coast, Australia %P 342-351 %A S. Auwatanamongkol %A P. Biswas %T A Hybrid Architecture and Adaptive Scheduling for Parallel Execution of Logic Programs %J Proceedings of the 1991 International Conference on Parallel Processing %V I, Architecture %I CRC Press %C Boca Raton, FL %D August 1991 %P I-17--I-20 %K system architectures, concise paper, %A John Avila %T What We Wish Cray Had Done %J 1989 Spring Proceedings Cray User Group Meeting %I CUG %C Washington DC %D Spring 1989 %P 119-120? %K migration, %A AVIZIENIS %A RENNELS %T The Evolution of Fault Tolerant Computing At The Jet Propulsion Laboratory & At UCLA: 1960-1986 %D 1987 June %R CSD-870022 %I UCLA %C Los Angles, CA %X $11.75 pp.58 %A A. Avizienis %T Architecture of Fault-Tolerant Computing Systems %J 1975 International Symposium on Fault-Tolerant Computing %D January 1975 %K btartar %A A. Avizienis %A M. Ercegovac %A T. Lang %A P. Sylvain %A A. Thomasian %T An Investigation of Fault-Tolerant Architectures for Large Scale Numerical Computing %E D. Kuck %E D. Lawrie %E A. Sameh %B High Speed Computer and Algorithm Organization %I Academic Press %C New York %P 159-183 %D 1977 %K Ricase2, %A A. Avizienis %T Fault \(em tolerance: the survival attribute of digital systems %J Proceedings of the IEEE %V 66 %N 10 %D October 1978 %P 1109-1125 %K bmiya, %X This is Avizienis' paper to the Special issue on the same topic. %A A. Avizienis, ed. %T Fault Tolerant Digital Systems %J Proceedings of the IEEE %V 66 %N 10 %D October 1978 %P 1107-1268 %K btartar %X This covers the entire special issue. %A A. Avizienis %T Framework for a Taxonomy of Fault-Tolerance Attributes in Computer Systems %J Proceedings of 10th Annual International Symposium on Computer Architecture, SIGARCH Newsletter %V 11 %N 3 %D June 1983 %P 16-21 %K taxonomy %X A conceptual framework is presented that relates various aspects of fault-tolerance in the context of system structure and architecture. %A Algirdas Avizienis %T Fault-Tolerant Systems %J IEEE Transactions on Computers %V C-25 %N 12 %D December 1976 %P 1304-1312 %K Fault classification, fault tolerance, fault-tolerant computer design, redundancy techniques, reliability modeling, reliable computing, 25th Anniversary Issue %A Algirdas Avizienis %A John P. J. Kelly %T Fault-Tolerance by Design Diversity: Concepts and Experiments %J Computer %I IEEE %V 17 %N 8 %D August 1984 %P 67-80 %K Special issue on fault-tolerant computers %A G. Avrunin %A J. Wileden %T Describing And Analyzing Distributed System Designs %R TR 82 %I COINS Dept, University of Mass. %C Amherst %D 12/31/1982 %A G. Avrunin %A J. Wileden %T Describing and Analyzing Distributed Software System Design %R TR 83 2 %I COINS Dept, University of Mass. %C Amherst %D 12/31/1983 %A George S. Avrunin %A Jack C. Wileden %T Describing and analyzing distributed software system designs %J ACM Transactions on Programming Languages and Systems %V 7 %N 3 %P 380-403 %D JUL 1985 %K analysis of software design, design notation, distributed mutual exclusion, distributed software systems, software design tools %A B. Awerbuch %A Y. Shiloach %T New connectivity and MSF algorithms for ultracomputer and PRAM %J Proceedings of the 1983 International Conference on Parallel Processing %I IEEE %D August 1983 %P 175-179 %K Ultracomputers (UC) non-numerical algorithms %A B. Awerbuch %A S. Even %T Efficient and Reliable Broadcast is Achievable in an Eventually Connected Network %J 3rd ACM SIGACT-SIGOPS Symposium on Principles of Distributed Computing %I ACM %D August 1984 %A B. Awerbuch %A A. Israeli %A Y. Shiloach %T Finding Euler Circuits in Logarithmic Time %E Franco P. Preparata %B Advances in Computing Research, Parallel and Distributed Computing %V 4 %I JAI Press, Inc. %C Greenwich, Conn. %D 1987 %P 69-78 %A Robert Axelrod %A William D. Hamilton %T The Evolution of Cooperation %J Science %V 211 %D March 1981 %P 1390-1396 %K Rdpsdis.bib Rsingh %X Wonderful game-theory analysis of Prisoner's dilemma-- discussion of strategy's viability, stability and robustness--TIT for TAT strategy; biology observations at end of paper not that useful. %A Robert Axelrod %T The Evolution of Cooperation %I Basic Books, Inc. %D 1984 %C New York %K Rdpsdis.bib Rsingh book text %A T. S. Axelrod %A P. F. Dubois %A P. G. Eltgroth %T A simulation for MIMD performance prediction -- application to the S-1 MkIIa multiprocessor %J Proceedings of the 1983 International Conference on Parallel Processing %I IEEE %D August 1983 %P 350-358 %K Cray-1, simulation/operating systems %K bmiya, %A Timothy S. Axelrod %T Comparing the Performance of Parallel Computers %J Digest of Papers, Compcon85 Thirtieth IEEE Computer society International Conference %I IEEE Computer Society %D February 1985 %P 398-401 %A Tim S. Axelrod %T Effects of synchronization barriers on multiprocessor performance %J Parallel Computing %I North-Holland %V 3 %N 2 %D May 1986 %P 129-140 %A O. Axelsson %T A Survey of Vectorizable Preconditioning Methods for Large Scale Finite Element Matrix Problems %I Center for Numerical Analysis %R CNA-190 %C University of Texas at Austin %D 1984 %A O. Axelsson %A V. Eijkhout %Z Univ. Nijmegen, Netherlands %T Robust Vectorizable Preconditioners for Three-Dimensional Elliptic Difference Equations with Anisotropy %E H. J. Te\ Riele %E Th. J. Dekker %E H. A. van\ der\ Vorst %B Algorithms and Applications on Vector and Parallel Computers %S Special Topics in Supercomputing %V 3 %I Elsevier Science Publishers B.V. (North-Holland) %C Amsterdam %D 1987 %P 279-306 %K numerical algorithms, factorization, differencing, PCG, %A O. Axelsson %T Domain Decomposition Methods for Three-dimensional Elliptic Problems (Abstract) %E Garry Rodrigue %B Parallel Processing for Scientific Computing %I SIAM %C Philadelphia, PA %D 1989 %P 169 %K differential equations %A O. Axelsson %T A Multilevel Solution Method for Nine-Point Difference Approximations %E Graham F. Carey %B Parallel Supercomputing: Methods, Algorithms, and Applications %S Series on Parallel Computing %I Wiley and Sons %C New York %D 1989 %P 191-205 %K chapter 13, %A O. Axelsson %T Bounds of Eigenvalues of Preconditioned Matrices %R FSU-SCRI-90-82 %I Supercomputer Computations Research Institute %C Tallahassee, FL %D April 1990 %A O. Axelsson %A G. Lindskog %T Constant wavefront iteration methods for nine- and 15-point difference matrices %R FSU-SCRI-90-84 %I Supercomputer Computations Research Institute %C Tallahassee, FL %D April 1990 %A Tom Axford %T Concurrent Programming: Fundamental Techniques for Real-Time and Parallel Software Design %S Series in Parallel Computing %I John Wiley & Sons %C New York %D 1989 %K book, text, %O ISBN 0 471 92303 6 %K grecommended91, %K js, (2 c.e. votes), %X more about software techniques for concurrency than about parallel programming, but still useful. %X ...quite happy with it. ... primary language used was Modula-2 ... ... concepts, architectures, and so forth. ... used transputers as an inexpensive platform for parallel computing. We used C for the transputer programming. %A Tom Axford %T An Elementary Language Construct for Parallel Programming %J SIGPLAN Notices %V 25 %N 7 %P 72-80 %D July 1990 %X Language construct for using divide-and-conquer paradigm in functional languages instead of convential loops, which he insists are inherently sequential. Only (?) useful for functions using sets as basic datastructures. Powerful semantics, but difficult to read syntax (like APL-oneliners). %A J. M. Ayache %A J. P. Courtiat %A M. Diaz %T Self-Checking software in distributed systems %J 3rd International Conference on Distributed Computing Systems %C Miami, FL %D October 1982 %I IEEE %P 163-170 %K Design of Fault Tolerant Systems %A E. Ayguade %A J. Labarta %A J. Torres %A P. Borensztejn %T GTS: Parallelization and Vectorization of Tight Recurrences %J Proc. Supercomputing '89 %I ACM %C Reno, NV %D November 1989 %P 531-539 %K Software Environments - Performance Tools, dependence graph, recurrence, parallelism evaluation, parallelization, Vecto-rization, synchronization, graph traverse scheduling, trace scheduling, %X This paper has not seen the multiflow work (Fisher). %A C. Aykanat %A F. Ozguner %A S. Martin %A S. M. Doraivelu %T Parallelization of a Finite Element Application Program on a Hypercube Multiprocessor %B Hypercube Multiprocessors 1987 %I SIAM %D 1987 %C Philadelphia %P 662-673 %A C. Aykanat %A F. Ozguner %T Large Grain Parallel Conjugate Gradient Algorithms on a Hypercube Multiprocessor %J Proceedings of the 1987 International Conference on Parallel Processing %I Penn State %C University Park, Penn. %D August 1987 %P 641-644 %K Hypercube Computing %A C. Aykanat %A F. Ozguner %A F. Ercal %A P. Sadayappan %T Iterative Algorithms for Solution of Large Sparse Systems of Linear Equations on Hypercubes %J IEEE Transactions on Computers %V C-37 %N 12 %D Dec. 1988 %P 1554-1568 %K Conjugate Gradient Iterative solver, %K mimd, matrix solution, survey, %A C. Aykanat %A F. Ozguner %A D. S. Scott %T Implementation of the Conjugate Gradient Algorithm on a Vector Hypercube Multiprocessor %J The 3rd Conference on Hypercube Concurrent Computers and Applications %V II, Applications %I ACM %C Pasadena, CA %D January 1988 %P 1687-1697 %K differential equations and associated matrix algorithms, iPSC-VX, scaled CG (SCG), %A C. Aykanat %A T. M. Kurc %T Efficient Parallel Maze Routing Algorithms on a Hypercube Multicomputer %J Proceedings of the 1991 International Conference on Parallel Processing %V III, Algorithms & Applications %I CRC Press %C Boca Raton, FL %D August 1991 %P III-224--III-227 %K applications, concise paper, %A C. Aykanat %A A. Dervis %T An Overlapped FFT Algorithm for Hypercube Multicomputers %J Proceedings of the 1991 International Conference on Parallel Processing %V III, Algorithms & Applications %I CRC Press %C Boca Raton, FL %D August 1991 %P III-316--III-317 %K advances in parallel algorithms and applications, poster paper, %A Shiva Azadegan %A Anand Tripathi %T Parallel Join Algorithms for SIMD Models %J Proceedings of the 1991 International Conference on Parallel Processing %V III, Algorithms & Applications %I CRC Press %C Boca Raton, FL %D August 1991 %P III-125--III-133 %K algorithms, join operator, relational database, hashing, parallel algorithms, SIMD models, Connection Machine, %A Yossi Azar %A Uzi Vishkin %T Tight Comparison Bounds on The Complexity of Parallel Sorting %I Courant Institute of Mathematical Sciences %R ULTRACOMPUTER NOTE #103, CSD TR #223 %D February 1986 %T Parallelizing Particle-in-Cell Simulation on Multiprocessors %P III-352--III-353 %A Nasser G. Azari %A Soo-Young Lee %Z Cornell %J Proceedings of the 1990 International Conference on Parallel Processing %V III, Algorithms and Applications %I Penn State U. Press %C University Park, Penn %D August 1990 %K poster session, Application Specific Parallel Algorithms, PIC, BBN, hypercube, %A Robert Azencott, ed. %T Simulated Annealing: Parallelization Techniques %I John Wiley & Sons %C New York %D 1992 %K book, text, %A Robert Azencott %T Sequential Simulated Annealing: Speed of Convergence and Acceleration Techniques %E Robert Azencott %B Simulated Annealing: Parallelization Techniques %I John Wiley & Sons %C New York %D 1992 %P 1-10 %O Chap. 1. %A Robert Azencott %T A Common Large Deviations Mathematical Framework for Sequential Anealing and Parallel Annealing %E Robert Azencott %B Simulated Annealing: Parallelization Techniques %I John Wiley & Sons %C New York %D 1992 %P 11-24 %O Chap. 2. %A Robert Azencott %T Parallel Simulated Annealing: An Overview of Basic Techniques %E Robert Azencott %B Simulated Annealing: Parallelization Techniques %I John Wiley & Sons %C New York %D 1992 %P 37-46 %O Chap. 4. %A Y. Y. Azmy %Z ORNL %T On the Adequacy of Message-Passing Parallel Supercomputers for Solving Neutron Transport Problems %J Proceedings Supercomputing'90 %I IEEE %C New York, New York %D November 1990 %P 693-699 %K particle transport, iPSC/2, %X Adequate (for the conditions given). P-NT. %A Yousry Y. Azmy %T Performance and Performance Modeling of a Parallel Algorithm for Solving the Neutron Transport Problem %J The Journal of Supercomputing %V 6 %N 3/4 %D December 1992 %P 211-235 %K performance modeling, neutron transport problem, Intel iPSC/2, hypercube, %A E. M. Azoff %A R. F. Fowler %T The TAPDANCE kernel: DEVMOD %R RAL-89-043 %I Informatics Department, Rutherford Appleton Laboratory %C Chilton, Didcot, Oxon OX11 0QX, United Kingdom %D 1989 %A E. M. Azoff %A R. F. Fowler %T The TAPDANCE kernel: DEVMOD user manual %R RAL-89-044 %I Informatics Department, Rutherford Appleton Laboratory %C Chilton, Didcot, Oxon OX11 0QX, United Kingdom %D 1989 %A E. H. Baalbergen %T Parallel and Distributed Compilations in Loosely-Coupled Systems: A Case Study %J Proc. Workshop on Large Grain Parallelism %C Providence, RI %D 1986 %p 223-226 in Amoeba book %K applications, Amoeba %X Proceedings were not published. %A E. H. Baalbergen %T Design and Implementation of Parallel Make %J Computing Systems %V 1 %N 2 %P 135-158 %D Spring 1988 %p 227-241 in Amoeba book %K applications, Amoeba %A E. H. Baalbergen %A K. Verstoep %A Andrew S. Tanenbaum %T On the Design of the Amoeba Configuration Manager %J ACM SIGSOFT Software Engineering Notes Proc. 2nd Int'l Workshop on Software Configuration Management %V 17 %I ACM %D Nov. 1989 %p 215-222 in Amoeba book %K applications, Amoeba %A Sara Baase %T Introduction to Parallel Connectivity, List Ranking, and Euler Tour Techniques %E John H. Reif %B Synthesis of Parallel Algorithms %I Morgan Kaufmann Publishers %C San Mateo, CA %D 1993 %P 61-114 %K fundamental parallel graph algorithms, %O Chap. 2. %A Syunsuke Baba %A Shigeyoshi Watanabe %T Error Analysis of Parallel Computation: Direct Solution Method of Linear Equations %J Proceedings Second Parallel Computing Workshop (PCW'93) %I Fujitsu Laboratories %C Kawasaki, Japan %D November 1993 %P P2-L-1--P2-K-4 %K FPCRF, AP1000, %K MSD, multi-step-diakoptics, %A Takanobu Baba %A Ken Ishikawa %A Kenzo Okuda %T A Two-Level Microprogrammed Multiprocessor Computer with Nonnumeric Functions %J IEEE Transactions on Computers %V C-31 %N 12 %D December 1982 %P 1142-1156 %K Database system, emulation, firmware, multiprocessor, nonnumeric processing, parallel processing, symbol manipulation, two-level microprogramming, Computer architecture %A Takanobu Baba %A Katsuhiro Yamazaki %A Nobuyuki Hashimoto %A Hiroyuki Kanai %A Kenzo Okuda %A Kazuhiko Hashimoto %Z Utsunomiya U. %T Hierarchical micro-architectures for a two-level microprogrammed multiprocessor computer %J Proceedings of the 1983 International Conference on Parallel Processing %I IEEE %D August 1983 %P 478-485 %K Japan, MUlti NAnoProgrammed machine (MUNAP), 4 CPU, computer architectures %A Takanobu Baba %T Microprogrammable Parallel Computer MUNAP and Its Applications %S Computer Systems Series %I MIT Press %C Cambridge, MA %D 1987 %K Design Principles, Basic Organization, book, text, %A Takanobu Baba %A Tsutomu Yoshinaga %A Tohru Iijima %A Yoshifumi Iwamoto %A Masahiro Hamada %A Mitsuru Suzuki %Z Utsunomiya U. %T A Parallel Object-Oriented Total Architecture: A-NET %J Proceedings Supercomputing'90 %I IEEE %C New York, New York %D November 1990 %P 276-285 %K novel architectures, parallel object-oriented, total architecture, multicomputer, processing element, router, parallel operating system, A-NETL language, %A Takanobu Baba %A Yoshifumi Iwamoto %A Tsutomu Yoshinaga %Z Utsunomiya U. %T A Network-Topology Independent Task Allocation Strategy for Parallel Computers %J Proceedings Supercomputing'90 %I IEEE %C New York, New York %D November 1990 %P 878-887 %K task allocation and load balancing, network-topology independence, task graph, processor graph, task allocation strategy, parallel computer, %A B. A. Babajan %T Methods of Parallel Information Processing in the Architecture of Soviet High-Performance Computers %E N. N. Mirenkov %B Parallel Computing Technologies %I World Scientific Publishing %C Singapore/New Jersey %D 1990 %P 76-81? %A O. Babaoglu %A L. Alvisi %A A. Amoroso %A R. Davoli %A L. A. Giachini %L %T Paralex: An Environment for Parallel Programming in Distributed Systems %J 6th ACM International Conference on Supercomputing %C Washington, D.C. %D July 1992 %P 178-187 %A Ozalp Babaoglu %A Lorenzo Alvisi %A Alessandro Amoroso %A Renzo Davoli %T Paralex: An Environment for Parallel Programming in Distributed Systems %I Department of Mathematics, University of Bologna %C Piazza Porta S. Donato, 5 40127 Bologna, Italy %X It is our thesis that a distributed system can be programmed, monitored, debugged and generally thought of as if it were a single, uniform multiprocessor machine. The technical issues that need to be addressed in supporting this abstraction include fault tolerance, architectural heterogeneity and high latency of the communication network. The Paralex Project is aimed at testing this thesis for the class of applications that can be described using a data flow-like semantics. The interface presented to the programmer makes extensive use of graphics to define, edit, execute and debug applications. All of the necessary code for distributing the application across a network and replicating it to achieve the desired level of fault tolerance is automatically generated by the system. In this paper we give an overview of Paralex and present the status of a prototype implementation. %A Ozalp Babaoglu %A Rogerio Drummond %T Streets of Byzantium: Network Architectures for Fast Reliable Broadcasts %J IEEE Transactions on Software Engineering %V SE-11 %N 6 %D June 1985 %P 546-554 %K Byzantine agreement, distributed computing, Ethernet, fault-tolerance, network partitions Special Issue on Reliability in Distributed Software and Database Systems %A B. A. Babayan %T Basic Results and Prospects for Development of the "El'brus" Architecture %J Prikladnaya Informatika %V 15 %D 1989 %P 100-131 %A B. A. Babayan %A G. G. Ryabov %A G. D. Chinin %T Elbrus Software Methodology: Instrumentation-Experience %B Information Processing 89, Proc. of the IFIP 11th World Computer Congress, San Francisco %E G. X. Ritter %I North-Holland %D 1989 %P 879-882 %A R. G. Babb, II %T Programming the HEP with Large-Grain Dataflow Techniques %E Janusz S. Kowalik %B Parallel MIMD Computation: HEP Supercomputer and Its Applications %I MIT Press %C Cambridge, MA %D 1985 %P 203-227 %K Programming and languages, parallel HEP FORTRAN, parallel programming, %X Good introduction to the problems of parallel programming. Has a good parallel triangular solver example. %A Robert Babb %T Programming Environments for Supercomputers (Panel Session) %J Second International Conference on Supercomputing, Proceedings, Supercomputer '87, Supercomputer Design, Performance Evaluation and Education %V III %I International Supercomputing Institute, Inc. %D 1987 %P 55 %A Robert G. Babb, II %T Parallel Processing with Large Large Data Flow Techniques %J Computer %I IEEE %V 17 %N 7 %D July 1984 %P 55-61 %K Denelcor HEP, Hardware-software interface: effect on performance %A Robert G. Babb, II %T Parallel Processing on the CRAY X-MP with Large-grain Data Flow Techniques %B Supercomputers, Class VI Systems, Hardware and Software %E Sidney Fernbach %I North-Holland %D 1986 %P 239-251 %A Robert G. Babb, II %A William C. Ragsdale %Z OGC and CDC %T A Large-Grain Data Flow Scheduler for Parallel Processing on CYBERPLUS %J Proceedings of the 1986 International Conference on Parallel Processing %I IEEE %D August 1986 %P 845-848 %K Vectorization/ data flow processing, Large Grain Data Flow (LGDF), CYBERPLUS, ring bus, %A Robert G. Babb, II %A David C DiNucci %T Design and Implementation of Parallel Programs with Large-Grain Data Flow %B The Characteristics of Parallel Algorithms %I MIT Press %C Cambridge, MA %E Leah H. Jamieson %E Dennis B. Gannon %E Robert J. Douglass %D 1987 %K Software Tools %P 335-350 %A Robert G. Babb, II %A Lise Storc %A Robert Hiromoto %Z OGC and LANL %T Developing a parallel Monte Carlo transport algorithm using large-grain data flow %J Parallel Computing %V 7 %N 2 %D June 1988 %P 187-198 %K Monte Carlo particle transport problem, Large-Grain Data Flow (LGDF), Denelcor HEP, MIMD computer, parallel processing, %A Robert G. Babb, II %A Lise Storc %A Peter G. Eltgroth %T Parallelization Schemes for 2-D Hydrodynamics Codes using the Independent Time Step Method %J Parallel Computing %V 8 %N 1-3 %D October 1988 %P 85-89 %K Proc. Intl. Conf. on Vector and Parallel Processors in Computational Science, III [ VAPP III], Aug. 1987, Liverpool, England. [Cover typo.] independent time step method, drinking philosophers problem, %A Robert G. Babb, II %A David C. DiNucci %T Scientific Parallel Processing with LGDF2 %E Garry Rodrigue %B Parallel Processing for Scientific Computing %I SIAM %C Philadelphia, PA %D 1989 %P 307-311 %K languages, %A Robert G. Babb, II %Z OGC %T SARA: A Cray Assembly Language Speedup Tool %E Janusz S. Kowalik %B Supercomputing %S NATO ASI, Series F: Computer and System Sciences %V 62 %I Springer-Verlag %C Berlin %D 1990 %P 141-156 %K supercomputer architecture, %A Isaac Babbin %A Koernraad Lecot %T Logic Programming: A Classified Bibliography %I Wildgrass Books %C Victoria, Australia %D 1985 %X koen@locus and munnari!isaac. Have two sections relevant to parallelism. %A L. K. Babenko %A O. B. Makarevich %A A. G. Chefranov %T Parallel Programming Technology and Resource Management in Multiprocessor Systems %E N. N. Mirenkov %B Parallel Computing Technologies %I World Scientific Publishing %C Singapore/New Jersey %D 1990 %P 495-? %K resource controlling tools, %A Marc Baber %T 3-D Life with X windows and Hypertasking %J Proc. 1991 Annual Users Conference %I Intel Supercomputer Users' Group %C Dallas, TX %D 1991 %P 269-304 %A Marc Baber %T Hypertasking Support for Dynamically Redistributable and Resizeable Arrays on the iPSC %J Sixth Distributed Memory Computing Conference Proceedings %I IEEE %C Portland, OR %D April/May 1991 %P 59-66 %K DMCC6, software technology and tools, compilers, %A Marc Baber %T An Implementation of the Radix Sorting Algorithm on the Touchstone Delta Prototype %J Sixth Distributed Memory Computing Conference Proceedings %I IEEE %C Portland, OR %D April/May 1991 %P 458-461 %K DMCC6, computation and algorithms, short papers, algorithms, %A A. F. Babich %T Proving Total Correctness of Parallel Programs %J IEEE Transactions on Software Engineering %V SE-5 %N 6 %D June 1979 %P 558-574 %K %A I. Babuska %A W. Rheinboldt %T Computational Aspects of Finite Element Analysis %E J. Rice %B Mathematical Software III %I Academic Press %C New York %D 1977 %P 223-253 %X Remove? %A F. Baccelli %A Z. Liu %A D. Towsley %T Extremal Scheduling of Parallel Processing Systems with and without Real-Time Constraints %J Journal of the ACM %r Rapport de Recherche INRIA 1113 %d 1989 %A F. Baccelli %A T. Fleury %T Analyse Syntaxique en Environnement Parallele %J 2nd International Conference on Distributed Computing Systems %I IEEE %C Paris, France %D April 1981 %P 412-422 %K Distributed Systems in Specific Applications %A Francois Baccelli %A Thierry Fleury %Z INRIA %T On Parsing Arithmetic Expressions in a Multiprocessor Environment %J Acta Informatica %V 17 %D 1982 %P 287-310 %A Francois Baccelli %A Miguel Canales %T Parallel simulation of stochastic Petri Nets using recurrence equations %R RR 1520 %I INRIA-SOPHIA ANTIPOLIS %D September 1991 %K english language %X A new parallel simulation method is proposed for the class of stochastic decision free Petri nets, that is amenable to an SIMD implementation. This method is based on the max,+ - linear structure of recurrence equations that were established for this type of systems. Two variants are analyzed, the spatial and the temporal methods. The spatial method allows one to simulate large networks. The temporal method, which generalizes to Petri nets a method that was introduced recently for queues, is of more use for simulating systems for a long time interval. The emphasis is put on the spatial approach which is shown to provide a simple way of estimating both the cycle time and the statistics of the marking process. The theoretical parallel complexity of this algorithm is first investigated. In particular, a few examples of practical interest are provided (blocking queues in tandem and a stochastic job shop model) for which the cost of simulating O(NT) events of a net of size T is in O(N log T) with this parallel simulation method, while the classical sequential discrete event simulation is in O(NT) at least. These theoretical considerations are confirmed by experimental results obtained from a prototype that was implemented on the Connection Machine. %X ftp.inria.fr, directory /INRIA/publication %A M. J. Bach %A M. W. Luppi %A A. S. Melamed %T A Remote-File Cache for RFS %J Proceedings of the USENIX Summer Conference %C Phoenix, Arizona %D June 1987 %P 273-280 %K Remote File System %A Maurice J. Bach %A Steven J. Buroff %T Multiprocessor UNIX Systems %J AT&T Bell Laboratories Technical Journal %V 63 %N 8, part II %D October 1984 %P 1733-1749 %K Semaphore, IBM, 3B20, fault-tolerant processing, critical sections %X A look at the principal issues of moving UNIX to multiprocessor (typically dual processor) systems. The issues center around System V implementation of portable semaphores, device drivers and specific instances of IBM and 3B processors. Performance is mentioned, but several open issues are left unresolved. %A Maurice J. Bach %T The Design of the UNIX Operating System %I Prentice-Hall %C New York, NY %D 1986 %P 391-433 %K Multiprocessors and distributed systems, sockets, IPC, %X Best book on internals outside Bell Labs since the Lyons book. Tends to be more Master-Slave than homogeneous treatment. %A P. Bacilieria %A S. Cabasino %A N. Cabibboc %T APE: A Fast Processor for Physics Simulations %J Proceeding Supercomputing Projects, Applications and Artificial Intelligence %I Third International Conference on Supercomputing (ICS '88) %C St. Petersberg, FL %V 1 %D 1988 %P 157-166 %A R. J. Back %T Semantics for unbounded nondeterminism ICALP 80 %S Lecture Notes in Computer Science %N 85 %I Springer-Verlag %C Berlin %D 1980 %K semantics nondeterminism %A R. J. Back %T A continuous semantics for unbounded nondeterminism %J Theo. Comp. Sci. %V 23 %N 2 %P 187-210 %D 1983 %K semantics nondeterminism %A R. J. R. Back %A H. Mannila %T A Refinement of Kahn's Semantics to Handle Non-Determinism and Communications %J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing %I ACM %C Ottawa, Canada %D August 1982 %P 111-120 %A R. J. R. Back %A R. Kurki-Suonio %T Serializability in Distributed Systems with Handshaking %R CMU-CS-85-109 %I CS Department Carnegie Mellon University %D 1985 %A J. Backus %T Can Programming be Liberated from the von Neumann Style? A Functional Style and its Algebra of Programs %J Communications of the ACM %V 16 %N 8 %D August 1978 %P 613-641 %K grecommended91, Turing award lecture, Key words and phrases: functional programming, algebra of programs, combining forms, programming languages, von Neumann computers, von Neumann languages, models of computing systems, applicative computing systems, program transformation, program correctness, program termination, metacomposition, CR categories: 4.20, 4.29, 5.20, 5.24, 5.26, %K Rhighnam, theory %K ak, %X Reproduced in "Selected Reprints on Dataflow and Reduction Architectures" ed. S. S. Thakkar, IEEE, 1987, pp. 215-243. %A J. W. Backus %T The algebra of functional programs: Function level reasoning, linear equations, and extended definitions %B Formalization of Programming Concepts %I Springer-Verlag %S Lecture Notes In Computer Science %V 107 %D 1981 %P 1-43 %K Righnam, functional, programming, theory, FP, FL, %X earlier version in BACKUS78 %A John Backus %T Function-Level Computing %J IEEE Spectrum %D August 1982 %P 22-27 %A John Backus %A John H. Williams %A Edward L. Wimmers %T FL Language Manual (Preliminary Version) %I IBM Almaden Research Center %C San Jose, CA %R RJ 5339 (54809) %D November 1986 %K FP successor, functional programming language, side effect free, %A D. Bacon %A H. Ibrahim %A R. Newman %A A. Piol %A S. Sharma %T The NON-VON PASCAL %I Computer Science Dept, Columbia University %D May 1982 %K Rhighnam, language, NON-VON, programming, SIMD %A David F. Bacon %A Robert E. Strom %T A PORTABLE RUN_TIME System for the Hermes Distributed Programming Language %J Summer 1990 USENIX Conference %I Usenix %C Anaheim, CA %D June 1990 %K HERMES, %A David F. Bacon %A Robert E. Strom %T Optimistic Parallelization of Communicating Sequential Processes %J Proceedings of the Third ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming %V 26 %N 7 %D April 1991 %P 155-166 %K asynchronous algorithms, overcoming communication latency, %X Describes a technique for transforming a sequence of synchronous remote procedure calls into a series of asynchronous messages. %A David F. Bacon %T Transparent Recovery in Distributed Sustems %J Operating Systems Review %V 25 %N 2 %D April 1991 %P 91-94 %A J. M. Bacon %A C. Horn %A A. Langsford %A S. J. Mullender %A W. Zimmer %T MANDIS: Architectural Basis for Management %J Proc. of the EUTECO 88 Conf. %E R. Speth %I North-Holland %C Vienna, Austria %D April 1988 %P 795-809 %A Jean Bacon %T An Approach to Distribute Software Systems %J Operating Systems Review %I ACM SIGOPS %V 15 %N 3 %D October 1981 %P 62-74 %K ISO model %X Reproduced in "Distributed Computing: Concepts and Implementations" edited by McEntire, O'Reilly and Larson, IEEE, 1984. %A Jean Bacon %T Concurrent Systems: An Integrated Approach to Operating Systems, Database, and Distributed Systems %I Addison-Wesley %C Reading, MA %D 1992 %K book, text, %A D. Z. Badal %A M. T. Gehl %T On deadlock detection in distributed computing systems %B Proceedings of IEEE INFOCOM 83 %C San Diego, CA, USA %O 8 REFS Treatment PRACTICAL %I IEEE, New York, USA, p: xvii+618 ISBN: 0-8186-0006-3 %D 18-21 April 1983 %P 36-45 %K multiprogramming distributed processing multiprogramming deadlock detection distributed computing systems %X With the advent of distributed computing systems, the problem of deadlock, which has been essentially solved for centralised computing systems, has reappeared. Existing centralised deadlock detection techniques are either too expensive or do not work correctly in distributed computing systems. Although several algorithms have been developed specifically for distributed systems, the majority of them have also been shown to be inefficient or incorrect. A new algorithm is proposed which is more efficient than any existing distributed deadlock detection algorithm %A M. A. Baddourah %A O. O. Storaasli %A E. A. Carmona %A D. T. Nguyen %T A Parallel Algorithm for Generation and Assembly of Finite Element Stiffness and Mass Matrices %J Proc. 1991 Annual Users Conference %I Intel Supercomputer Users' Group %C Dallas, TX %D 1991 %P 435-474 %A Scott B. Baden %T Run-Time Partitioning of Scientific Continuum Calculations Running on Multiprocessors %R LBL-23615 %I LBL %C Berkeley, CA %D June 1987 %K Cray, intel, Anderson's method of local corrections, PhD thesis, %A Scott B. Baden %T Programming Abstractions for Run-Time Partitioning of Scientific Continuum Calculations Running on Multiprocessors %E Garry Rodrigue %B Parallel Processing for Scientific Computing %I SIAM %C Philadelphia, PA %D 1989 %P 223-230 %K differential equations %A ?? Bader %A Joseph Ja'Ja' (JaJa) %A ?? Chellappa %T Scalable Data Parallel Algorithms for Texture Synthesis and Compression Using Gibbs Random Fields %R TR somewhere %D 1992 %K parallel data compression, %A David A. Bader %T Object Oriented Simulation of Systems with Examples in Structural Engineering and Parallel Processing %R Master's Thesis in Electrical Engineering %I Electrical Engineering and Computer Science Department, Lehigh University %C Bethlehem, PA 18015 %D December 1991 %K OOP, Simulation, NIHCL, InterViews %X Abstract: This thesis describes the design procedures for constructing an object oriented simulation. The object oriented programming technique enables simulations of real world events to be modeled with ease. The gateway between the internal simulation and external user interface is described, and the appearance of the user interface for simulations is discussed. A prototype system for designing 2D steel structural frames given initial structural engineering constraints has been built and will be reviewed. Also, an example simulation of a parallel processing network will be given. %X This thesis will first cover the theoretical foundations in the use of object oriented programming concepts, and the organization of computer-based simulation. The Framework for Integrated Design System, (FIDS), a structural engineering simulation package written in C++ using a Sun Sparc Workstation, the NIH C++ Class Library, and Stanford's InterViews C++ User Interface Routines, is an example of one such simulator engineered by the author. ParSim, a concept for a parallel processing simulation of parallel interconnection networks, will also be discussed. Finally, I will present guidelines for constructing special purpose user interfaces for computer-based simulations. %A Lee Badger %A Mark Weiser %T Minimizing Communication for Synchronizing Parallel Dataflow Programs %J Proceedings of the 1988 International Conference on Parallel Processing %V II, Software %I Penn State %C University Park, Penn %D August 1988 %P 122-126 %K Compilers, MIMD, splitting, slicing, hammock graph, correctness proof, splicing, %X Misprint of pages (out of sequence in my copy). %A D. Badouel %A C. Wuethrich %A E. Fiume %T AN ANALYSIS OF CONNECTIVITY OF k-ary- n-cube m-diag INTERCONNECTION NETWORKS%R CSRI-266 %I Computer Systems Research Institute, the University of Toronto %D February 1992 %A Didier Badouel %A Kadi Bouatouch %A Thierry Priol %Z University of Rennes, France %T Ray Tracing on Distributed Memory Parallel Computers: Strategies for distributing computations and data %R Technical Report 508 %I Institut de Recherche en Informatique et Systemes Aleatoires (IRISA) %D January 1990 %X Good survey of various approaches to ray tracing on distributed memory parallel computers. Covers techniques to emulate global shared memory on a distributed computer. %A Didier Badouel %A Charles R. Wuethrich %A Eugene L. Fiume %T ROUTING STRATEGIES AND MESSAGE CONTENTION ON LOW-DIMENSIONAL INTERCONNECTION NETWORKS %I Computer Systems Research Institute, the University of Toronto %R CSRI-258 %D January 1992 %A Hussein G. Badr %A Sunil Podar %T An Optimal Shortest-Path Routing Policy for Network Computers With Regular Mesh-Connected Topologies %I IBM T. J. Watson Research Center %C Yorktown Heights, NY %R 86/36 %D December 1986 %A B.R. Badrinath %A K. Ramamritham %T Semantics-based Concurrency Control: Beyond Commutativity %R TR 86 1 %I COINS Dept, University of Mass. %C Amherst %D 12/31/1986 %A Joong H. Baek %A Kevin A. Teague %Z Ok. SU %T Parallel Thinning on a Distributed Memory Machine %J Proceedings of the Fifth Distributed Memory Computing Conference %V I, Applications %I IEEE %C Charleston, SC %D April 1990 %P 72-75 %K Alternate Applications, DMCC5, %A J. Baer %A W. K. Giloi %T POPE - a Parallel-Operating Prolog Engine %D 1986 %X to be published in New Generation Computing %A J.-L. Baer %A C. Girault %T A Petri Net Model for a Solution to the Cache Coherence Problem %J Problems in Designing Supercomputers: Technologies and Devices SCS 85, First International Conference on Supercomputing Systems %I IEEE Computer Society %P 680-689 %K Organization of Fast Memory Access via Hashing and the Use of Cache Memories %A J.-L. Baer %T Supercomputers %B Computer Systems Architecture %I Computer Science Press %C Los Alamitos, CA %D 1980 %A J.-L. Baer %T Techniques to Exploit Parallelism %R Technical Report 80-09-01 %I Computer Science Department, University of Washington, Seattle, WA %D September 1980 %A J.-L. Baer %A W.-H. Wang %T Architectural Choices for Multi-Level Cache Hierarchies %I Computer Science Department, University of Washington, Seattle, WA %R Technical Report 87-01-04 %D January 1987 %A J. L. Baer %A D. P. Bovet %T Compilation of Arithmetic Expressions for Parallel Computations %J Proc. IFIP Congress %P 340-346 %I North-Holland %D 1968 %K bhibbard %A J. L. Baer %A E. C. Russell %T Preparation and Evaluation of Computer Programs for Parallel Processing Systems %E L. C. Hobbs %E D. J. Theis %E Joel Trimble %E Harold Titus %E Ivar Highberg %B Parallel Processor Systems, Technologies and Applications %P 375-416 %I Spartan Books %D 1970 %K bhibbard %A J. L. Baer %T Large Scale Systems %B Computer Science %E A. F. Cardenas %E L. Presser %E M. A. Marin %I Wiley-Interscience %D 1972 %K btartar %X Chapter 5. %A J. L. Baer %T Modelling for parallel computation: a case study %J Proceedings of the 1973 Sagamore Computer Conference %I IEEE %D August 1973 %P 13-22 %K ICPP1, Sequential-parallel transformation and modeling %A J. L. Baer %T A Survey of Some Theoretical Aspects of Multiprocessing %J Computing Surveys %V 5 %N 1 %D March 1973 %P 31-80 %K multiprocessing, mutual exclusion, semaphores, automatic detection of parallelism, graph models, Petri nets, flow graph schemata, scheduling, array processors, pipe-line computers CR categories: 6.0, 8.1, 4.32, 5.24 maeder biblio: general, concepts, parallel programming, parallel architecture, %K btartar %K grecommended91, %K ak, %A J. L. Baer %A C. Ellis %T Compilation in Distributed Function Systems %J Compcon 76 %P 31-34 %I IEEE %D 1976 %K bhibbard %A J. L. Baer %A C. S. Ellis %T Model, Design and Evaluation of a Compiler for a Parallel Processing Environment %J IEEE Transactions on Software Engineering %V SE-3 %N 6 %D 1977 %P 394-405 %K pipelining, %A J. L. Baer %T Software Control and Program Design Issues for Alterable Architectures %J Computer Software and Applications Conference (COMPSAC78) %I IEEE %D November 1978 %P 769-774 %K software techniques for reconfigurable and dynamic architecture %A J. L. Baer %T Computer Systems Architecture %I Computer Science Press %C Rockville, MD %D 1980 %K book, text, %K blouie %X Newer editions exist. %A Jean-Loup Baer %T Multiprocessing systems %J IEEE Transactions on Computers %V C-25 %N 12 %D December 1976 %P 1271-1277 %K Array processors, control, multiprocessors, pipeline computers, synchronization of concurrent processes, tight and loose coupling, 25th Anniversary Issue, miscellaneous topics in multiprocessing %K bsatya %A Jean-Loup Baer %A Hung-Chang Du %A Richard E. Ladner %T Binary search in a multiprocessing environment %J IEEE Transactions on Computers %V C-32 %N 7 %D July 1983 %P 667-677 %K binary search, memory interference, multiprocessor systems, SIMD architectures %A Jean-Loup Baer %T Computer Architecture %J Computer %I IEEE %V 17 %N 10 %D October 1984 %P 77-87 %X * If, as seems likely, technological advances are slowing down, user demands for improvements in computer architecture must be met by combining different designs. Over used title. %A Jean-Loup Baer %A Wen-Hann Wang %T Architectural Choices for Multilevel Cache Hierarchies %J Proceedings of the 1987 International Conference on Parallel Processing %I Penn State %C University Park, Penn. %D August 1987 %P 258-261 %K Compiler Techniques %A Jean-Loup Baer %A Wen-Hann Wang %Z U WA %T On the Inclusion Properties for Multi-Level Cache Hierarchies %J Proc. 15th Annual Symposium on Computer Architecture, Computer Architecture News %I ACM %V 16 %N 2 %D May 1988 %P 73-80 %K memory hierarchy, %A Jean-Loup Baer %A Wen-Hann Wang %T Multilevel Cache Hierarchies: Organizations, Protocols, and Performance %J Journal of Parallel and Distributed Computing %V 6 %N 3 %D June 1989 %P 451-476 %A Jean-Loup Baer %A Richard N. Zucker %T On Synchronization Patterns in Parallel Programs %J Proceedings of the 1991 International Conference on Parallel Processing %V II, Software %I CRC Press %C Boca Raton, FL %D August 1991 %P II-60--II-67 %K tasks %A Jean-Loup Baer %A Tien-Fu Chen %T An Effective On-Chip Preloading Scheme to Reduce Data Access Penalty %J Proceedings Supercomputing'91 %I IEEE %C Albuquerque, New Mexico %D November 1991 %P 176-186 %K latency tolerance, %A Jean-Loup E. Baer %A Gerald Estrin %T Bounds for Maximum Parallelism in a Bilogic Graph Model of Computations %J IEEE Transactions on Computers %V C-18 %N 11 %D November 1969 %P 1012-1014 %K Boolean matrices, directed graphs, models of computations, parallel processing, precedence matrix IEEE Computer Group conf. %A Jean Loup Baer %T Whither a Taxonomy of Computer Systems %R TR 82-10-01 %I University of Washington, CS Dept. %C Seattle, WA %D October 1982 %K bmiya, %A J. C. M. Baeten, ed. %T Applications of Process Algebra %S Cambridge Tracts in Theoretical Computer Science %V 17 %I Cambridge University Press %C Cambridge, England %D 1990 %K book, text, MIMD program verification, %A J. C. M. Baeten %A W. P. Weijand %T Process Algebra %S Cambridge Tracts in Theoretical Computer Science %V 18 %I Cambridge University Press %C Cambridge, England %D 1990 %K book, text, MIMD program verification, %A J. C. M. Baeten %A J. F. Groote, eds. %T CONCUR'91 %S LNCS %V 527 %I Springer-Verlag %C Berlin %D 1991 %K book, text, %X 2nd International Conference on Concurrency Theory, Amsterdam, August 1991. %A R. Bagrodia %A K. M. Chandy %T A Micro-Kernel for Distributed Applications %J Proceedings of the 5th International Conference on Distributed Computing Systems %I IEEE Computer Society %C Denver, Colorado %D May 1985 %K Distributed Programming, CMAY, %P 140-149 %X CMAY is a FORTRAN based language. Its has entities like Simula classes. Messages are passed over UTexas, Austin's VAX750 net of 5 machines. %A R. Bagrodia %A K. M. Chandy %A E. Kwan %T UC: A Language for the Connection Machine %J Proceedings Supercomputing'90 %I IEEE %C New York, New York %D November 1990 %P 525-534 %K parallel languages, C programming language, C*, shortest path example, %A Rajive Bagrodia %T A Distributed Algorithm to Implement the Generalized Alternative Command of CSP %J 6th International Conference on Distributed Computing Systems %I IEEE Computer Society %C Los Angeles, CA %D May 1986 %P 422-427 %A Rajive Bagrodia %A Wen-Toh Liao %T Maisie: A language and Optimizing Environment for Distributed Simulation %J Proceedings of the SCS Multiconference on Distributed Simulation %V 20 %N 1 %D Jan. 1990 %P 205-210 %A Rajive L. Bagrodia %A Sharad Mathur %Z UCLA %T Efficient Implementation of High Level Parallel Programs %J Fourth International Conference on Architectural Support for Programming Languages and Operating Systems %V 26 %N 4 %C Santa Clara, California %D April 1991 %K Architectural Support For Programming Languages %X Mapping transformations in UC. %A H. R. Bahadori %T A Hierarchical Approximation Algorithm for Large Multichain Product Form Queueing Networks %R Rept. No. UCB/CSD 87/382 %I University of California %C Berkeley %D November 1987 %A A. Bahrs %T Operational Patterns: An extensible model of an extensible language %B International Symposium on Theoretical Programming %E A. Ershov %E V. A. Nepomniaschy %S Lecture Notes in Computer Science %V 5 %I Springer-Verlag %D August 1972 %P 217-246 %K Rdf, %A J.-P. Bahsoun %A L. Feraud %T A Model to Design Reusable Parallel Software Components %E D. Etiemble %E J.-C. Syre %B PARLE '92, Parallel Architectures and Languages Europe %S LNCS %V 605 %I Springer-Verlag %C Berlin %D 1992 %P 245-260? %K parallel software components, %A Zhaojun Bai %A James Demmel %T On a Block Implementation of Hessenberg Multishift QR Iteration %J International Journal of High Speed Computing %V 1 %N 1 %D May 1989 %P 97-112 %K Eigenvalue; Hessenberg matrix; QR algorithm; BLAS, Parallel algorithm %A F. Baiardi %A A. Fantechi %A A. Tomasi %A M. Vanneschi %T Distributed implementation of nested communicating sequential processes and termination %J Proceedings of the 1984 International Conference on Parallel Processing %I IEEE %D August 1984 %P 383-387 %K MuTEAM multimicroprocessor, CSP, nested parallel commands, inter-process communication (IPC), languages %A F. Baiardi %A N. DeFrancesco %A G. Vaglini %T Development of a Debugger for a Concurrent Language %J IEEE Transaction on Software Engineering %V SE-12 %N 4 %P 547-553 %D April 1986 %K Concurrent programming, debugging, programming environment, program specifications, tool transparency. %A F. Baiardi %A M. Vanneschi %T Design of Highly Decentralized Operating System %B Distributed Operating Systems Theory and Practice %E Yakup Paker %E Jean-Pierre Banatre %E Muslim Bozyigit %V 28 %S NATO ASI Series F: Computer and Systems Sciences %I Springer-Verlag %C Berlin %D 1987 %P 113-146 %K Design Issues for Distributed Operating Systems %A F. Baiardi %A A. Fantechi %A A. Tomasi %A M. Vanneschi %T Distributed Implementation of Nested Communicating Sequential Processes: Communication and Termination %J Journal of Parallel and Distributed Computing %V 4 %N 6 %D December 1987 %P 531-545 %A Fabrizio Baiardi %A Mehdi Jazayeri %T P^3M: A Parallel Machine Approach to Massively Parallel Computing %J Proceedings of the 1993 International Conference on Parallel Processing %V I - Architecture %I CRC Press %C Boca Raton, FL %D August 1993 %P I-340--I-344 %X Extended abstract. %A M. S. Baig %A T. A. El-Ghazawi %A N. A. Alexandridis %T Mixed-Mode Multicomputers with Load Adaptability %E D. Etiemble %E J.-C. Syre %B PARLE '92, Parallel Architectures and Languages Europe %S LNCS %V 605 %I Springer-Verlag %C Berlin %D 1992 %P 669-684? %K architecture, %A D. Bailey %A E. Barszcz %A L. Dagum %A P. Frederickson %A H. Simon %T The Parallel NAS Benchmark -- Part I: Parallel Kernels %J Sixth Distributed Memory Computing Conference Proceedings %I IEEE %C Portland, OR %D April/May 1991 %P 533 %K DMCC6, performance analysis, benchmarks, %X paper not received in time. %A D.A. Bailey %A J.E. Cuny %T The Use of Shape Grammars in Processor Embeddings %R TR 86 2 %I COINS Dept, University of Mass. %C Amherst %D 12/31/1986 %A D. E. Bailey %A J. E. Cuny %T An Approach to Programming Process Interconnection Structures: Aggregate Rewriting Graph Grammars %B Proceedings of PARLE '87 Parallel Architectures and Languages Europe %V II %V 258 %I Springer-Verlag %S Lecture Notes in Computer Science %C Eindhoven, The Netherlands %D June 1987 %P 112-123 %A D. H. Bailey %A E. Barszcz %A R. A. Fatoohi %A H. D. Simon %A S. Weeratunga %T Performance Results on the Intel Touchstone Gamma Prototype %R RCR-90-007 %I NAS Division, NASA Ames Res. Ctr. %C Moffett Field, CA 94035 %D 1990 %K hypercube, i860, ARC3D, iPSC, %A D. H. Bailey %A E. Barszcz %A R. A. Fatoohi %A H. D. Simon %A S. Weeratunga %T Performance Results on the Intel Touchstone Gamma Prototype %J Proceedings of the Fifth Distributed Memory Computing Conference %V II, Architecture Software Tools, and Other General Issues %I IEEE %C Charleston, SC %D April 1990 %P 1236-1245 %K Performance Evaluation and Analysis 5th DMCC, %A D. H. Bailey %A et al. %T The NAS Parallel Benchmarks %J The International Journal of Supercomputer Applications %V 5 %N 3 %D Fall 1991 %P 71 %r NASA Report RNR-91-002 Revision 2 %d August 22, 1991 %A D. H. Bailey %A E. Barszcz %A J. T. Barton %A D. S. Browning %A R. L. Carter %A L. Dagum %A R. A. Fatoohi %A P. O. Frederickson %A T. A. Lasinski %A R. S. Schreiber %A H. D. Simon %A V. Venkatakrishnan %A S. K Weeratunga %T The NAS Parallel Benchmarks: Summary and Preliminary Results %J Proceedings Supercomputing'91 %I IEEE %C Albuquerque, New Mexico %D November 1991 %P 158-165 %K supercomputer benchmarking, %A D. H. Bailey %A E. Barszcz %A L. Dagum %A H. D. Simon %T NAS Parallel Benchmark Results %J Proceedings Supercomputing'92 %I IEEE %C Minn., MN %D November 1992 %P 386-393 %r RNR-92-002 %K performance measurement, %A David Bailey %T A High-Performance Fast Fourier Transform Algorithm for the CRAY-2 %J Fall 1986 Proceedings Cray User Group Meeting %I CUG %C Albuquerque, NM %D Fall 1986 %P 174-189? %K applications, %A David Bailey %T The Computation of $pi$ as a System Test of the Cray-2 %J Proceedings CUG %I Cray User Group %D Spring 1986 %P 25-33 %A David Bailey %T Experience with Parallel Computers %R Technical Report RNR-91-007 %I NASA Ames %C Moffett Field, CA 94035 %D November 1991 %A David H. Bailey %T NAS Kernel Benchmark Results %J Problems in Designing Supercomputers: Technologies and Devices SCS 85, First International Conference on Supercomputing Systems %I IEEE Computer Society %P 341-345 %K Industrial Supercomputers: Performance Evaluation and Implementation Details %A David H. Bailey %A John T. Barton %T The NAS Kernel Benchmark Program %I NASA Ames Research Center %C Moffett Field, CA %R TM 86711 %D August 1985 %K Vector computers, instruction set, testing, %A David H. Bailey %T Vector Computer Memory Bank Contention %I NASA Ames Research Center %C Moffett Field, CA %R NAS2-11555 %D February 1985 %K Vector computers, instruction set, testing, %A David H. Bailey %T A High-Performance Fast Fourier Transform Algorithm for the Cray-2 %J The Journal of Supercomputing %V 1 %N 1 %D 1987 %P 43-60 %K DFT, FFT %A David H. Bailey %A Horst D. Simon %A John T. Barton %A Marty Fouts %T Floating Point Arithmetic in Future Supercomputers %R RNR-88-003 %I NAS Division, NASA Ames Res. Center %D December 1988 %K arithmetic, PDE, CFD, %A David H. Bailey %A Helaman R. P. Ferguson %T A Strassen-Newton Algorithm for High-Speed Parallelizable Matrix Inversion %J Proceedings Supercomputing'88 %I IEEE and ACM SIGARCH %C Orlando, FL %D November 1988 %P 419-424 %K algorithms, %A David H. Bailey %T A High-Performance FFT Algorithm for Vector Supercomputers %J International Journal of Supercomputer Applications %V 2 %N 1 %D Spring 1988 %P 82-87 %K correspondence, %A David H. Bailey %A Horst D. Simon %A John T. Barton %A Martin J. Fouts %T Floating Point Arithmetic for Future Supercomputers %J International Journal of Supercomputer Applications %V 3 %N 3 %D Fall 1989 %P 86-90 %K correspondence, %A David H. Bailey %T FFTs in External Or Hierarchical Memory %J Proc. Supercomputing '89 %I ACM %C Reno, NV %D November 1989 %P 234-242 %K Algorithms, %A David H. Bailey %T FFTs in External or Hierarchical Memory %J The Journal of Supercomputing %V 4 %N 1 %D March 1990 %P 23-35 %X Conventional algorithms for computing large one-dimensional fast Fourier transforms (FFTs), even those algorithms recently developed for vector and parallel computers, are largely unsuitable for systems with external or hierarchical memory. %A David H. Bailey %A King Lee %A Horst D. Simon %T Using Strassen's Algorithm to Accelerate the Solution of Linear Systems, %J The Journal of Supercomputing %V 4 %N 4 %D January 1991 %P 357-371 %K Strassen's algorithm, fast matrix multiplication, linear systems, LAPACK, vector computers, AMS subject classification: 65F05, 65F30, 68F20, CR Subject Classification: F.2.1, G.1.3, G.4, %A David H. Bailey %A Paul O. Frederickson %T Performance Results for Two of the NAS Parallel Benchmarks %J Proceedings Supercomputing'91 %I IEEE %C Albuquerque, New Mexico %D November 1991 %P 166-173 %K supercomputer benchmarking, %A David H. Bailey %T Misleading Performance in the Supercomputing Field %J Proceedings Supercomputing'92 %I IEEE %C Minn., MN %D November 1992 %P 155-158 %X Precursor to the 12 ways paper: 1) Quote only 32-bit performance results, not 64-bit results. 2) Present performance figures for an inner kernel as the performance of the entire application. 3) Quietly employ assembly code and other low-level language constructs. 4) Scale up the problem size with the number of processors, but omit any mention of this fact. 5) Quote performance results projected to a full system. 6) Compare your results against scalar, unoptimized code on Crays. 7) When direct run time comparisons are required, compare with an old code on an obsolete system. 8) If megaFLOPS rates must be quoted, base the operation count on the parallel implementation, not on the best sequential implementation. 9) Quote performance in terms of processor utilization, parallel speedup or megaFLOPS per dollar. 10) Multilate the algorithm used in the parallel implementation to match the architecture. 11) Measure parallel run times on a dedicated system, but measure conventional run times in a busy environment. 12) If all else fails, show pretty pictures and animated videos, and don't talk about performance. %A David H. Bailey %A Eric Barszcz %A Leonardo Dagum %A Horst D. Simon %T NAS Parallel Benchmark Results 10-93 %R RNR Technical Report RNR-93-016 %I NASA Ames Research Center %C Mail Stop T045-1, Moffett Field, CA 94035 %D October 27, 1993 %X email bm-codes@nas.nasa.gov %A Davld H. Bailey %T A High-Performance FFT Algorithm for Vector Supercomputers (Abstract) %E Garry Rodrigue %B Parallel Processing for Scientific Computing %I SIAM %C Philadelphia, PA %D 1989 %P 114 %K numerical methods, %A Duane A. Bailey %T Specifying Communication for Massively Parallel Ensemble Machines %R TR 88 8 %I COINS Dept, University of Mass. %C Amherst %D 09/30/1988 %A Duane A. Bailey %A Janice E. Cuny %T Canister Communication in Parallel Programs %R TR 88 4 %I COINS Dept, University of Mass. %C Amherst %D 10/31/1988 %A Duane A. Bailey %A Janice E. Cuny %Z U Mass. %T An Efficient Embedding of Large Trees in Processor Grids %J Proceedings of the 1986 International Conference on Parallel Processing %I IEEE %D August 1986 %P 819-822 %K Multigrid/mesh applications, CHiP, shape grammars, interconnection, %A Duane A. Bailey %A Janice E. Cuny %A Bruce B. MacLeod %T Reducing Communication Overhead: a Parallel Code Optimization %J Journal of Parallel and Distributed Computing %V 4 %N 5 %D October 1987 %P 505-520 %A F. R. Bailey %T Computational limits on scientific applications %J Spring 1978 Compcon %I IEEE %D 1978 %P 301-303 %K bmiya, %X One of the original NAS Project proposals (Also see BSP and CDC proposals). %A F. Ron Bailey %T Task Allocation and Scheduling %J Second International Conference on Supercomputing, Proceedings, Supercomputer '87, Supercomputer Design, Performance Evaluation and Education %V III %I International Supercomputing Institute, Inc. %D 1987 %P 159 %A F. Ron Bailey %Z NASA Ames Res. Ctr. %T Research and Development in the Numerical Aerodynamic Simulation Program %E Janusz S. Kowalik %B Supercomputing %S NATO ASI, Series F: Computer and System Sciences %V 62 %I Springer-Verlag %C Berlin %D 1990 %P 55-69 %A James Bailey %Z TMC %T The Ghosts of Computers Past: Understanding Data Parallel Architecture in the Context of the Human Computing Era %E Horst D. Simon %B Scientific Applications of the Connection Machine %I World Scientific %C Singapore %D 1989 %P 3-23 %X Opening remarks. Kind of a strange overview. I think I like Ivan Sutherland's comments about data parallelism in Scientific American (about 1980) better. %A Mary L. Bailey %A David Socha %A David Notkin %Z U. Washington %T Parallel Debugging Using Graphical Views %J Proceedings of the 1988 International Conference on Parallel Processing %V II, Software %I Penn State %C University Park, Penn %D August 1988 %P 46-49 %K Software Tools, Voyeur, MIMD, shared memory, icon, vector simulator views, X window system, micro-VAX, %A Mary L. Bailey %A Michael A. Pagels %T Measuring the Overhead in Conservative Parallel Simulations of Multicomputer Programs: Detailed Measurements %R TR 91-14 %I U. Arizona %C Tucson, AZ %D January 1992 %X In this paper we show that it is feasible to characterize the overheads present in conservative parallel simulations of multicomputer programs. We use a modified version of the parallel simulator from the Poker Programming Environment to empirically measure the overhead in two parallel algorithms which use three different interconnection structures. We discuss the sources of overhead and qualitatively discuss their relative importance. %A Gerard G. Baille %A Jean P. Schoellkopf %T Evaluation of a Polish Form Expression on a FI-FO Queue: A New Approach Towards the Realization of a High Level "Pipeline" Computer %J Proceedings of the Sagamore Computer Conference (1975) %D August 1975 %I IEEE %P 200 %K compiling techniques %X Summary only. %A C. F. Baillie %A T. D. Gottschalk %A A. Kolawa %Z Caltech %T Comparisons of Concurrent Tracking on Various Hypercubes %J 3rd Conference on Hypercube Concurrent Computers and Applications %V I, Architecture, Software, Computer Systems and General Issues %I ACM %C Pasadena, CA %D January 1988 %P 155-166 %r cccp-568 %K performance analysis, Mark-III, NCUBE, iPSC, CrOS, CUBIX, BBN Butterfly, linear filtering, MIMD, %A Clieve F. Baillie %A Desmond A. Johnston %A Gregory W. Wilcup %T Status and Prospects of the Computational Approach to High-Energy Physics %J The Journal of Supercomputing %V 4 %N 3 %D September 1990 %P 277-300 %A Clive F. Baillie %Z Caltech %T Comparing Communication in Concurrent Processor Operating Systems %J 3rd Conference on Hypercube Concurrent Computers and Applications %V I, Architecture, Software, Computer Systems and General Issues %I ACM %C Pasadena, CA %D January 1988 %P 167-172 %r cccp-569 %K performance analysis, Mark-II, BBN Butterfly, MIMD, squares benchmark, CrOS, loosely synchronous, MOOSE (OS), %A Clive F. Baillie %A S. Lennart Johnsson %A Luis Ortis %A G. Stuart Pawley %T QED on the Connection Machine %J The 3rd Conference on Hypercube Concurrent Computers and Applications %V II, Applications %I ACM %C Pasadena, CA %D January 1988 %P 1288-1295 %r cccp-572 %r TMC TP CS88-1 (NA88-1) %K applications in physics, gauge theory, plaquette calculation, quantum electro/chromo dynamics, %A Clive F. Baillie %Z Caltech %T Comparing Shared and Distributed Memory Computers %J Parallel Computing %V 8 %N 1-3 %D October 1988 %P 101-110 %K Proc. Intl. Conf. on Vector and Parallel Processors in Computational Science, III [ VAPP III], Aug. 1987, Liverpool, England. [Cover typo.] MIMD computers, shared memory, distributed memory, programming models, monitor, semaphore, fetch-and-add, message passing, operating systems, multi-tasking, loosely synchronous, %A Clive F. Baillie %A Ralph G. Brickner %A Rajan Gupta %A Lennart Johnsson %T QCD with Dynamical Fermions on the Connection Machine %J Proc. Supercomputing '89 %I ACM %C Reno, NV %D November 1989 %P 2-9 %K Applications, quantum chromodynamics, QCD, Connection Machine, performance, %A Clive F. Baillie %Z Caltech %T Lattice QCD: Commercial versus Home-Grown Parallel Computers %J Proceedings of the Fifth Distributed Memory Computing Conference %V I, Applications %I IEEE %C Charleston, SC %D April 1990 %P 397-405 %K Monte Carlo Physics, Rcccp, Connection Machine, DMCC5, %X Article says that the distinction was cleared in the past. Commercial processors have "caught up" and home-grown now requires more tuning. %A Clive F. Baillie %A Roy D. Williams %Z Caltech %T Numerical Simulations of Dynamically Triangulated Random Surfaces on Parallel Computers with 100% Speedup %J Proceedings of the Fifth Distributed Memory Computing Conference %V II, Architecture Software Tools, and Other General Issues %I IEEE %C Charleston, SC %D April 1990 %P 1246-1264 %K Performance Evaluation and Analysis, Rcccp, DMCC5, %A W. L. Bain, Jr. %A S. R. Ahuja %T Performance Analysis of High-Speed Digital Buses for Multiprocessing Systems %J Proceedings of 8th Annual International Symposium on Computer Architecture, SIGARCH Newsletter %V 9 %N 3 %D May 1981 %P 107-134 %K performance analysis %A William L. Bain, Jr. %A J. Robert Jump %T Hardware Scheduling Strategies for Systems with Many Processors %J Proceedings of the 1978 International Conference on Parallel Processing %I IEEE %D August 1978 %P 184-187 %K SULING %X Summary only. %A William L. Bain %T A Global Object Name Space for the Intel Hypercube %J 3rd Conference on Hypercube Concurrent Computers and Applications %V I, Architecture, Software, Computer Systems and General Issues %I ACM %C Pasadena, CA %D January 1988 %P 570-574 %K high-level communication software, iPSC, %A William L. Bain %A Shala Arshi %Z Intel %T Hypersim: A Hypercube Simulator for Parallel Systems Performance Modeling %J 3rd Conference on Hypercube Concurrent Computers and Applications %V I, Architecture, Software, Computer Systems and General Issues %I ACM %C Pasadena, CA %D January 1988 %P 792-800 %K general productivity tools, iPSC, %A William L. Bain %Z Block Island Technologies, Portland %T INTERWORK II: Concurrent Programming Toolkit %J 3rd Conference on Hypercube Concurrent Computers and Applications %V I, Architecture, Software, Computer Systems and General Issues %I ACM %C Pasadena, CA %D January 1988 %P 886-888 %K current multicomputer software products, Intel iPSC, %T Indexed Global Objects for Distributed Memory Parallel Architecture %A William L. Bain %J Proc. of the ACM SIGPLAN Workshop on Object-Based Concurrent Programming, ACM SIGPLAN Notices %V 24 %N 4 %D April 1989 %P 95-98 %K Distributed Programming Issues, %X Examines issues of dynamic load management for indexed global objects in distributed memory parallel architectures. %A William L. Bain %Z Block Island Technologies, Beaverton, OR %T Parallel Discrete Event Simulation Using Synchronized Event Schedulers %J Proceedings of the Fifth Distributed Memory Computing Conference %V I, Applications %I IEEE %C Charleston, SC %D April 1990 %P 90-94 %K Simulation of Systems and Discrete Events, DMCC5, %A William L. Bain %Z Block Island Technologies, Beaverton, OR %T Air Traffic Simulation: An Object Oriented, Discrete Event Simulation on the Intel iPSC/2 Parallel System %J Proceedings of the Fifth Distributed Memory Computing Conference %V I, Applications %I IEEE %C Charleston, SC %D April 1990 %P 95-100 %K Simulation of Systems and Discrete Events, DMCC5, %A William L. Bain %Z Block Island Technologies, Beaverton, OR %T Aggregate Distributed Objects for Distributed Memoly Parallel Systems %J Proceedings of the Fifth Distributed Memory Computing Conference %V II, Architecture Software Tools, and Other General Issues %I IEEE %C Charleston, SC %D April 1990 %P 1050-1055 %K Object Oriented Programming 5th DMCC, %A Raymond A. Bair %Z Argonne National Laboratory %T Putting MAX to Work %J Proceedings of 1986 Array Conference %C Portland, Oregon %D April 1986 %$ 35.00 %X This paper discusses strategies for dense matrix products on the FPS-164/MAX. The optimum approach varies with the hardware resources available, the rank of the matrices and the relative number of rows and columns in the matrices. Code has been developed which optimizes the use of available resources, taking advantage of table memory and matrix accelerators. The MXMA calling sequence was implemented, because it is a very general calling sequence, and because it is available on many vector supercomputers. MXMA allows the stride between elements of a column and between rows of a matrix to be specified for each matrix (C=A*B). For example, only one subroutine is needed to handle any combination of transposed and non-transposed matrices, as well as sub-matrix products. %A Chanderjit Bajaj %T An Efficient Parallel Solution for Euclidean Shortest Paths in Three Dimensions %J IEEE International Conference on Robotics and Automation %D April 7-10 1986 %C San Francisco, CA %K O06 %A Chanderjit Bajaj %A Wayne R. Dyksen %A Christoph M. Hoffmann %A Elias N. Houstis %A John T. Korb %A John R. Rice %T Computing About Physical Objects %I Purdue University %R CSD-TR-696 %D July 1987 %A Raminder S. Bajwa %A Steven R. Seidel %T COMMUNICATION ALGORITHMS FOR TORI AND GRIDS %R CS-TR 89-04 %I Michigan Technological University, Department of Computer Science %C Houghton, Michigan %D November 1989 %X Abstract. This thesis presents and analyzes algorithms for the one-to-all broadcast and complete exchange problems on tori and grids. From the communication point of view the torus is more advantageous than a grid as it has a smaller diameter and smaller average path length than a grid with the same number of nodes. The one-to-all broadcast algorithms presented here for the torus are not optimal but it is also shown that the lower bound cost as derived for vertex-transitive networks is not achievable for a torus in spite of the fact that the torus is a vertex-transitive network. Optimal algorithms for the one-to-all broadcast originating at a corner node of a grid are presented for the torus. The complete exchange algorithm presented here for the grid is not optimal but its cost is of the same order as that of the lower bound cost. A comparison of the lower bound costs for these two problems indicate that the torus is better suited for these tasks and this is borne out by the algorithms presented here. %A A. J. Baker %T Finite Element Concepts in Computational Aerodynamics %B Future Computer Requirements for Computational Aerodynamics %R NASA CP 2032 %I NASA Ames Research Center %C Moffett Field, CA %D February 1978 %P 278-289 %A D. J. Baker %A A. Ephremides %T A Distributed Algorithm for Organizing Mobile Radio Telecommunication Networks %J 2nd International Conference on Distributed Computing Systems %I IEEE %C Paris, France %D April 1981 %P 476-483 %K Local Area Networks and Applications %A D. J. Baker %A D. Moncrieff %A S. Wilson %T Vector Processing and Parallel Processing in Many-Body Perturbation Theory Calculations of Electron Correlation Effects in Atoms and Molecules %R FSU-SCRI-90-24 %I Supercomputer Computations Research Institute %C Tallahassee, FL %D March 1990 %A James R. Baker %T Macrotasking the Singular Value Decomposition of Block Circulant Matrices on the Cray-2 %J Proc. Supercomputing '89 %I ACM %C Reno, NV %D November 1989 %P 243-247 %K Algorithms, %A Lawrence J. Baker %Z Exxon %T Hypercube Performance for 2-D Seismic Finite Difference Modeling %J The 3rd Conference on Hypercube Concurrent Computers and Applications %V II, Applications %I ACM %C Pasadena, CA %D January 1988 %P 1146-1156 %K applications in geology, ACOUS2D, %A M. A. Baker %A K. C. Bowler %A R. D. Kenway %T MIMD implementations of linear solvers for oil reservoir simulation %J Parallel Computing %D 1990 %P 313-334 %K Transputer, Conjugate gradient algorithm, Preconditioning, Decompostion strategy, Performance measurement %A M. G. Baker %A J. H. Hartman %A M. D. Kupfer %A K. W. Shirriff %A J. K. Ousterhout %Z ucb %T Measurements of a Distributed File System %K sprite %P 198-212 %J PROC of the Thirteenth SOSP %V 25 %N 5 %C Pacific Grove, CA %D 13-16 October 1991 %O In \f2\&OSR 25\fP:5 %A T. P. Baker %A G. M. Scallon %T An Architecture for Real-Time Software Systems %T Tutorial on Hard Real-Time Systems %I IEEE Computer Society %D 1988 %P 328-336 %K kernels %A David E. Bakken %A Richard D. Schlichting %T Tolerating Failures in the Bag-of-Tasks Programming Paradigm %J Proceedings of the 21st Int. Symp. on Fault-Tolerant Computing %C Montreal, Canada %D June 1991 %P 248-255 %K FTCS-21, Linda, %r UA CS TR 91-4 %A J. W. Bakker %A J. I. de\ Zucker %T Processes and the denotational semantics of concurrency %I Mathematisch Centrum %D 1982 %R IW 209/82 %K Rdpsdis.bib Rsingh %A J. W. de Bakker %A J.-J. C. Meyer %T Metric semantics for concurrency %C Amsterdam %D 1988 %M f 4,-- %R CWI. Department of Computer Science ; R 8803 %A J. W. de Bakker %A J. N. Kok %T Uniform abstraction, atomicity and contractions in the comparative semantics of concurrent PROLOG %C Amsterdam %D 1988 %M f 4,-- %R CWI. Department of Computer Science ; R 8834 %A J. W. de\ Bakker %A J. I. Zucker %T Denotational semantics of concurrency %J Proc. 14th ACM Symp. on the Theory of Computing %D 1982 %K denotational semantics concurrency %K from Steve Stevenson (fpst@hubcap.clemson.edu) %A J. W. de\ Bakker %A J. J-C. Meyer %A others %T Transition systems, infinitary languages, and the semantics of uniform concurrency %J ICALP 85 %S Lecture Notes in Computer Science %V 194 %I Springer-Verlag %C Berlin %D 1985 %K semantics concurrency %K theory, %K from Steve Stevenson (fpst@hubcap.clemson.edu) %A J. W. de\ Bakker %A W.-P. de\ Roever %A G. Rozenberg, eds. %T Current Trends in Concurrency: Overviews and Tutorials %S Lecture Notes in Computer Science %V 224 %I Springer-Verlag %C New York, NY %D 1986 %K book, text, CR classification: B.1, C.1, C.2, D.4, F.1, F.3, F.4, %A J. W. de\ Bakker %A J. N. Kok %A J.-J. Ch. Meyer %A E.-R. Olderog %A J. I. Zucker %T Contrasting themes in the semantics of imperative concurrency %B Current Trends in Concurrency: Overviews and Tutorials %E J. W. de\ Bakker %E W.-P. de\ Roever %E G. Rozenberg %S Lecture Notes in Computer Science %V 224 %I Springer-Verlag %C New York, NY %D 1986 %P 51-121 %A J. W. de\ Bakker %T Designing concurrency semantics %C Amsterdam %D 1989 %M f 4,-- %R CWI. Department of Computer Science ; R 8902 %A A. Bakkers, ed. %T Applying Transputer Based Parallel Machines %I IOS, P. O. Box 2848 %C Springfield, VA, 22152-2848 %D 1989 %O ISBN 90-5199-011-1 %X Proceedings of OUG 10. %A P. A. Bakut %A E. F. Baburov %A A. M. Varfolomeev %A T. K. Vinstyuk %A N. S. Gritsenko %A V. V. Gritsyk %A A. A. Demin %A B. V. Kisil %A L. M. Krasnov %A V. P. Loginov %A A. Yu Lutsyk %A V. K. Marigodov %A R. M. Palenichka %A A. N. Svenson %A K. N. Sviridov %A N. D. ustinov %A N. Yu Khomich %A G. T. Cherchyk %T Parallel Methods for Pattern Recognition %I Naukova Dumka %C Kiev %D 1985 %K H03 AI06 AT15 %A H. E. Bal %A R. van\ Renesse %J Proc. 4th NGI-SION Symp. Stimulerende Informatica %P 379-385 %C Utrecht %D April 1986 %K amoeba, %A H. E. Bal %A R. van\ Renesse %T A Summary of Parallel Alpha-Beta Search Results %J ICCA Journal %V 9 %P 146-149 %D September 1986 %K amoeba, %A H. E. Bal %T Programming Distributed Systems %I Silicon Press %C Summit, NJ %D 1990 %K book, text, parallel languages, %A H. E. Bal %T Languages for Parallel Programming %J PRISMA Workshop on Parallel Database Systems %C Noordwijk %D 24-26 Sep 1990 %P 7-27 %A H. E. Bal %T An Evolution of the SR Language Design %R IR-219 %I Vrije Universteit %C Amsterdam %D Aug 1990 %K parallel languages, %A H. E. Bal %T Fault Tolerant Parallel Programming in Argus %R IR-214 %I Vrije Universteit %C Amsterdam %D May 1990 %K parallel languages, %A H. E. Bal %T Heuristic Serach in PARLOG using Replicated Worker Style Parallelism %R IR-229 %I Vrije Universteit %C Amsterdam %D Nov. 1990 %A H. E. Bal %T A Comparitive Study of five Parallel Programming Languages %J EurOpen Spring 1991 Conference on Open Distributed Systems %C Tromso, Norway %D May 1991 %K RETE based systems on hypercubes, distributed memory machines, %A Henri E. Bal %A Robbert van\ Renesse %T Parallel Alpha-Beta Search %J Proceedings NGI-SION Symposium Stimulerende Informatica %C Utrecht, Netherlands %P 379-385 %D April 1986 %K EPFL-LITH, %A Henri E. Bal %A Robbert van\ Renesse %A Andrew S. Tanenbaum %T Implementing Distributed Algorithms using Remote Procedure Call %J Proc. National Computer Conference %I AFIPS %C Chicago %P 499-505 %D 1987 %K applications, Amoeba, %p 242-247 in Amoeba book %A Henri E. Bal %A Andrew S. Tanenbaum %A M. Frans Kaashoek %T Orca: A Language for Distributed Programming %R IR-140 %I Dept of Mathematics and Computer Science, Vrije Universiteit %D Dec. 1987 %p 164-171 in Amoeba book %K Amoeba, %X submitted for publication. %A Henri E. Bal %A Andrew S. Tanenbaum %Z Vrije Universiteit %T Distributed Programming with Shared Data %J IEEE Conf. on Computer Languages %J Proc. IEEE CS 1988 Int. Conf. on Computer Languages %C Miami, FL %D Oct. 1988 %P 82-91 %p 138-147 in Amoeba book. %K distributed programming, Amoeba, MIMD, %r IR-149 %d mar 1988 %X Good survey of the area - lots of refs. %A Henri E. Bal %A M. Frans Kaashoek %A Andrew S. Tanenbaum %A Jack Jansen %T Replication Techniques for Speeding up Parallel Applications on Distributed Systems %R IR-202 %I Dept of Mathematics and Computer Science, Vrije Universiteit %D Oct. 1989 %p 148-163 in Amoeba book %K distributed programming, Amoeba, %X submitted for publication. %A Henri E. Bal %A M. Frans Kaashoek %A Andrew S. Tanenbaum %T A Distributed Implementation of the Shared Data-object Model %J Proc. First USENIX/SERC Workshop on Experiences with Building Distributed and Multiprocessor Systems %I IEEE %P 1-19 %D Oct. 1989 %p 171-189 %K distributed programming, Amoeba, %A Henri E. Bal %A M. Frans Kaashoek %A Andrew S. Tanenbaum %Z Vrije Universiteit, Amsterdam %T A Distributed Implementation of the Shared Data-Object Model %J Workshop on Experiences with Distributed and Multiprocessor Systems (WEBDMS) %I Usenix Association %C Ft. Lauderdale, FL %D October 1989 %P 1-19 %K Objects and Virtual Memory, orca, %A Henri E. Bal %A Jennifer G. Steiner %A Andrew S. Tanenbaum %T Programming Languages for Distributed Computing Systems %J ACM Computing Surveys %V 21 %N 3 %D September 1989 %P 261-322 %K special issue on programming language paradigms, %K Categories and Subject Descriptors: C.2.4 [Computer-Communications Networks]: Distributed Systems - distributed applications; D.1.3 [Programming Techniques]: Concurrent Programming; D.3.3 [Programming Languages]: Language constructs - concurrent programming structures; D.4.7 [Operating Systems]: Organization and Design - distributed systems General Terms: Languages, Design Additional Key Words and Phrases: Distributed data structures, distributed languages, distributed programming, functional programming, languages for distributed programming, languages for parallel programming, logic programming, object-oriented programming, parallel programming, ABCL/1, Act 1, Ada, Aeolus, ALPS, AMPL, Argus, Avalon, Blaze, BNR Pascal, BRAVE, Camelot Library, Cantor, [Concurrent CSP] CCSP, [Xerox] Cedar, CLIX, Cluster 86, CMAY, Concurrent C [2], Concurrent CLU, Concurrent LISP, Concurrent PROLOG, Concurrent Smalltalk, CONIC, CSM, CSP-S, CSP/80, CSP, CSPS, CSSA, Delta PROLOG, Dislang, Distributed Smalltalk, DP, DPL-82, ECSP, Emerald, EPL, FRANK, FX-87, GDPL, GHC, GYPSY, Hybrid, Joyce, LADY, LIMP, Linda, Lisptalk, LYNX, MC, Mandala, Mentat, MENYMA/S, Multilisp, NIL, Oc, Occam, OIL, Ondine, Orca, Orient84/K, P*, P-PROLOG, ParAlfl, PARLOG, ParMod, Pascal+CSP, Pascal-FC, Pascal-m, PCL, Planet, Platon, PLITS, PML, POOL, Port Language, Pronet, Quty, QLISP, Raddle, RBCSP, Relational Language, SDL, SINA, Sloop, SR, StarMod, Symmetric LISP, Vulcan, ZENO. %X Not a great survey, but a good one. It does not mention issues closer to what people think as operating system issues. But, it represents a good reference point with all these languages [a few of which I've never heard]: ABCL/1, Act 1, Ada, Aeolus, ALPS, AMPL, Argus, Avalon, Blaze, BNR Pascal, BRAVE, Camelot Library, Cantor, [Concurrent CSP] CCSP, [Xerox] Cedar, CLIX, Cluster 86, CMAY, Concurrent C [2], Concurrent CLU, Concurrent LISP, Concurrent PROLOG, Concurrent Smalltalk, CONIC, CSM, CSP-S, CSP/80, CSP, CSPS, CSSA, Delta PROLOG, Dislang, Distributed Smalltalk, DP, DPL-82, ECSP, Emerald, EPL, FRANK, FX-87, GDPL, GHC, GYPSY, Hybrid, Joyce, LADY, LIMP, Linda, Lisptalk, LYNX, MC, Mandala, Mentat, MENYMA/S, Multilisp, NIL, Oc, Occam, OIL, Ondine, Orca, Orient84/K, P*, P-PROLOG, ParAlfl, PARLOG, ParMod, Pascal+CSP, Pascal-FC, Pascal-m, PCL, Planet, Platon, PLITS, PML, POOL, Port Language, Pronet, Quty, QLISP, Raddle, RBCSP, Relational Language, SDL, SINA, Sloop, SR, StarMod, Symmetric LISP, Vulcan, ZENO. It still lacks, but it depends on the definition of a distributed language. No mention of atomicity. %A Henri E. Bal %A M. Frans Kaashoek %A Andrew S. Tanenbaum %T Experience with Distributed Programming in Orca %J Proc. Int'l Conf. on Comp. Languages '90 %I IEEE %D 1990 %p 190-213 %K CR categories: C.2.4 [Compute-Communications Networks]: Distributed systems - distributed applications; D.1.3 [Programming Techniques]: Concurrent programming; D.3.3 [Programming Languages]: Language Constructs - concurrent programming structures; Algorithms, languages, Orca, all-pairs, shortest paths problem, successive overrelaxation (SOR), travelling salesman problem (TSP), %K Amoeba, %A V. Bala %A J. Bruck %A R. Bryant %A R. Cypher %A P. de\ Jong %A P. Elustondo %A D. Frye %A A. Ho %A C.-T. Ho %A G. Irwin %A S. Kipnis %A R. Lawrence %A M. Snir %J Parallel Computing %V 20 %N 4 %D March 1994 %T The IBM external user interface for scalable parallel systems %P 445-462? %A V. Bala %A S. Kipnis %T Process Groups: a mechanism for the coordination of and communication among processes in the Venus collective communication library %R TR %I IBM T. J. Watson Research Center %C Yorktown Heights, NY %D 19?? %A V. Bala %A S. Kipnis %A L. Rudolph %A M. Snir %T Designing efficient, scalable and portable collective communication libraries %R TR %I IBM T. J. Watson Research Center %C Yorktown Heights, NY %D 19?? %K Venus, %A Meera Balakrishnan %A Rajiv Jain %A C. S. Raghavendra %Z USC %T On Array Storage for Conflict-Free Memory Access for Parallel Processors %J Proceedings of the 1988 International Conference on Parallel Processing %V I, Architecture %I Penn State %C University Park, Penn %D August 1988 %P 103-107 %K Multiprocessor Issues, magic square puzzle, storing N x N arrays, assignment, %A P. Balasingam %A V. P. Roychowdhury %T Massively Parallel Solution of Quantum Transport Problems %J Proc. Frontiers '92: Fourth Symp. on Massively Parallel Computation %C McLean, VA %I IEEE %D October 1992 %P 506-507 %K poster session, %A V. Balasubramanian %A P. Banerjee %T CRAFT: Compiler-Assisted Algorithm-Based Fault Tolerance in Distributed Memory Multiprocessors %J Proceedings of the 1991 International Conference on Parallel Processing %V I, Architecture %I CRC Press %C Boca Raton, FL %D August 1991 %P I-501--I-504 %K fault diagnosis, recovery, and tolerance, concise paper, %A Vijay Balasubramanian %A Prithviraj Banerjee %Z U Ill. %T RECBAR: A Reconfigurable Massively Parallel Processing Architecture %J Proceedings of the 1986 International Conference on Parallel Processing %I IEEE %D August 1986 %P 390-296 %K VLSI and Optical architectures, chain-structured Butterfly architecture (CBAR), reconfigurable CBAR, fault analysis, reliability, redundancy, %A Vijay Balasubramanian %A Prithviraj Banerjee %T A Fault Tolerant Massively Parallel Processing Architecture %J Journal of Parallel and Distributed Computing %V 4 %N 4 %D August 1987 %P 363-383 %A Vasanth Balasundaram %A Ken Kennedy %A Ulrich Kremer %A Kathryn McKinley %A Jaspal Subhlok %Z Rice U. %T The ParaScope Editor: An Interactive Parallel Programming Tool %J Proc. Supercomputing '89 %I ACM %C Reno, NV %D November 1989 %P 540-550 %K Software Environments - Performance Tools, PTOOL, parallel programming environments, interactive, transformations, parallelism detection, dependence analysis, %A Vasanth Balasundaram %A Geoffrey Fox %A Ken Kennedy %A Ulrich Kremer %T An Interactive Environment for Data Partitioning and Distribution %J Proceedings of the Fifth Distributed Memory Computing Conference %V II, Architecture Software Tools, and Other General Issues %I IEEE %C Charleston, SC %D April 1990 %P 1160-1170 %K Software Development Tools, NCUBE, DMCC5, %X Rice was one of the first groups to use existing conventional languages (such as Fortran) augmented with data decomposition specifications. We are currently collaborating with Geoffrey Fox at Syracuse to develop "Fortran D", a language that integrates both data alignment and distribution specifications. We are developing as part of the ParaScope programming environment a Fortran D compiler for the iPSC/860, an automatic data decomposition environment, and a performance estimation tool. %A W. Balazinski %A E. Macha %T A Real-Time Method of Determination of Probable Direction of Fatigue Crack Propagation in Materials %B Parallel Computers, Parallel Mathematics %E M. Feilmeier %I North-Holland %D 1977 %P 319-324 %K application of hybrid computer systems %A G. Balbo %A S. C. Bruell %A S. Ghanta %T Combining Queueing Network and Generalized Stochastic Petri Net Models for the Analysis of Some Software Blocking Phenomena %J IEEE Transaction on Software Engineering %V SE-12 %N 4 %P 561-576 %D April 1986 %K Class migration, critical sections, domains, Generalized Stochastic Petri Nets, serialization delays. %A D. L. Baldauf %T Experiences with an operational associative processor %D August 1974 %J Proceedings of the Sagamore Computer Conference (1974) %I Springer-Verlag %P 270-271 %K ICPP2, RADCAP - the RADC associative processor %A C. H. Baldwin %A S. D. Durham %A J. D. Lynch %A W. J. Padgett %Z U. So. Carolina %T A Hypercube Application in Large Scale Composite Materials Modeling %J Proceedings of the Fifth Distributed Memory Computing Conference %V I, Applications %I IEEE %C Charleston, SC %D April 1990 %P 490-497 %K Other Scientific Applications 5th DMCC, %A C. H. Baldwin %A W. C. Nestlerode %Z U. So. Carolina %T A Large Scale File Processing Application on a Hypercube %J Proceedings of the Fifth Distributed Memory Computing Conference %V II, Architecture Software Tools, and Other General Issues %I IEEE %C Charleston, SC %D April 1990 %P 1400-1404 %K Database and File Systems 5th DMCC, %K multiprocessor file system, file access pattern, parallel I/O, hypercube %X Census-data processing on an nCUBE/10 at USC. Their program uses an interleaved pattern, which is like lps or gw with multi-record records (i.e., the application does its own blocking). Shifted to asynchronous I/O to do OBL manually. [David.Kotz@Dartmouth.edu] %A D. Baldwin %A C. Quiroz %T Parallel Programming and The CONSUL Language %J Proceedings of the 1987 International Conference on Parallel Processing %I Penn State %C University Park, Penn. %D August 1987 %P 389-392 %K programming languages %A Cristian Baleanu %A Dan Tomescu %T Embedding Computers in a Cellular Array %J Computer Architecture News %V 17 %N 5 %D September 1989 %P 108-115 %A Francis J. Balint %T The Positive Impact of Supercomputers on Meteorological Forecasting %J Second International Conference on Supercomputing, Proceedings Supercomputing '87, Industrial Supercomputer Applications and Computations %V II %I International Supercomputing Institute, Inc. %D 1987 %P 239-243 %A Charles R. Ball %A Theodore W. Leung %A Carl A. Waldspurger %T Analyzing Patterns of Message Patterns %J Proc. of the ACM SIGPLAN Workshop on Object-Based Concurrent Programming, ACM SIGPLAN Notices %V 24 %N 4 %D April 1989 %P 191-193 %K applications, %X Describes the Cluster system for display and monitoring of parallelism in concurrently executing systems. %A E. Ball %A J. Feldman %A J. Low %A R. Rashid %A P. Rovner %T RIG, Rochester's Intelligent Gateway: System Overview %J IEEE Transactions on Software Engineering %V SE-2 %N 4 %D December 1976 %P 321-328 %X Reproduced in Tutorial on Local Computer Networks Thurber, K. J., and Freeman, H. A., (Eds.), (1981). %A Frank Ball %A David Hutchison %T Performance Evaluation of FDDI by Emulation %E J. Hillston %E P. J. B. King %E R. J. Pooley %B Proceedings of the 7th UK Performance Engineering Workshop %S Workshops in Computing %I Springer Verlag %D January 1992 %P 179-184? %A J. R. Ball %A R. C. Bollinger %A others %T On the use of the SOLOMON parallel processing computer %J AFIPS Proc. of the FJCC %V 22 %D Dec. 1962 %P 137-146 %K bmiya, %K Rhighnam, architecture, SIMD, software, %A D. H. Ballard %A G. E. Hinton %A T. J. Sejnowski %T Parallel Visual Computation %J Nature %V 306 %N 5938 %D November 1983 %P 1-26 %A D. H. Ballard %A G. E. Hinton %A T. J. Sejnowski %T Parallel Visual Computation %J Nature %V 103 %P 21-26 %D November 1983 %A D. H. Ballard %A P. C. Gardner %A M. A. Srinivas %T Graph Problems and Connectionist Architectures %R TR 167 %D April 1987 %A W. F. Ballhaus, Jr. %T Computational Aerodynamics and Supercomputers %J Digest of Papers COMPCON, Spring 84 %I IEEE %D Feb. 1984 %P 3-14 %K Numerical supercomputers %X The requirements of computation fluid dynamics are covered from the physicists stand point and an introduction to the Numerical Aerodynamic Simulator Project (NAS). %A W. F. Ballhaus, Jr. %T Supercomputing in Aerodynamics %B Supercomputing %E N. Metropolis %E D. H. Sharp %E W. J. Worlton %E K. R. Ames %I University of California %D 1986 %P 195-216 %X Application oriented content. %A N. Balram %A C. Belo %A J. M. F. Moura %Z ECE, CMU %T Parallel Processing on Supercomputers: A Set of Computational Experiments %J Proceedings Supercomputing'88 %I IEEE and ACM SIGARCH %C Orlando, FL %D November 1988 %P 247-257 %K performance, vectorization, microtasking, multitasking, %A D. M. Balston %T A High-Level Language for Constructing Image Processing Commands %B Languages and Architectures for Image Processing %E M. J. B. Duff %E S. Levialdi %I Academic Press %C New York, NY %D 1981 %P 99-116 %K IFL %A R. Balter %A P. Berard %A P. Decitre %T Why Control of the Concurrency Level in DIstributed Systems is More Fundamental than Deadlock Management %J ACM SIGACT-SIGOPS Symposium of Principles of Distributed Computing %I ACM %C Ottawa, Canada %D August 1982 %P 183-193 %A Roland Balter %A Jean-Pierre Banatre %A Michel Banatre %A Yves Deswarte %A Sachaa Krakowiak %A Marc Rozier %A Marc Shapiro %A Jean-Pierre Verjus %T Construction des Systemes d'Exploitation Repartis %I INRIA %N 9 %S Collection Didactique %D April 1991 %O ISBN 2-7261-0691-9 %K text, book on distributed OSes (in French) %X It's in French. %X 1. INTRODUCTION TO DISTRIBUTED SYSTEMS - Issues and History - Distributed Consensus: synchronization; uncertainty; coherence; ordering; termination; fault tolerance; reasoning - Distributed Objects and Programs: process management; protocols and procedures; objects; files, databases, and transactions 2. COMMUNICATION SYSTEMS AND PARALLEL MACHINES - Communication Systems: interfaces and protocols; classification of communication systems; examples of protocols - Parallel Machines: classification of parallel machines; shared-memory multiprocessors; distributed memory multiprocessors 3. MODELS AND LANGUAGES FOR PARALLEL PROCESSING - Introduction: processes; relations between processes - Communication and Synchronization: introduction; procedure-based communication; communication in ADA; multiprocedures; rendez-vous; shared memory; the Linda approach - Concurrent Object-Oriented Programming: introduction to object-oriented programming; the Guide language - Concurrency and Fault Tolerance: atomic transactions; the Argus language - Safe Programming: program proofs; systematic parallel programming - Implementation Mechanisms: implementation of RPC; implementation of rendez-vous 4. BASICS OF DISTRIBUTION - Introduction: why distributed systems; what a distributed system is; an example; the issues - Naming: introduction; internal names; symbolic names; name servers - Synchronization: event ordering; mutual exclusion; example distributed algorithms - Distributed Consistency: the issues; global state of a distributed system; reliable multicast - Models and Structures for Distributed Systems: client-server; RPC; other models 5. DISTRIBUTED MEMORY SYSTEMS - Introduction - Shared Memory in Multiprocessors: strongly coupled multiprocessors; weakily coupled multiprocessors; discussion - Persistent Data in a Distributed Architecture: addressing modes; implementing a single level store - Strongly-Coupled Fault-Tolerant Multiprocessors: Sequoia; tc-FTMP 6. DISTRIBUTED FILE SYSTEMS - Introduction: what is a FS; distributed FSs; empirical observation of FSs - Basic Issues in a DFS: naming files; naming and locating; destruction; availibility and replication; replica consistency; caching - Two Examples: NFS; AFS 7. DISTRIBUTED OBJECT SYSTEMS - Introduction - Object-Oriented Programming: concepts; properties - Object-Oriented Operating Systems: applying the object-oriented approach to OS design; the example of Choices; the SOS protocol library - Object Support Operating Systems - Mechanisms of an Object Support Operating System: object granularity; shared object; persistence; composite objects; mobile objects; fragmented objects; remote invocation; sharing in a distributed setting - Garbage Collection: issues; garbage collection algorithms; reference counting; tracing; distributed garbage collection - Object Management: persistence; accessing an object; object faulting; locating - A Few Object-Support OSes: SOS; COOL; Guide/Comandos; Gothic; Emerald; Amber - SOS; an Object-Support OS: main concepts; the prototype; code objects; fragmented objects; migration of an elementary object 8. DISTRIBUTED TRANSACTION SYSTEMS - Consistency and Transactions: semantic consistency and integrity constraints; concurrency contro; transactions; transactional consistency maintenance; architecture of a transactional system - Concurrency Control: main techniques; locking; deadlocks; deadlock resolution techniques; distributed deadlock detection; distributed deadlock prevention - Valadiation and Recovery: impact of failures; atomicity control by validation and logging; validation and recovery; distributed atomic transactions; validation protocols; failures of secondary memories - Recent Developments in Transaction Systems: nested transactions; complex objects and long transactions; semantic consistency; transactional kernels 9. FAULT TOLERANCE, SECURITY AND PROTECTION - Fault Tolerance: concepts and terminology; classification of failures, errors and faults - Tolerating Accidental Faults: error handling and fault handling; detection and recovery; compensation - Security and Protection: classification of security attacks; access control and protection; other aspects 10. SYSTEM KERNEL TECHNOLOGY - Introduction: distributed OSes; kernel and servers; Chorus; Mach - System Kernels: elementary objects; executive; communication - Virtual Memory: contexts; segments - Building a Sub-System: Chorus/MiX; implementation approach; Unix extensions; advantages of the modular approach; Mach subsystems %A Robert Balzer %A Lee Erman %A Philip London %A Chuck Williams %T HEARSAY-II: A Domain-Independent Framework for Expert Systems %J Proceedings of the First Annual National Conference on AI %D August 1980 %P 108-110 %K ai, distributed problem solving, hearsay %K Rdpsdis.bib Rsingh %A E. Bampis %A J. C Konig %A D. Trystram %T A Low Overhead Schedule for A 3D-Grid Graph %J Parallel Processing Letters %V 2 %N 4 %D December 1992 %P 363-372 %A J.-P. Banatre %T New Concepts for Distributed System Structuring %B Distributed Operating Systems Theory and Practice %E Yakup Paker %E Jean-Pierre Banatre %E Muslim Bozyigit %V 28 %S NATO ASI Series F: Computer and Systems Sciences %I Springer-Verlag %C Berlin %D 1987 %P 175-200 %K Design Issues for Distributed Operating Systems %A J. P. Banatre %A J. P. Routeau %A L. Trilling %T An event driven compiling technique %J Communications of the ACM %V 22 %N 1 %D January 1979 %P 34-42 %A J. P. Banatre %A M. Banatre %A P. Quinton %T Constructing parallel programs and their termination proof %J Proceedings of the 1982 International Conference on Parallel Processing %D August 1982 %I IEEE %P 224-225 %K IRISA France Non-numeric algorithms %A Jean-Pierre Banatre %T Co-operation Schemes for Parallel Programming %E Y. Paker %E J.-P. Verjus %B Distributed Computing Systems (Synchronization, Control and Communication) %I Academic Press %D 1983 %P 149-160 %A Jean-Pierre Banatre %T A Cooperation Scheme and Its Application to Clock Resynchronization in Distributed Systems %I North-Holland %B Parallel Computing 83 %E M. Feilmeier %E G. Joubert %E U. Schnedel %P 381-389 %D 1984 %K process cooperation, proximity relationship, process termination, logical ordering of events, fuzzy time, clock desynchronization, programming languages, enchere (French), %A Jean-Pierre Banatre %A Michel Banatre %A Florimond Ployette %T An Overview of the Gothic Distributed Operating System %I INRIA %C Cedex, France %D Mars 1986 %K Distributed Systems, Multi-functions, Stable Storage, Atomicity, Nested Activities %A Jean-Pierre Banatre %A Michel Banatre %A Florimond Ployette %T The Concept of Multi-function: a General Structuring Tool for Distributed Operating System %J 6th International Conference on Distributed Computing Systems %I IEEE Computer Society %C Los Angeles, CA %D May 1986 %P 478-485 %A M. Banatre %A G. Lapalme %T ENCHERE: A Distributed Auction Bidding System %J 3rd International Conference on Distributed Computing Systems %C Miami, FL %D October 1982 %I IEEE %P 833-839 %K Message Oriented Mechanisms %A M. Banatre %T An Experience in Solving a Transaction Ordering Problem in a Distributed System %B Distributed Operating Systems Theory and Practice %E Yakup Paker %E Jean-Pierre Banatre %E Muslim Bozyigit %V 28 %S NATO ASI Series F: Computer and Systems Sciences %I Springer-Verlag %C Berlin %D 1987 %P 311-330 %K Case Study %A Michel Banatre %A Philippe Joubert %T A Fault Tolerant Tightly Coupled Multiprocessor Architecture based on Stable Transactional Memory %R RR1178.ps.Z %I "Langages et Syste`mes Paralle`les" (LSP) team, IRISA/INRIA-RENNES %D 1990 %K fault-tolerance, stable transactional memory, open architecture, multiprocessor architecture, atomic actions. %X Abstract: Traditionally, tightly coupled multiprocessors allow data sharing between multiple caches by keeping cached copies of memory blocks coherent with respect to shared memory. This is difficult to achieve in a fault tolerant environment due to the need to save global checkpoints in shared memory from where consistent cache states can be recovered after a failure. The architecture presented in this report solves this problem by encapsulating the memory modifications done by a process into an atomic transaction. Caches record dependencies between the transactions associated with processes modifying the same memory blocks. Dependent transactions may then be atomically committed. Such an operation requires a cache coherence protocol responsible for recording process dependencies as well as keeping coherent cached copies of blocks and a shared Stable Transactional Memory owing to which all memory updates are atomic to allow recovery after a processor failure. %X This paper also appeared in the Proceedings of the 20th International Symposium on Fault-Tolerant Computing Systems, pp 89-96, Newcastle, June 1990. %A Michel Banatre %A Gilles Muller %A Bruno Rochat %A Parick Sanchez %T Design Decisions for the FTM: A General Purpose Fault Tolerant Machine %R RR1400 %I "Langages et Syste`mes Paralle`les" (LSP) team, IRISA/INRIA-RENNES %D 1991 %K fault-tolerance, stable transactional memory, open architecture, multiprocessor architecture, atomic actions. %X Abstract: Until now, fault tolerance has been reserved to specialized areas. However, due to the generalization of micro-computers and workstations in distributed environment, more users are concerned with reliability. For instance, diskless workstations are disabled by a failure of a file server. Consequently there is a need for a general purpose fault tolerant system which can support a wide range of applications. This is our goal in the design of the Fault Tolerant Multiprocessor machine. The FTM hardware architecture is built from standard open machines connected by an interconnection sub-system. In such architecture processing elements are built using redundancy. When a processor fails the interconnection sub-system enables another processor to recover and restart computations from a non-erroneous state. Our paper is devoted to the FTM architecture, in particular we detail an implementation of the interconnection sub-system with a stable transactional memory. %X A revised version of this paper has been published in the Proceedings the 21th International Symposium of Fault-Tolerant Computing Systems, Montreal, June, 1991, pp. 71-78. %A Sayed Atef Banawan %T An evaluation of load sharing in locally distributed systems. %R Technical Report 87-08-02 %I Department of Computer Science, University of Washington %D August 1987 %K Dynamic Load Balancing in Distributed Systems %A Marti Bancroft %T Periperal Performance Summary: Models B/C/D IOS %J 1990 Fall Proceedings Cray User Group Meeting %I CUG %C Washington DC %D Fall 1990 %P 319-326? %K performance, %A O. L. Bandman %T Space-Time Transformations of Cellular Computations %E N. N. Mirenkov %B Parallel Computing Technologies %I World Scientific Publishing %C Singapore/New Jersey %D 1990 %P 235-245? %K massively parallel processing, %A O. O. Bandman %T On the Synthesis of Asynchronous Microprogrammable Control and Parallel Processes %J Cybernetics %V 16 %N 1 %D 1980 %P 46-52 %j Kibernetika %n 1 %p 42-47 %X Russian. %A Tadaaki Bandoh %A Yukio Kawamoto %T Design considerations in multi-minicomputer performance %J Proceedings of the 1976 International Conference on Parallel Processing %D August 1976 %I IEEE %P 219 %K Multiple-microprocessors %X Summary only. %A S. Bandyopadhyay %A S. Basu %A A. K. Choudhury %T A Cellular Permuter Array %J IEEE Transactions on Computers %V C-21 %N 10 %D October 1972 %P 1116-1119 %K Cellular array, ordering of variables, permutation network, selector cell %A John Bane %T ZMOB: a highly parallel multiprocessor %R TR 911 %I University of Maryland %C College Park, MD 20742 %D May 1980 %K zmob, architecture, AI %A Arindam Banerjee %T A New Method for Partial-Match Retrievals %J Second International Conference on Supercomputing, Proceedings, Supercomputer '87, Supercomputer Design, Performance Evaluation and Education %V III %I International Supercomputing Institute, Inc. %D 1987 %P 194-202 %A Jayanta Banerjee %A David K. Hsiao %A Krishnamurthi Kannan %T DBC - A Database computer for Very Large Databases %J IEEE Transactions on Computers %V C-28 %N 6 %D June 1979 %P 414-429 %K Clustering mechanism, computer architecture, content-addressable memory, database computer, logic-per-track, mass memory, security enforcement, structure memory, tracks-in-parallel read-out, Special issue on database machines %A Prithviraj Banerjee %A Jacob A. Abraham %T Fault-secure Algorithms for Multiprocessor Systems %J Proceedings of the 11th International Symposium on Computer Architecture, SIGARCH Newsletter %V 12 %N 3 %I IEEE %D June 1984 %P 279-287 %K multiprocessor issues %X This paper describes techniques for achieving fault secureness with low cost in multiple processor systems. %A Prithviraj Banerjee %A Mark Jones %Z University of Illinois, Urbana-Champaign, IL %T A Parallel Simulated Annealing Algorithm for Standard Cell Placement on a Hypercube Computer %J Proceedings of the International Conference on Computer Aided Design %D nov 1986 %P 34-37 %d October 23, 1986 %X Also NASA Review of ICLASS: Illinois Computer Laboratory for Aerospace Systems and Software %A Prithviraj Banerjee %A Craig B. Stunkel %Z CSL, UIUC %T A Novel Approach to System-Level Fault Tolerance in Hypercube Multiprocessors %J 3rd Conference on Hypercube Concurrent Computers and Applications %V I, Architecture, Software, Computer Systems and General Issues %I ACM %C Pasadena, CA %D January 1988 %P 305-311 %K fault tolerance, Gaussian elimination, iPSC D4/MX, %A Prithviraj Banerjee %A Mark Howard Jones %A Jeff S. Sargent %T Parallel Simulated Annealing Algorithms for Cell Placement on Hypercube Multiprocessors %J IEEE Transactions on Parallel and Distributed Systems %V PDS-1 %N 1 %D January 1990 %P 91-106 %K cell placement, error control, hypercube multiprocessor, parallel processing, performance measurements, simulated annealing, VLSI layout, %A R. Banerjee %T Fast network design %B NETWORKS India 84. International Symposium on Data Communication and Computer Networks %C Madras, India %D Oct. 1984 %P 7-14 %O 11 REFS. Treatment PRACTICAL %E H. N. Mahabala %E K. B. Lakshmanan %E S. Srinivasan %I Comput. Soc. India, IFIP, UNESCO %K local area networks LAN communication needs fast microprocessors intelligent peripherals bandwidth requirements voice video facsimile design implementation Cambridge Fast Ring CFR high speed LAN Cambridge Ring 100 Mbit/S VLSI %A U. Banerjee %T Speedup of Ordinary Programs %R 79-989 %I Cornell University %D 1979 %A U. Banerjee %A D. Gajski %A D. Kuck %T Array Machine Control Units for Loops Containing IFs %J Proceedings of the 1980 International Conference on Parallel Processing %I IEEE %D August 1980 %P 28-36 %K Architecture maeder biblio: parallel programming, parallel architecture, %A U. Banerjee %T Direct Parallelization of Call Statements %R Rept 576 %I Center for Supercomputer Research and Development %D 1985 %A U. Banerjee %A D. Gelernter %A A. Nicolau %A D. Padua, eds. %T Languages and Compilers for Parallel Computing %S LNCS %V 589 %I Springer-Verlag %C Berlin %D 1992 %K book, text, %X Fourth Intl. Workshop, Santa Clara, CA, USA, August 1991. %A Utpal Banerjee %A Daniel D. Gajski %T Fast execution of Loops with IF Statements %J Proceedings of the 11th International Symposium on Computer Architecture, SIGARCH Newsletter %V 12 %N 3 %I IEEE %D June 1984 %P 126-132 %K control unit issues %X Shows how to execute in parallel loops containing IF statements. It gives an architectural model of parallel computation and describes the design of a hardware Boolean Recurrence Solver. %A Utpal Banerjee %A Daniel D. Gajski %T Fast Execution of Loops with IF Statements %J IEEE Transactions on Computers %V C-33 %N 11 %D November 1984 %P 1030-1032 %K Array processors, automatic vectorization, Boolean recurrence, loops with IF statements, multiprocessors, parallel processing, Correspondence %A Utpal Banerjee %T A Direct Parallelization of Call Statements-A Review %R CSRD TR 576 %I University of Illinois %C Urbana-Champaign %D May 1986 %K compilers, RCedar, %A Utpal Banerjee %T Dependence Analysis for Supercomputing %I Kluwer Academic Publishers %C Boston %D 1988 %K book, text, grecommended91, %K lls, %A Utpal Banerjee %Z Ctr. for Supercomputing Res. and Develop., U. Ill., Urbana, IL %T Unimodular Transformation of Double Loops, %J Proc. of the 3rd Workshop on Programming Languages and Compilers for Parallel Computing, Irvine, CA Aug. 1990. %D August 1990 %r CSRD TR #1036 %A Utrpal Banerjee %A Shyh-Ching Chen %A David J. Kuck %A Ross A. Towle %T Time and Parallel Processor Bounds for FORTRAN-like Loops %J IEEE Transactions on Computers %V C-28 %N 9 %P 660-670 %D September 1979 %K bhibbard %K grecommended, Analysis of programs, data dependence, Fortran-like loops, parallel computation, processor bounds, program speedup, recurrence relations, time bounds, Parallel processing maeder biblio: parallel programming, concepts, %A S. Y. Bang %A P. A. Ng %A P. K. Blackwell %T Protocol Validation by Synthesizing Communicating Systems Behaviors %J Computer Software and Applications Conference (COMPSAC80) %I IEEE %D October 1980 %P 348-354 %K Distributed systems %A J. S. Banino %A others %T Synchronization for Distributed Systems Using a Single Broadcast Channel %J 1st International Conference on Distributed Computing Systems %I IEEE %D October 1979 %P 330-338 %K Specification and Design of Communication Systems %A J. S. Banino %A J. C. Fabre %T Distributed coupled actors: A Chorus proposal for reliability %J 3rd International Conference on Distributed Computing Systems %C Miami, FL %D October 1982 %I IEEE %P 128-134 %K Distributed operating systems %A J. S. Banino %A J. C. Fabre %A M. Guillemont %A C. Morisset %A M. Rozier %T Some Fault-Tolerant Aspects of the CHORUS Distributed System %J Proceedings of the 5th International Conference on Distributed Computing Systems %I IEEE Computer Society %C Denver, Colorado %D May 1985 %P 430-437 %K Software Approach to Fault tolerance, SM 90, INRIA, %A Jean-Serge Banino %T Architecture of the CHORUS Distributed System %E Y. Paker %E J.-P. Verjus %B Distributed Computing Systems (Synchronization, Control and Communication) %I Academic Press %D 1983 %P 251-264 %K Actor based system %A R. Bank %A A. Sherman %T Algorithmic Aspects of the Multi-Level Solution of Finite Element Equations %I Center for Numerical Analysis %R CNA-144 %C University of Texas at Austin %D 1978 %X Remove? %A R. Bank %A T. Dupont %T An Optimal Order Process for Solving Elliptic Finite Element Equations %J Math. Computation %V 36 %P 35-51 %D 1981 %X Remove? %A H. T. Banks %A J. M. Crowley %A I. G. Rosen %T Methods for the Identification of Material Parameters in Distributed Models for Flexible Structures %I ICASE %R 84-66 %D May 1986 %K parameter estimation, computational methods, Euler-Bernoulli beams %A H. T. Banks %A S. S. Gates %A I. G. Rosen %A Y. Wang %T The Identification of a Distributed Parameter Model for a Flexible Structure %R 86-71 %I ICASE, NASA Langley Research Center %C Hampton, VA %D October 1986 %K parameter estimation, computational methods, damped beams, spline approximations %A Neil Bannister %T DEC and UNICOS Connectivity %J Proceedings, 27th Semi-Annual Cray User Group Meeting %I CUG %C London %D April 1991 %P 94-97? %K communications, %A A. K. Bansal %A L. S. Sterling %T On Source-To Source Transformation of Sequential Logic Programs to And-Parallelism %J Proceedings of the 1987 International Conference on Parallel Processing %I Penn State %C University Park, Penn. %D August 1987 %P 795-802 %K Logic Programming & Systems %A Arvind K. Bansal %A Leon S. Sterling %Z CWRU, Cleveland %T Compiling Enumerate-And-Filter Programs for Efficient Execution Under Committed-Choice and-Parallelism %J Proceedings of the 1988 International Conference on Parallel Processing %V II, Software %I Penn State %C University Park, Penn %D August 1988 %P 22-25 %K Logic Programming, AND-parallelism, committed-choice, compilation, enumerate-and-filter, generate-and-test, logic program, OR-program, stream parallelism, static and dynamic enumeration, %A Arvind K. Bansal %A Leon S. Sterling %T Transforming Generate-and-Test Programs to Execute Under Committed-Choice AND-Parallelism %J International Journal of Parallel Programming %V 18 %N 5 %D October 1989 %P 401-446 %K committed choice, logic programming, parallelism, program transformation, %A Arvind K. Bansal %A Jerry L. Potter %T Exploiting Data Parallelism for Efficient Execution of Logic Programs with Large Knowledge Base %R CS-9005-20 %I Dept. of Mathematics and Computer Science, Kent State University %C Kent, Ohio 44242 %D 1990 %X ABSTRACT: A model is presented which is designed to exploit data parallelism present in associative computers for the efficient execution of logic program. Data parallel model allows efficient handling of very large knowledge bases. A scheme for logical data structure representation incorporating direct interface between lists and vectors is described which allows the efficient integration of symbolic and numerical computation on existing associative supercomputers. An algorithm for data parallel goal reduction which is almost independent of number of clauses is discussed. The associative goal reduction scheme efficiently prones non-unifiable clauses and performs data parallel binding of variables with single occurrence. The association property in the model effectively reduces the cost of shallow backtracking, deep backtracking, and garbage collection. %A Arvind K. Bansal %A Jerry Potter %T Exploiting Data Parallelism for Large Knowledge Bases %R CS-9202-03 %I Dept. of Mathematics and Computer Science, Kent State University %C Kent, Ohio 44242 %D 1992 %X ABSTRACT: A model is presented which exploits data level massive parallelism present in associative computers for the efficient execution of logic programs with large knowledge bases. The exploitation of data parallelism in goal reduction efficiently prunes non-unifiable clauses resulting into effective reduction of shallow backtracking, and marks the potential bindings for the variables with single occurrence in a manner which is independent of the number of clauses. During deep backtracking, bindings are released simultaneously using associative search resulting in a significant reduction in execution time overhead of backtracking and garbage collection. %X A scheme for a logical data structure representation incorporating direct interface between lists and vectors is described. This allows the efficient integration of symbolic computation and a large class of vectorizable numerical computation on associative supercomputers. %A Arvind K. Bansal %A Jerry L. Potter %A Lokam V. Prasad %T An Associative Compilation Model to Exploit Data-parallelism in Function-free Logic Programs %R CS-9203-04 %I Dept. of Mathematics and Computer Science, Kent State University %C Kent, Ohio 44242 %D 1992 %X ABSTRACT: This paper describes a model for the compilation of function free logic programs to exploit the data-parallelism present in associative supercomputers. The compilation process maps sets of clause-heads to associations of vectors, and subgoals to low level code analogous to WAM to achieve a synergistic efficiency. The exploitation of data-parallelism on associative supercomputers allows goal reduction with all unifiable clauses almost independent of the number of clauses, and minimizes shallow backtracking. The use of associative searching facilitates deep backtracking, intelligent backtracking, and the handling of bindings of aliased variables with very low overhead. The representation of subgoals as low level code reduces the excessive data-transfer present in conventional data-parallel models [2,3] by making use of an associative analogue of global registers. The compiler also uses compile-time data flow analysis to derive groundness and width information. This information is used for efficient code optimization, and allows efficient data-matching. %A H. Bantelmann %A H. Kalis %A A. Montag %T MIMUS \(em A Flexible Multiprocessor Systems %B Parallel Computers, Parallel Mathematics %E M. Feilmeier %I North-Holland %D 1977 %P 173-177 %K MIMUS (MIcroprocessor based MUltiprocessor System), industrial and industrial like projects maeder biblio: parallel hardware and devices, specific parallel implementation, %A Iftikhar A. Baqai %A Tomas Lang %T Reliability aspects of the ILLIAC IV computer %J Proceedings of the 1976 International Conference on Parallel Processing %D August 1976 %I IEEE %P 123-131 %K Reliability %A Ilan Bar-on %A Uzi Vishkin %R ULTRACOMPUTER NOTE #61 %T Optimal Parallel Generation of a Computation Tree Form %D October 1983 %O Also Computer Science Technical Report #90. %A Ilan Bar-On %A Uzi Vishkin %T Optimal Parallel Generation of a Computation Tree Form %J Proceedings of the 1984 International Conference on Parallel Processing %I IEEE %D August 1984 %P 490-495 %r ULTRACOMPUTER NOTE #61, TR #90 %d October 1983 %K NYU Ultracomputer, combinatorial algorithms %X A later version of this paper appears in ACM TOPLAS, April 1985, pages 348-357. %A Ilan Bar-On %A Uzi Vishkin %T Optimal Parallel Generation of a Computation Tree Form %J ACM Transactions on Programming Languages and Systems %I ACM %V 7 %N 2 %D April 1985 %P 348-357 %K performance, theory, parallel algorithms, optimal speed-ups, parsing Ultracomputer, %X An earlier version appears in ICPP 84 (from an Ultracomputer note). %A Dave Barach %A Robert Wells %A Thomas Uban %A James Gibson %Z BBN %T Highly Parallel Virtual Memory Management on the TC2000 %J Proceedings of the 1990 International Conference on Parallel Processing %V I, Architecture %I Penn State U. Press %C University Park, Penn %D August 1990 %P I-549--I-550 %K poster session, Multiprocessing and Parallel Processing, %A Her Barad %T An Object-Oriented Prototype of a Pyramid Architecture for Computer Vision %R 88-00 %I Department of Electrical Engineering, Tulane University %C New Orleans, LA 70118-5674 %D 03-02-88 %X This paper describes a working software prototype of a pyramid architecture to investigate its use and effectiveness in computer vision. The results demonstrate that the pyramid architecture is an effective architecture for a wide range of computer vision tasks. An object-oriented methodology for modeling the individual processors and ports is used. The method of modeling and constructing the prototype is efficient and flexible. The prototype is used as a testbed for simulations of computer vision tasks. The segmentation results are presented. Implications of these results are discussed as well as the advantages of using this method of modeling to examine alternative architectures. %A Her Barad %T Rapid Prototyping of Massively Parallel Architecture %R 88-01 %I Department of Electrical Engineering, Tulane University %C New Orleans, LA 70118-5674 %D 05-30-88 %X This paper describes a working software prototype of a pyramid architecture, known as the SCOOP pyramid. The purpose of the prototype is to analyze the effectiveness of the architecture for computer vision work. The SCOOP pyramid was built using Smalltalk. Each functional element of the entire architecture (i.e., processors, internal elements of processors, ports connecting processors, etc.) was modeled using different classes. The SCOOP environment is flexible enough to handle architectures of different topologies and those created from different types of hardware (e.g. optical). The construction of a prototype encourages the fine-tuning of the architecture design. The prototype is used as a test bed for simulations of computer vision tasks and the results of some of these simulations are presented. The SCOOP environment is a paradigm in which one can rapidly prototype architectures of arbitrary topology, complexity, and composition. The pyramid architecture is shown by simulation to be an effective architecture for a wide range of computer vision tasks from low level pixel-oriented operations to segmentation to high level symbolic operations. A description of the environment and results of some benchmarks are presented. %A P. M. C. C. Barahona %A J. R. Gurd %T Processor Allocation in a Multi-ring Dataflow Machine %J Journal of Parallel and Distributed Computing %V 3 %N 2 %D September 1986 %P 305-327 %A A. Barak %A D. Malki %A R. Wheeler %T AFS, BFS, CFS ... or Distributed File Systems for UNIX %J Proceedings of the Autumn 86 EUUG Conference %C Manchester, United Kingdom %D September 1986 %P 461-472 %K Mosix, %A A. Barak %A D. Malki %T Distributed Light Weight Processes in MOS %J Proceedings of the Autumn 88 EUUG Conference %C Cascais, Portugal %D October 1988 %P 335-343 %A A. Barak %A R. Wheeler %T MOSIX: An Integrated Multiprocessor UNIX %J Proc. of the Winter 1989 USENIX Conference %P 101-112 %C San Diego, CA. %D February 1989 %A A. Barak %A A. Shiloh %A R. Wheeler %T Flood Prevention in the MOSIX Load-Balancing Scheme %J IEEE-TCOS Newsletter %V 3 %N 1 %D Winter 1989 %P 24-27 %A A. Barak %A S. Guday %A R. Wheeler %T The MOSIX Distributed Operating System, Load Balancing for UNIX %S Lecture Notes in Computer Science %V 672 %I Springer-Verlag %C Berlin %D 1993 %K book, text, %A A. B. Barak %T Dynamic Process control for distributed computing %J 3rd International Conference on Distributed Computing Systems %C Miami, FL %D October 1982 %I IEEE %P 36-40 %K Scheduling and control in distributed operating systems %A Amnon Barak %A Amnon Shiloh %T A Distributed Load Sharing Policy to Minimize the Average Response Time %D April 1983 %R Report No. DCL-TR-83-12 %I The Hebrew University %C Jerusalem %K balancing %A Amnon Barak %A Ami Litman %T The Goals and Architecture of the MOSES Distributed Operating System %R Report No. DCL-TR-83-07 %D Jan. 1983 %I The Hebrew University %C Jerusalem %A Amnon Barak %A Zvi Drezner %T A Probabilistic Algorithm for Scattering Information in a Multicomputer System %R Report CRL-TR-15-84 %I University of Michigan %C Ann Arbor, Mi. %D March 1984 %X MOS is a distributed UN*X I had the opportunity to work on. It is probably the first system providing dynamic load balancing by process migration. MOS is scalable to very large installations (hundreds of machines). Adding more machines introduces little or no overhead to kernel mechanisms. To obtain this scalability, MOS uses probabilistic algorithms. %A Amnon Barak %A Zvi Drezner %T Distributed algorithms for the average load of a multi-computer %R Report CRL-TR-17-84 %I University of Michigan %C Ann Arbor, Mi. %D March 1984 %A Amnon Barak %A Ami Litman %T MOS: a Multicomputer Distributed Operating System %J Software: Practice and Experience %V 15 %N 8 %P 725-737 %D AUG 1985 %K Barak1, mosix, %A Amnon Barak %A Amnon Shiloh %T A Distributed Load Balancing Policy for a Multicomputer %J Software Practice and Experience %V 15 %N 9 %D September 1985 %P 901-913 %K mosix, %A Amnon Barak %A On G. Paradise %T MOS-Scaling Up UNIX %J USENIX 1986 Technical Conference %C Atlanta, Georgia %D June 9-13, 1986 %P 414-418 %A Amnon Barak %A On G. Paradise %T MOS -- A Distributed UNIX %B Proc. first AMIX Conf. %P 14-20 %C Tel-Aviv %D June 1986 %A Amnon Barak %A On G. Paradise %T MOS - A Load Balancing UNIX %J Proc. EUUG conference on Dist. Systems %C Manchester (UK) %D Sept. 1986 %P 273-280 %A Amnon Barak %A Bernard A. Galler %A Yaron Farber %T A Holographic File System for a Multicomputer with Many Disk Nodes %D May 1988 %R TR 88-6 %I Dept. of Computer Science, Hebrew University of Jerusalem %K parallel I/O, hashing, reliability, disk shadowing, %X Describes a file system for a distributed system that scatters records of each file over many disks using hash functions. The hash function is known by all processors, so no one processor must be up to access the file. Any portion of the file whose disknode is available may be accessed. Shadow nodes are used to take over for nodes that go down, saving the info for later use by the proper node. Intended to easily parallelize read/write accesses and global file operations, and to increase file availability. [David.Kotz@Dartmouth.edu] %A Linda S. Barasch %A S. Lakshmivaranhan %A S. K. Dhall %T Generalized Gray Codes and Their Properties %J Proceedings Supercomputing '88: Supercomputer Design: Hardware & Software %V 3 %I International Supercomputing Institute, Inc. %C St. Petersburg, Florida %D 1988 %P 331-337 %K Supercomputer Encoding and Accuracy %A M. R. Barbacci %A C. B. Weinstock %A J. M. Wing %T Durra: Language Support for Large-Grained Parallelism %J Proceedings from the Second Workshop on Large-Grained Parallelism %I Carnegie-Mellon University Software Engineering Institute %R Special Report CMU/SEI-87-SR-5 %E Mario R. Barbacci %C Pittsburgh, PA %D November 1987 %P 6-7 %A M. R. Barbacci %A D. L. Doubleday %A C. B. Weinstock %T Application-Level Programming %J Proc. 10th International Conference on Distributed Computing Systems %I IEEE %C Paris, France %D May-June 1990 %P 458-465 %A Mario R. Barbacci %A Jeannette M. Wing %T Durra: A Task-level Description Language %J Proceedings of the 1987 International Conference on Parallel Processing %I Penn State %C University Park, Penn. %D August 1987 %P 370-376 %K programming languages %A D. Barbara %A H. Garcie-Molina %T How Expensive is Data Replication? An Example %J 3rd International Conference on Distributed Computing Systems %C Miami, FL %D October 1982 %I IEEE New York, USA, P: xix+901 %P 263-268 %D October 1982 %O 11 Refs Treatment PRACTICAL. %K database management systems distributed processing file organisation. data replication cost distributed computing system average response time hardware costs performance queueing delays conflicts concurrency control deadlock avoidance two phase commit protocol writing of logs. Replicated Databases %X A case study illustrates the cost of replicating data in a distributed computing system. The authors study the average response time of transactions and hardware costs under three configurations: one processor, one database copy; one processor, two database copies; and two processors, two database copies. The performance results are obtained using detailed simulations which take into account factors such as the computing, input-output and transmission times involved in processing transactions; the queueing delays; the conflicts among transactions; the concurrency control mechanism (with deadlock avoidance); and the two phase commit protocol and writing of logs. %A D. Barbara %A R. J. Lipson %T A Randomized Technique for Remote File Comparison %J Procs. of the 9th Int. Conf. on Distributed Computing Systems %I IEEE %D June 1989 %P 12-21 %A Daniel Barbara %A Hector Garcia-Molina %T Mutual exclusion in partitioned distributed systems %J Distributed Computing %Z Princeton University %V 1 %P 119-132 %K Partitioned distributed systems - mutual exclusion mechanisms %A Daniel Barbara %A Hector Garcia-Molina %A Annemarie Spauster %T Protocols for Dynamic Vote Registration %J Proceedings of the Fifth Annual ACM Symposium on Principles of Distributed Computing %C Calgary, Alberta, Canada %D August 1986 %P 195-206 %A Daniel Barbara %A Hector Garcia-Molina %A Annemarie Spauster %T Policies for Dynamic Vote Reassignment %J 6th International Conference on Distributed Computing Systems %I IEEE Computer Society %C Los Angeles, CA %D May 1986 %P 37-44 %A Daniel Barbara %A Hector Garcia-Molina %A Bernardo Feijoo %T Exploiting Symmetries for Low-Cost Comparison of File Copies %J 8th International Conference on Distributed Computing Systems %I IEEE Computer Society %C San Jose, CA %D June 1988 %P 471-479 %K techniques for improving data availability, triple modularly redundant (TMR), %X Compared with Metzner and Fuchs (2 different) strategies. %A G. Barber %T Supporting organizational problem solving with a workstation %I A.I. Lab, M.I.T. %D 1982 %R Memo 681 %K Rdpsdis.bib Rsingh %A Anthony J. Barbera %A M. L. Fitzgerald %A James S. Albus %A Leonard S. Haynes %T A Language Independent Superstructure for Implementing Real-Times Control Systems %J International Workshop on High-Level Computer Architecture %I Univ. of Maryland %D May 1984 %P 7.28-7.39 %K High level language architecture evaluation, Rhlca, %A R. W. Barbieri %T Estimation of Wind-Wave Interaction Spectra by the Maximum Entropy Method %R SRC-TR-87-005 %I Supercomputing Research Center %C Lanham, MD %D June 1987 %A Michael Barborak %A Miroslaw Malek %A Anton Dahbura %T THE CONSENSUS PROBLEM IN FAULT-TOLERANT COMPUTING %R TR-91-40 %I Department of Computer Sciences, The University of Texas %C Austin, TX %D December 1991 %K Algorithms, Design, Reliability, Consensus problem, system diagnosis, Byzantine agreement, decision theory. %O 84 pages; $5.00 %X ABSTRACT: The consensus problem is concerned with the agreement on a system status by the fault-free segment of a processor population in spite of the possible inadvertent or even malicious spread of disinformation by the fault segment of that population. The resulting protocols are useful throughout fault-tolerant distributed systems and will impact the design of other decision systems to come. This paper surveys research on the consensus problem, compares approaches, outlines applications, and suggests directions for future work. %A Valmir C. Barbosa %A Eli Gafni %T A Distributed Implementation of Simulated Annealing %J Journal of Parallel and Distributed Computing %V 6 %N 2 %D April 1989 %P 411-434 %K special issue: neural computing, research notes, %A Valmir C. Barbosa %T Massively Parallel Models of Computation %S E. H. Series on AI %I Ellis Horwood %C New York %D 1993? %K book, text, %X Printing problems? Copy had first 20+ pages missing Masthead and chaps. 1-2. %A Valmir Carneiro Barbosa %T Concurrency in Systems with Neighborhood Constraints %I UCLA Computer Science Department %R PhD thesis %C Los Angeles %D 1986 %K simulated annealing, %A H. P. Barendregt %A M. van\ Leeuwen %T Functional programming and the language TALE %B Current Trends in Concurrency: Overviews and Tutorials %E J. W. de\ Bakker %E W.-P. de\ Roever %E G. Rozenberg %S Lecture Notes in Computer Science %V 224 %I Springer-Verlag %C New York, NY %D 1986 %P 122-207 %A H. P. Barendregt %A M. C. J. D. Van\ Eeekelen %A M. J. Plasmeijer %A J. R. W. Glauert %A J. R. R. Kennaway %A M. R. Sleep %T LEAN: An Intermediate Language based on Graph Rewriting %J Parallel Computing %V 9 %N 2 %D January 1989 %P 163-177 %K PARLE: conference on parallel architectures and languages -- Europe, functional programming, generalised graph rewriting, computational models, Alvey, GRS, TRS (term rewriting system), CLEAN, %A J. Barhen %A J.R. Einstein %A C.C. Jorgensen %T Advances in Concurrent Computation for Machine Intelligence and Robotics %J Second International Conference on Supercomputing, Proceedings Supercomputing '87, Industrial Supercomputer Applications and Computations %V II %I International Supercomputing Institute, Inc. %D 1987 %P 84-97 %A Jacob Barhen %A Edith C. Halbert %T ROSES: An Efficient Scheduler for Precedence-Constrained Tasks on Concurrent Multiprocessors %B Hypercube Multiprocessors 1986 %I siam %E Michael T. Heath %C Philadelphia, PA %D 1986 %K Processor Scheduling %P 123-147 %A G. Barigazzi %A A. Ciuffoletti %A L. Strigini %T A Distributed algorithm for post-failure load redistribution %J 3rd International Conference on Distributed Computing Systems %C Miami, FL %D October 1982 %I IEEE %P 71-76 %K Fault Tolerance Methods %A G. Barigazzi %A L. Strigini %T Application-Transparent Setting of Recovery Points %J Proceedings of the Thirteenth International Symposium on Fault-Tolerant Computing %P 48-55 %D June 1983 %A W. B. Baringer %A B. C. Richards %A R. W. Brodersen %A J. Sanz %A D. Petkovic %T A VLSI Implementation of PPPE for Real-Time Image Processing in Radon Space - Work in Progress %J IEEE Computer Society Workshop on Computer Architectures for Pattern Analysis and Machine Intelligence %D October 1987 %P 88-93 %K Rhighnam, architecture, projection, %A L. L. Barinka %A K. W. Neves %A P. G. Tuttle %T Performance of Some Vectorized Mathematical Software %I Babcock & Wilcox Co. %R Report NPGD-TM-361 %D April 1976 %K Gauss LU decomposition, CDC 7600, Cray-1, TI ASC, %K Repri, %X Study took the LLL SUB/STACKLIB package for the CDC7600 and modified it to better exploit the pipeline capability of that machine. %A D. Barkai %A K. Moriarty %A C. Rebbi %T A Highly Optimized Vectorized Code for Monte Carlo Simulations of SU(3) Lattice Gauge Theories %J CYBER 200 Applications Seminar %R NASA Conference Publication 2295 %D October 1983 %E J. Patrick Gary, Compiler %I NASA Goddard Space Flight Center %C Greenbelt, Maryland %P 119-144 %A D. Barkai %A A. Brandt %T Vectorized Multigrid Poisson Solver for the CDC CYBER 205 %J CYBER 200 Applications Seminar %R NASA Conference Publication 2295 %D October 1983 %E J. Patrick Gary, Compiler %I NASA Goddard Space Flight Center %C Greenbelt, Maryland %P 299-311 %A D. Barkai %A K. J. M. Moriarty %A C. Rebbi %T A highly optimized vectorized code for Monte Carlo simulations of SU(3) lattice gauge theories %J Proceedings of the 1984 International Conference on Parallel Processing %I IEEE %D August 1984 %P 101-108 %K Cyber 205, performance analysis, application numeric computation %A D. Barkai %A K. J. M. Moriarty %A C. Rebbi %T Supercomputers in Theoretical High-Energy Physics %B Supercomputers in Theoretical and Experimental Science %E Jozef T. Devreese %E Piet Van\ Camp %I Plenum Press %C New York %P 145-156 %D 1985 %A D. Barkai %A K. Moriarty %A C. Rebbi %T A Modified Conjugate Gradient Solver for Very Large Systems %E R. Numrich %B Proceedings of the Supercomputer Applications Symposium October 31 - November 1, 1984 %I Purdue University %D 1985 %K Cyber 205 %X Also see ICPP85, pages 284-290. %A David M. Barkai %A Kevin J. M. Moriarty %T Applications Development on the CDC Cyber 205 %E Myron Ginsberg %B High-Speed & Large-Scale Computing: A Panoramic View %R SP-763 %I SAE %D 1988 %P 3-16 %K supercomputers and their applications, %A David M. Barkai %A Massimo Campostrini %A Kevin J. M. Moriarty %A Caludio Rebbi %T Applications Development on the ETA-10 Supercomputer %E Myron Ginsberg %B High-Speed & Large-Scale Computing: A Panoramic View %R SP-763 %I SAE %D 1988 %P 17-44 %K supercomputers and their applications, %A Budak Barkan %Z Jet Propulsion Laboratory %T Fast Unpack Routines for AP-120B %J Proceedings of 1981 Array Conference %C St. Louis, Missouri %D April 1981 %$ 25.00 %X A fast unpack routine based on consecutive locations was written for AP-120B. The code highlights tricks to alleviate conflicts and to do efficient branching. %A Budak Barkan %A Chialin Wu %Z Jet Propulsion Laboratory %T Transpose of Externally Stored Matrices %J Proceedings of 1982 Array Conference %C Boston, Massachusetts %D March 1982 %$ 25.00 %X This paper presents a method for transposition of arbitrary matrices that are larger than available primary storage. Advantages of the approach compared to previously reported results are flexibility and efficiency. Input matrix dimensions are unrestricted and the implementation is very fast. This transposition method should be of interest to those carrying out 2D Fast Fourier Transforms on FPS Array Processors. %A Budak Barkan %A Shirley Pang %Z Jet Propulsion Laboratory %T Transpose of Externally Stored Matrices II %J Proceedings of 1983 Array Conference %C Monterey, California %D April 1983 %$ 25.00 %X This paper presents a method for transposition of arbitrary matrices that are larger than available primary storage. The algorithm utilizes special purpose IO routines to facilitate the transposition operation as skip-write, sequential-read. The intermediate file structure is arranged to mask out latency. This software cylinder formatting technique is demonstrated to yield an efficient implementation. Timing results as a function of matrix and buffer sizes are tabulated. %A K. E. Barker %A T. P. Keenan %T Local area network security %J Canadian Information Processing Society Session 84 Proceedings. 1984: Images of Fear, Images of Hope %C Calgary, Alberta, Canada %I Canadian Information Processing Society, Toronto, Ontario, Canada, xvi+513 %P 489-499 %O 25 Refs Treatment PRACTICAL. %D 9-11 May 1984 %K computer networks security of data. distributed computation security computer industry local area network security template authentication integrity. %X Recent trends toward distributed computation have given rise to concerns about security within the computer industry. This paper provides a possible solution to the problem in the environment of a local area network (LAN). Security issues are discussed and a security template is developed that can be overlaid on a LAM. The template should provide for secrecy, authentication, integrity and availability while maintaining the flexibility necessary to take the fullest advantage of the distributed environment. %A S. Barkhordarian %T RAMPS: A Realtime Structured Small-Scale Data Flow System for Parallel Processing %J Proceedings of the 1987 International Conference on Parallel Processing %I Penn State %C University Park, Penn. %D August 1987 %P 610-613 %K Architecture %A R. Barkley %A T. Paul Lee %T A Lazy Buddy System Bounded by Two Coalescing Delays %J Proc. Twelfth ACM Symposium on Operating Systems, Operating Systems Review %V 23 %N 5 %D December 1989 %P 167-176 %K Performance %A J. Barlow %A I. Ipsen %T Parallel Scaled Givens Rotations for the Solution of Linear Least Squares Problems %I Yale University Dept. of Computer Science %R YALEU/DCS/RR-310 %D 1984 %A Jesse L. Barlow %A Udaya B. Vemulapati %Z Penn State %T Incremental Condition Estimator for Parallel Sparse Matrix Factorization %J Proceedings of the Fifth Distributed Memory Computing Conference %V I, Applications %I IEEE %C Charleston, SC %D April 1990 %P 322-327 %K Sparse Matrix Algorithms, QR, DMCC5, %A R. Barlow %A D. Evans %T Synchronous and Asynchronous Iterative Parallel Algorithms for Linear Systems %J Comput. J. %V 25 %P 56-60 %D 1982 %X Parallel Algorithms for the Iterative Solutions to Linear Systems. %A R. Barlow %A D. Evans %A J. Shanehchi %T Sparse Matrix Vector Multiplication on the DAP %E D. J. Paddon %B Supercomputers and Parallel Computation %I Clarendon Press %C Oxford, England %D 1984 %P 147-155 %K SIMD, %K Ricase2, %A R. H. Barlow %A D. J. Evans %A J. Shanehchi %T Synchronous parallel versions of the power method %I Loughborough %K Rdap, %A R. H. Barlow %A D. J. Evans %T A Parallel Organisation of the Bisection Algorithm %J Computing Journal %V 22 %N 3 %D 1979 %P 267-269 %K maeder biblio: parallel algorithms, specific parallel implementations, applications and implications for parallel processing, %A R. H. Barlow %A D. J. Evans %A J. Shanehchi %T Parallel Merging Algorithm %J Information Processing Letters %V 13 %N 3 %P 103-106 %D 1981 %A R. H. Barlow %A D. J. Evans %A J. Shanehchi %T Parallel Multisection for Determination of the Eigenvalues of Symmetric Quindiagonal Matrices %J Information Processing Letters %V 14 %N 3 %D 1982 %P 117-118 %A R. H. Barlow %A D. J. Evans %A J. Shanehci %T Comparative study of the exploitation of different levels of parallelism on different parallel architectures %J Proceedings of the 1982 International Conference on Parallel Processing %D August 1982 %I IEEE %P 34-40 %K Cray-1, DAP, 4 processor TI 990/10 Loughborough U of Tech, UK Numerical algorithms %A R. H. Barlow %A D. J. Evans %A J. Shanehchi %T Performance Analysis of Algorithms on Asynchronous Parallel Processors %J Computer Physics Communications %V 26 %N 3 %D June 1982 %P 233-236 %K maeder biblio: parallel algorithms, parallel programming, %X Conference on Vector and Parallel Processor in Computational Science. %A D. T. Barnard %A D. B. Skillicorn %T Pipelining Tree Structured Algorithms on SIMD Architectures %J Information Processing Letters %X to appear %A D. T. Barnard %A D. B. Skillicorn %T Parallel Parsing on the Connection Machine %J Information Processing Letters %V 31 %N 3 %D 8th May 1989 %P 111-117 %A D. T. Barnard %A D. B. Skillicorn %T Parallel Parsing: A Status Report %R 90-267 %I Department of Computing and Information Science, Queen's University %D 1990 %A J. A. Barnden %T Nonsequentiality and Concrete Activity Phases in Discrete-Event Simulation Languages %J ACM Transactions on Programming Languages and Systems %V 3 %N 3 %D July 1981 %P 293-317 %K Discrete-event simulation, simulation languages, transition systems, simultaneous events, event scheduling, nonsequentiality, concurrency, determinacy, histories, guarded commands, parallel programs CR Categories: 4.22, 4.35, 56.29, 8.1 %A John A. Barnden %Z CS Dept., Indiana U. %T Simulation of an Array-Based Neural Net Model %J Frontiers of Massively Parallel Scientific Computation %R Conference Proc. 2478 %I NASA Goddard Space Flight Center %C Greenbelt, MD %D Sept. 1986 %D 1987 %P 59-68 %K computer science, neural networks, connectionism, representation theory, data structures, mental models, imagery, spatial analogues, MPP, %A G. H. Barnes %T Design and Validation of a Connection Network for Many-Processor Multiprocessor Systems %J Proceedings of the 1980 International Conference on Parallel Processing %I IEEE %D August 1980 %P 79-80 %K Interconnections %A George H. Barnes %A Richard M. Brown %A Maso Kato %A David J. Kuck %A Daniel L. Slotnick %A Richard A. Stokes %T The ILLIAC IV Computer %J IEEE Transactions on Computers %V C-17 %N 8 %D August 1968 %P 746-757 %K grequired91, array, computer structures, look-ahead, machine language, parallel processing, speed, thin-film memory, multiprocessors, Rmaeder biblio: parallel hardware and devices, %K architecture, ILLIAC-IV, SIMD, Rhighnam, %K rwa, %K ag, jlh, dp, JLb, %X This was the original paper on the ILLIAC IV when it was proposed as a 256 processing element machine, a follow on to the SOLOMON. It was a very ambitious design. %X Contains ILLIAC IV assembler (among other things). %X (JLH & DP) This is the original paper on the ILLIAC IV hardware; some aspects of the machine (especially the memory system) changed subsequently. A later pape, cited as Bourknight, et. al. (1972) provides a more accurate description of the real hardware. %X (J-LB) paper of historical significance. %A George H. Barnes %A Stephen F. Lundstrom %T Design and Validation of a Connection Network for Many-Processor Multiprocessor Systems %J Computer %I IEEE %V 14 %N 12 %D December 1981 %P 31-41 %X * Distributed control and circuit switching are the keys to fast access in the many-processor to many-memory-module connection network proposed for the Numerical Aerodynamic Simulator. Reproduced in the 1984 tutorial: \fI Interconnection Networks for parallel and distributed processing\fP by Wu and Feng. %A J. E. Barnes %T An Efficient N-Body Algorithm for a Fine-Grain Parallel Computer %B The Use of Supercomputers in Stellar Dynamics %I Springer-Verlag %C Berlin %D 1986 %E P. Hut %E S. McMillan %V 267 %K Contributions %P 175-180 %A J. G. P. Barnes %T Real Time Languages for Process Control %J Computer Journal %V 15 %N 1 %D January 1972 %P 15-17 %A J. G. P. Barnes %T An Overview of Ada %J Software Practice and Experience %V 10 %N 11 %D November 1980 %P 851-887 %A Josh Barnes %A Piet Hut %T A hierarchical O(n log n) force calculation algorithm %J Nature %V 324 %D December 1986 %P 446-449 %K parallel algorithms, %A Joshua E. Barnes %T A Modified Tree Code: Don't Laugh; It Runs %J Journal of Computational Physics %V 87 %D 1990 %P 161 %K n-body simulations, %A Harold L. Barnett %T Management of Computational Capability at the JVNC %J Proceeding Supercomputing '88: Technology Assessment, Industrial Supercomputer Outlooks, European Supercomputing Accomplishments, and Performance & Computations %I Third International Conference on Supercomputing (ICS '88) %C St. Petersberg, FL %V 2 %D 1988 %P 66-70 %A J. K. R. Barnett %T The Design of an Inter-task Communication Scheme %J Software Practice and Experience %V 10 %N 10 %D October 1980 %P 801-816 %A Jeffrey A. Barnett %T DSN - Distributed sensor networks: working papers %I USC/Information Sciences Institute %R ISI/WP-12 %D April 1979 %A Jeffrey A. Barnett %T How Much is Control Knowledge Worth?: A Primitive Example %I USC/Information Sciences Institute %D June 1982 %K Rdpsdis.bib Rsingh %X ISI Working Paper; very simple results, not developed much. %A M. Barnett %A C. Lengauer %T A Systolizing Compilation Scheme %I Department of Computer Sciences, The University of Texas at Austin %R TR-91-03 %D Jan. 1991 %A M. Barnett %A C. Lengauer %T Unimodularity and the Parallelization of Loops %J Parallel Processing Letters %V 2 %N 2 & 3 %D September 1992 %P 273-282 %A Michael Barnett %A Christian Lengauer %T A Systolizing Compilation Scheme: Abstract %J Proceedings of the 1991 International Conference on Parallel Processing %V II, Software %I CRC Press %C Boca Raton, FL %D August 1991 %P II-296--II-297 %K poster paper, %A Michael Barnett %A David G. Payne %A Robert van de Geijn %T Optimal Broadcasting in Mesh-Connected Architectures %R TR-91-38 %I University of Texas, Computer Science %D December 1991 %K parallel algorithms, communication, Touchstone Delta, iPSC/860 %K Distributed-memory, mesh-connected, broadcast, parallel processing, worm-hole routing. %O 13 pages; $1.50 %X Abstract: In this paper, we disprove the common assumption that the time for broadcasting in a mesh is at best proportional to the square root of the number of processors, at least in the presence of worm-hole routing. We present an optimal algorithm for broadcasting in mesh-connected distributed-memory architectures with worm-hole routing. By organizing the processing nodes in a logical spanning tree, the algorithm executes in time proportional to the logarithm of the number of nodes without inducing contention in the communication network. We restrict the number of nodes in each dimension of the processor mesh to be a power of two. Our method provides insight into how to avoid and/or reduce network contention on meshes for other communication operations. Experimental results on the Intel Touchstone Delta system are included. %A T. P. Barnwell, III %A S. Gaglio %A R. M. Price %T A multi-microprocessor architecture for digital signal processing %J Proceedings of the International Conference on Parallel Processing %C Bellaire, Michigan %D August 1978 %P 115-121 %K multiprocessor architectures and operating systems, special purpose architectures %K bsatya %A T. P. Barnwell, III %A S. Gaglio %A C. J. M. Hodges %T Efficient implementation of one and two dimensional digital signal processing algorithms on a multi-processor architecture %J IEEE Int. Conf. on Acoustics, Speech, and Signal Processing %C Washington, D.C. %D April 1979 %P 698-701 %K multiprocessor applications %K bsatya %A T. P. Barnwell, III %A C. J. M. Hodges %T Optimal implementation of signal flow graphs on synchronous multiprocessors %J Proceedings of the 1982 International Conference on Parallel Processing %D August 1982 %I IEEE %P 90-95 %K Georgia Tech Numerical algorithms %A T. P. Barnwell %A C. J. M. Hodges %T Optimal Implementation of DSP Algorithms on Synchronous Multiprocessors %B Algorithmically Specialized Parallel Computers %E Lawrence Snyder %E Leah H. Jamieson %E Dennis B. Gannon %E Howard Jay Siegel %I Academic Press %C Orlando, FL %D 1985 %P 119-128 %A Robert Baron %A Richard Rashid %A Ellen Siegel %A Avadis Tevanian %A Michael Young %T MACH-1: An Operating System Environment for Large-Scale Multiprocessor Applications %J IEEE Software %V %N %D July 1985 %K Unix, %A Robert Baron %A David Black %A William Bolosky %A Jonathan Chew %A David Golub %A Richard Rashid %A Avadis Tevanian %A Michael Young %T MACH Kernel Interface Manual %I Department of Computer Science, Carnegie Mellon University %C Pittsburgh, PA %D February 15, 1988 %A Robert Victor Baron %A Richard F. Rashid %A Ellen H. Siegal %A Avadis Tevanian, Jr. %A Michael Wayne Young %T MACH-1: A Multiprocessor-Oriented Operating System and Environment %B New Computing Environments: Parallel, Vector and Systolic %I SIAM %E Arthur Wouk %P 80-99 %D 1986 %A Robert Victor Baron %A David Black %A William Bolosky %A J. Chew %A David B. Golub %A Richard Rashid %A Avadis Tevanian, Jr. %A Michael Wayne Young %T MACH Kernel Interface Manual %I Carnegie-Mellon University Department of Computer Science %D October 1986 %A Uri Baron %A Bounthara Ing %A Michael Ratcliffe %A Philippe Robert %Z ECRC, West Germany %T A Distributed Architecture for the PEPSys Parallel Logic Programming System %J Proceedings of the 1988 International Conference on Parallel Processing %V I, Architecture %I Penn State %C University Park, Penn %D August 1988 %P 410-413 %K Logic Programming and Pipelined Systems, multi-cluster, cluster processor, load balancing, eight queens performance, %A Avron Barr %A Edward A. Feigenbaum, eds. %T The Handbook of Artificial Intelligence %I William Kaufmann, Inc. (USA) and Pitman %C London, England %V 2 %D 1982 %O xiv+409 pp. isbn 0 273 08540 9 (GB) %O treatment: practical, theoretical %D 1982 %K Rdpsdis.bib Rsingh %K artificial intelligence formal languages formal logic grammars text generation artificial intelligence ai research search computer problem solving techniques search space problem reduction minimax methods knowledge computer programs semantic networks production systems natural languages grammars parsing techniques spoken language %X The book is 1 of a 3 volume work on artificial intelligence, it contains five chapters, as well as an index and bibliography. The first chapter discusses the goals of ai research, the history of the field, and the current active areas of research. Chapters two and three cover the key concept of 'search', computer problem-solving techniques, search-space and problem reduction algorithms, heuristic search and minimax methods, computer implementations of search techniques, techniques for representing knowledge in computer programs, basic representation paradigms in ai, mathematical knowledge, semantic networks, production systems, frames, etc. Chapter four describes ai research on 'natural languages': grammars and parsing techniques that have been employed in ai programs, programs that translate from one language to another, methods for 'generating' text to express what the computer wants to say. Finally, chapter five discusses the design of programs that understand spoken language. %A Richard S. Barr %A Betty Hickman %T A New Parallel Network Simplex Algorithm and Implementation for Large Time-Critical Problems %R 89-CSE-37 %I Department of Computer Science and Engineering, Southern Methodist University %C Dallas, TX 75275-0122 %D 1989 %O $2.50 %A Richard S. Barr %A William Stripling %T A Parallel Mixed-Strategies Branch-and-Bound Approach to the Fixed Charge Transportation Problem %R 90-CSE-27 %I Department of Computer Science and Engineering, Southern Methodist University %C Dallas, TX 75275-0122 %D 1990 %O $2.00 %A Richard S. Barr %A Betty L. Hickman %T On Reporting the Speedup of Parallel Algorithms: A Survey of Issues and Experts %R 91-CSE-20 %I Department of Computer Science and Engineering, Southern Methodist University %C Dallas, TX 75275-0122 %D 1991 %O $1.75 %X Perhaps the most commonly used performance measure for implementations of parallel algorithms is {\it speedup}, a ratio of the serial to parallel solution time for a given problem. We probe the difficulties in using this statistic for computational reporting, including: definitional ambiguities, testing biases, machine influence, and the effects of tuning parameters. Some of these difficulties were explored further in a survey sent to leading computational mathematical programming researchers for their reactions and suggestions. A summary of the survey and proposals for conscientious reporting are presented. %A William J. Barr %T The Work Manager-A Full Featured Gateway System %J 6th International Conference on Distributed Computing Systems %I IEEE Computer Society %C Los Angeles, CA %D May 1986 %P 348-354 %A Arthur L. Barrett %T Process-construction for a parallel-sequential computer architecture %J Proceedings of the 1973 Sagamore Computer Conference %D August 1973 %I IEEE %P 179 %K ICPP1, PEPE %X This is only a summary. %A Chris Barrett %A Frank Bobrowicz %A Ralph G. Brickner %A Bradley A. Clark %A Rajan Gupta %A Ann H. Hayes %A Harold Tease %A Andrew B. White %T Supercomputing at the Los Alamos National Laboratory %J International Journal of Supercomputer Applications %V 5 %N 2 %D Summer 1991 %P 3-9 %A Luis Barriga %A Rassul Ayani %T Parallel Cache Simulation on Multiprocessor Workstations %J Proceedings of the 1993 International Conference on Parallel Processing %V I - Architecture %I CRC Press %C Boca Raton, FL %D August 1993 %P I-171--I-174 %K cache memory, %A H. Barringer %A R. Kuiper %T Hierarchical Development of Concurrent Systems in a Temporal Logic Framework %B Seminar on Concurrency %E S. D. Brookes %E A. W. Roscoe %E G. Winskel %S Lecture Notes on Computer Science %V 197 %I Springer-Verlag %C Berlin %D 1985 %P 35-61 %A Howard Barringer %T A Survey of Verification Techniques for Parallel Programs %I Springer-Verlag %S Lecture Notes in Computer Science %V 191 %C Berlin %D 1985 %$ 11.25 %K book, text, %K grecommended91, %K fpst, %X For the theoretical at heart. Gives insights into what is so hard about distributed and parallel processing. Compares many different approaches. %A Frank Barriuso %A Jim Kohn %A Suzanne LaCroix %A Steve Reinhardt %T Improvements to Nondedicated Perfomance of Autotasked Programs on Cray Y-MP Computer Systems %J 1990 Fall Proceedings Cray User Group Meeting %I CUG %C Washington DC %D Fall 1990 %P 295-300? %K performance, %A Andrew R. Barron %A Roger L. Barron %T Statistical Learning Networks: A Unifying View %J Symposium on the Interface: Statistics and Computing Science %D apr 21-23, 1988 %C Reston, Virginia %K simulated annealing, %A D. W. Barron %T Programming in Wonderland %J The Computer Bulletin %V 15 %P 153 %D April 1971 %X This is just a short, satiric story. First you laugh, then you cry. Useful as a reminder that we shouldn't put up with lousy tools. [VRP] %A I. Barron %A P. Cavill %A D. May %T Transputer does 5 or more MIPS even when not used in parallel %J Electronics %D 17 Nov. 1983 %P 109-115 %A L. A. Barroso %A M. Dubois %T Cache Coherence on a Slotted Ring %J Proceedings of the 1991 International Conference on Parallel Processing %V I, Architecture %I CRC Press %C Boca Raton, FL %D August 1991 %P I-230--I-237 %r CENG-91-03 %A J. Barry %A M. A. O. Bryant %A P. Polishuk %T Proceedings of the Papers Presented at the Eighth International Fibre Optic Communications and Local Area Networks Exposition in the USA %C Las Vegas, NV, USA %I Information Gatekeepers, Boston, MA, USA, p: xiii+366 %D 17-21 Sept. 1984 %K local area networks optical communication optical fibres optical links optical fibres optical links LANs optical cables military applications high speed LANs CATV applications factory applications telephone applications local distribution networks %X The following topics were dealt with: optical fibres; optical links; LANs; optical cables; military applications; high speed LANs; CATV applications; factory applications; telephone applications and local distribution networks %A I. Barsi %T The software environment of the cellular processor model %B Products of Automata %E W. Brauer %E G. Rosenberg %E A. Solomaa %D 1986 %I Springer-Verlag %C Berlin %P 97-109 %K Cellular Systems %A Eric Barszcz %A L. S. Howard %T Static Data Flow Simulation Study at Ames Research Center %J Proceedings of the 1987 International Conference on Parallel Processing %I Penn State %C University Park, Penn. %D August 1987 %P 427-430 %K Numerical Algorithms %A Eric Barszcz %T Intercube Communication on Intel Hypercubes %J Proc. 1991 Annual Users Conference %I Intel Supercomputer Users' Group %C Dallas, TX %D 1991 %P 405-429 %A Eric Barszcz %T New Loop Control Structures for Static Data Flow %E John A. Sharp %B Data Flow Computing: Theory and Practice %I Ablex Publishing %C Norwood, NJ %D 1992 %P 389-403 %A Ben Zion Barta %Z U. Ill. %T PACOL: A Parallel Control Language %J SIGPLAN Notices %V 10 %N 3 %P 44-53 %D March 1975 %K parallel programming, parallel program models, modular processors, %K proc. conf on programming languages and compilers for parallel and vector computers %X Another PL/1 based language. Trapezoid integration example. %A P. H. Bartels %A R. Manner %A R. L. Shoemaker %A S. Paplanus %A A. Graham %T Computer Configurations for the Processing of Diagnostic Imagery in Histopathology %E L. Uhr %E K. Preston, Jr. %E S. Levialdi %E M. J. B. Duff %B Evaluation of Multicomputers for Image Processing %I Academic Press %C New York %D 1986 %P 239-278 %K applications and techniques, %A Barth %A Braunl %A Sembach %T Parallaxis User Manual %R Computer Science Report, no. 3/90 %I Universitaet Stuttgart %D March 1990 %K Parallel Architectures, simulators %X In English. %A Barth %T Entwicklung eines Compilers fuer die parallele Programmiersprache Parallaxis %R Studienarbeit Nr. 835 %I Universitaet Stuttgart %D March 1990 %K Parallel Architectures, simulators %A Barth %T Entwicklung eines Compilers fuer Parallaxis mit dynamischen Verbindungsstrukturen %R Diplomarbeit Nr. 705 %I Universitaet Stuttgart %D Nov. 1990 %K Parallel Architectures, simulators %A Barth %A Braunl %A Sembach %T Parallaxis Version 2 User Manual %R Computer Science Report, no. 2/91 %I Universitaet Stuttgart %D Feb. 1991 %K Parallel Architectures, simulators %X In English. %A J. F. Bartlett %T A 'Non-stop' Operating System %J 11th Hawaii Conf. on System Sciences %P 103-117 %D 1978 %K bhibbard, tandem, %A Joel Bartlett %T A NonStop (TM) Kernel %J Proceedings of the 8th Symposium on Operating Systems Principles, Operating Systems Review %V 15 %N 5 %D December 1981 %P 22-29 %K Message passing, process pairs, fault-tolerant systems, %A Joel F. Bartlett %T The Tandem 16: a "nonstop" operating system %E Daniel P. Siewiorek %E C. Gordon Bell %E Allen Newell %B Computer Structures: Principles and Examples %I McGraw-Hill %D 1982 %P 480-485 %K bmiya, %X This is Chapter 29. %A P. D. Bartoli %A H. V. Bertine %A F. M. Burg %A D. E. Carlson %A K. D. Ho %A L. M. Smith %A T. B. Steel, Jr. %A F. E. Weber %A C. E. Young %T The X-series recommendations for public data networks (1981-4) %J J. Telecommun. Networks (USA) %V 3 %N 3 %P 159-193 %D Fall 1984 %O 0 REFS Treatment APPLICATIONS, GENERAL OR REVIEW %K computer networks data communication systems X series recommendations public data networks standardization data communications packet switching Open Systems Interconnection ISDN message handling SG VII %X The start of the 1980s have witnessed significant advances in the standardization of important elements of data communications. The International Telegraph and Telephone Consultative Committee (CCITT), through the work of Study Group (SG) VII which is responsible for developing Recommendations for Data Communication Networks, has advanced existing work to a more mature level (e.g. in the areas of packet-switching and Open Systems Interconnection (OSI)); and undertaken work in new areas (e.g. Integrated Services Digital Network (ISDN) and message handling). The authors review the accomplishments of SG VII during the just completed 1981-4 study period. %A E. Barton %A J. Cownie %A M. McLaren %T Message passing on the Meiko CS-2 %J Parallel Computing %V 20 %N 4 %D March 1994 %P 497-508? %A Eric Barton %Z Meiko, UK %T Meiko's Computing Surface %J Computer Graphics '86 %I Online Publications %C Pinner, UK %D 1986 %X How the Meiko Computing Surface came to be, how it can be used, and how it is organized. %A Eric Barton %Z Meiko Ltd, UK %T Data Concurrency on the Meiko Computing Surface %J Parallel Processing for Computer Vision and Display, International Conference %I University of Leeds, UK %D 12-15 January, 1988 %X The product, the uses, some problems, some solutions. %A John Barton %T Software Development on the NAS CRAY-2 %J Fall 1986 Proceedings Cray User Group Meeting %I CUG %C Albuquerque, NM %D Fall 1986 %P 24-27? %A John Barton %T Early Experiences with the NAS Cray-2 %J Proceedings CUG %I Cray User Group %D Spring 1986 %P 21-24 %A John Barton %T Early Experience with the NAS Y-MP %J 1988 Fall Proceedings Cray User Group Meeting %I CUG %C Washington DC %D Fall 1988 %P 116-122? %K performance, %A John T. Barton %T Early Experience with the NAS Y-MP %J Cray User Group 1988 Fall Proceedings %C Minneapolis, MN %D 1988 %P 116-122 %K 22st Meeting, performance, NAS kernels, %A M. Barton %A N. Edwards %T Occam in a Reconfigurable Local Area Network %J Proc. of the IFIP Conf. on Distributed Processing %C Amsterdam %D Oct. 1987 %P 295-304 %K operating system support for reconfiguring distributed computations: process migration and transparent re-connections between communicating processes %A M. Barton %A E. Castro-Leon %A E. Kushner %T "The ProSolver Application Software: Large Scale Solvers for the Intel Supercomputers" %J Proc. 1991 Annual Users Conference %I Intel Supercomputer Users' Group %C Dallas, TX %D 1991 %P 209-218 %A M.L. Barton %A G.R. Withers %Z Intel Scientific %T Computing Performance as a Function of the Speed, Quantity, and Cost of the Processors %J Proc. Supercomputing '89 %I ACM %C Reno, NV %D November 1989 %P 759-764 %K Benchmarking & Performance Measurements %X Bordering on marketing benchmarking. %A Michael L. Barton %A Edward J. Kushner %T Porting the ABAQUS Structural Analysis Code to Run on the iPSC/2 %J Proceedings of the Fifth Distributed Memory Computing Conference %V I, Applications %I IEEE %C Charleston, SC %D April 1990 %P 545-548 %K structural analysis 5th DMCC, %A Chaitanya K. Baru %A Arun K. Thakore %A Stanley Y. W. Su %T Matrix Multiplication on a Multicomputer System With Switchable Main Memory Modules %J Problems in Designing Supercomputers: Technologies and Devices SCS 85, First International Conference on Supercomputing Systems %I IEEE Computer Society %P 650-659 %K Algorithms and Architectures: Mapping Application Algorithms Onto Best Architectures %A Chaitanya K. Baru %A Kang G. Shin %A P. Ramanthan %T Diagnosis of Processors with Byzantine Faults in a Distributed Computing System %I Univ. of Michigan %D ? %A H. Barz %T The Power of Synchronization Mechanisms %J SIAM Journal on Computing %V 13 %N 4 %D Nov. 1984 %P 726- %K Concurrency Control, Mechanism Evaluation, %A N. Bashir %A M. Crovella %A G. DeTitta %A F. Han %A H. Hauptman %A J. Horvath %A H. King %A D. Langs %A R. Miller %A T. Sabin %A P. Thuman %A D. Velmurugan %Z U. Buffalo %T Parallel Solutions to the Phase Problem in X-Ray Crystallography %J Proceedings of the Fifth Distributed Memory Computing Conference %V I, Applications %I IEEE %C Charleston, SC %D April 1990 %P 513-521 %K Other Scientific Applications 5th DMCC, %A Victor R. Basili %A John C. Knight %T A Language Design for Vector Machines %J SIGPLAN Notices %V 10 %N 3 %P 39-43 %D March 1975 %K bhibbard %K programming vector processing, high level language, scientific programming, SL/1, STAR-100, %K proc. conf on programming languages and compilers for parallel and vector computers %A J-L. Basille %A S. Castan %A M. Al Rozz %T Parallel Architectures adapted to Image Processing, and their Limits %E M. J. B. Duff %B Computing Structures for Image Processing %I Academic Press %D 1983 %P 31-42 %A J. L. Basille %A S. Castan %A J. Y. Latil %T Systeme Multiprocessor Adapte au Traitement d'Images %B Languages and Architectures for Image Processing %E M. J. B. Duff %E S. Levialdi %I Academic Press %C New York, NY %D 1981 %P 205-213 %K SY.MP.A.T.I. %K Rhighnam, algorithm, architecture, SIMD, SYMPATI %X Don't worry this paper is in English! But French editions of this book and paper apparently exist. %A J. L. Basille %A S. Castan %T Multilevel Architectures for Image Processing %B Architectures and Algorithms For Digital Image Processing %S Proceedings of the Society of Photo-optical Instrumentation Engineers %V 596 %E M. J. B. Duff %E H. J. Siegel %E F. J. Corbett %D 1986 %P 46-53 %K AI06 H03 %A Jean-Luc Basille %A Serge Castan %A Bernard Delres %A Jean-Yves Latil %T Typical Propagation Algorithm on the Line-Processor SY.MP.A.T.I.: The Region Labelling %B Multicomputers and Image Processing %E Kendall Preston, Jr. %E Leonard Uhr %I Academic Press %D 1982 %P 99-110 %K Rhighnam, architecture, SIMD, SYMPATI, %A G. Baskaran %A Yaotian Fu %A P. W. Anderson %T On the Statistical Mechanics of the Traveling Salesman Problem %J Journal of Statistical Physics %V 45 %N 1/2 %D oct 1986 %P 1-25 %K simulated annealing, TSP, %A F. Baskett %A A. J. Smith %T Interference in multiprocessor computer systems with interleaved memory %J Comm. ACM %V 19 %N 6 %D June 1976 %P 327-334 %K performance %K bsatya %A F. Baskett %A T. W. Keller %T An Evaluation of the Cray-1 Computer %E D. Kuck %E D. Lawrie %E A. Sameh %B High Speed Computer and Algorithm Organization %I Academic Press %C New York %P 71-84 %D 1977 %K maeder biblio: parallel hardware and devices, %A F. Baskett %A J. H. Howard %A J. Monague %T Task Communication in DEMOS %J Proceedings of the 6th Symposium on Operating Systems Principles %I ACM %D November 1977 %P 2-7 %X This paper is reproduced in Kuhn and Padua's (1981, IEEE) survey "Tutorial on Parallel Processing." %A Forest Baskett %A John L. Hennessy %T Small Shared-Memory Multiprocessors %J Science %V 231 %N 4741 %D February 28, 1986 %P 963-966 %A Forest Baskett %A M. M. Gilbert %T Interactive Visual Supercomputing %J Proceeding Supercomputing '88: Technology Assessment, Industrial Supercomputer Outlooks, European Supercomputing Accomplishments, and Performance & Computations %I Third International Conference on Supercomputing (ICS '88) %C St. Petersberg, FL %V 2 %D 1988 %P 216-220 %A Forest Baskett %A Tom Jermoluk %A Doug Soloman %T The 4D-MP Graphics Supercomputer: Computing + Graphics = 40 MIPS + 40 MFLOPS and 100,000 Lighted Polygons Per Second %J Compcon '88 %I IEEE %C San Francisco, CA. %D February -March, 1988 %P 468-471 %A A. B. Baskin %A Stephen C. Y. Lu %A Robert E. Stepp %T Cooperative Decision Making Using Multiple Knowledge Sources %I preliminary proposal to USA CERL %D December 20, 1985 %K ai, distributed problem solving, distributed problem solving %A H. B. Baskin %A B. R. Borgerson %A R. Roberts %T PRIME A Modular Architecture for Terminal-Oriented Systems %J Proceedings AFIPS Spring Joint Computer Conference %D 1972 %P 431-437 %K btartar %A Mark E. Bassett %T An Implementation of Multigrid on a Hypercube Multiprocessor %B Hypercube Multiprocessors 1986 %I siam %E Michael T. Heath %C Philadelphia, PA %D 1986 %K Numerical Computations, Ametek, %P 211-220 %A M.A. Bassionuni %A Amar Mukherjee %T Supercomputer Algorithms for Data Transmission and Encoding %J Second International Conference on Supercomputing, Proceedings Supercomputing '87, Industrial Supercomputer Applications and Computations %V II %I International Supercomputing Institute, Inc. %D 1987 %P 371-379 %A M. A. Bassiouni %A N. Ranganathan %A Amar Mukherjee %Z F. Central FL. %T A Scheme for Data Compression in Supercomputers %J Proceedings Supercomputing'88 %I IEEE and ACM SIGARCH %C Orlando, FL %D November 1988 %P 272-278 %K mass storage, MSS, in hardware, parallel data compression, %X Does not deal with parallel processing directly, but it does help supercomputers. %A Donna A. Bassolino %A Fumio Hirata %A Douglas B. Kitchen %A Dorothea Kominos %A Arthur Pardi %A Ronald M. Levy %T Determination of Protein Structures in Solution using NMR Data and Impact %J International Journal of Supercomputer Applications %V 2 %N 2 %D Summer 1988 %P 41-61 %A F. B. Bastani %A I. L. Yen %A A. Moitra %A S. S. Iyengar %T Impact of Parallel Processing on Software Quality %J Problems in Designing Supercomputers: Technologies and Devices SCS 85, First International Conference on Supercomputing Systems %I IEEE Computer Society %P 369-376 %K Program Design and Analysis %A Farokh Bastani %A Wael Hilal %A S. Sitharama Iyengar %T Efficient Abstract Data Components for Distributed and Parallel Systems %J Computer %D October 1987 %V 20 %N 10 %P 33-44 %A P. Bastian %A J. Burmeister %A G. Horton %T Implementation of a parallel multi-grid method for parabolic partial partial differential equations %E Wolfgang Hackbusch %B Parallel Algorithms for Partial Differential Equations %S Numerical Fluid Mechanics %V 31 %I Friedr. Vieweg and Sohn %C Braunschweig %D 1991 %P 18-27 %K Proceedings of the Sixth GAMM-Seminar, Kiel, Jan. 1990. %A A. Basu %T A Classification of Parallel Processing Systems %J Proc. IEEE Int. Conference on Computer Design %C Port Chester, NY %D 1984 %P 222 %K taxonomy, survey, %A Anirban Basu %T A Transputer Based Adaptable Pipeline %J Second International Conference on Supercomputing, Proceedings Supercomputing '87, Industrial Systems, Supercomputer Projects and Prototype Architectures %V I %I International Supercomputing Institute, Inc. %D 1987 %P 450-459 %A M. Bataille %T The GAMMA 60 - The Computer that was Ahead of Its Time %J Computer Architecture News (SIGARCH) %I ACM %V 1 %N 2 %D April 1972 %P 10-15 %X This paper is a reprint from Honeywell Computer Journal v5, n3, p 99-105, (1971). %A S. Batainch %A T. Hsiung %A T. G. Robertazzi %T Closed Form Solutions for Bus and Tree Networks of Processors Load Sharing A Divisible Job %J Proceedings of the 1993 International Conference on Parallel Processing %V I - Architecture %I CRC Press %C Boca Raton, FL %D August 1993 %P I-290--I-293 %K routing algorithms and ring, bus structures, %A Abdulla Bataineh %A Fusun Ozguner %T Parallel-and-Vector Implementation of the Event-Driven Logic Simulation Algorithm on the Cray Y-MP Supercomputer %J Proceedings Supercomputing'92 %I IEEE %C Minn., MN %D November 1992 %P 444-452 %K combinatorial and symbolic algorithms, %T On the Mapping of Program Graphs Onto Pipeline Nets %P II-133--II-136 %A Camille Batarekh %Z U. Vt. %J Proceedings of the 1990 International Conference on Parallel Processing %V II, Software %I Penn State U. Press %C University Park, Penn %D August 1990 %K Mapping, Partitioning, and Program Visualization, %A K. Batcher %T STARAN series E %J Proceedings of the 1977 International Conference on Parallel Processing %D August 1977 %I IEEE %P 140-143 %K Associative processors %K Rhighnam, architecture, %A K. E. Batcher %T STARAN Parallel Processor System Hardware %J Proceedings AFIPS National Computer Conference %D 1974 %P 405-410 %K grecommended91 %K ag, %K btartar, %K Rhighnam, associative, %K parallel architecture, array processor, parallel I/O, SIMD, pario bib %X This paper is reproduced in Kuhn and Padua's (1981, IEEE) survey "Tutorial on Parallel Processing." %X The STARAN is an array processor that uses Multi-Dimensional-Access (MDA) memories and permutation networks to access data in bit slices in a variety of ways, with high-speed I/O capabilities. Its router (called the {\em flip} network) could permute data among the array processors, or between the array processors and external devices, including disks, video input, and displays. %X Literature search provides: 00446338 E.I. Monthly No: EI7504022393 E.I. Yearly No: EI75013769 Title: Staran Parallel Processor System Hardware. Author: Batcher, Kenneth E. Corporate Source: Goodyear Aerosp Corp, Akron, Ohio Source: AFIPS Conference Proceedings v 43, 1974, for Meet, Chicago, Ill, May 6-10 1974, p 405-410 Publication Year: 1974 CODEN: AFPGBT ISSN: 0095-6880 Language: ENGLISH Journal Announcement: 7504 Abstract: The parallel processing capability of STARAN resides in n array modules (n LESS THAN EQUIVALENT TO 32). Each array module contains 256 small processing elements (PE's). They communicate with a multi-dimensional access (MDA) memory through a "flip" network, which can permute a set of operands to allow inter-PE communication. This paper deals with the MDA memories, the STARAN array modules, the other elements of STARAN, and the results of certain application studies. 4 refs. Descriptors: *Computer Systems, Digital--*Parallel Processing Identifiers: Staran Processors Classification Codes: 722 (Computer Hardware) 72 (Computers & Data Processing) %A K. E. Batcher %T Multi-Dimensional Access Solid State Memory %R US Patent 3800289 %D March 1974 %A K. E. Batcher %T Elementary Functions in the MPP PE %R GER-16627 %I Goodyear Aerospace %D December 1978 %K Massively Parallel Processor, bmpp, %A K. E. Batcher %T Nearest Neighbor Binary Rotation in the MPP %R GER-16639 %I Goodyear Aerospace %D January 1979 %K Massively Parallel Processor, bmpp, %A K. E. Batcher %A E. E. Eddey %A R. O. Faiss %A P. A. Gilmore %T SAR Processing on the MPP %R NASA-CR-166726 (N82-11801/9) %D August 1981 %K Massively Parallel Processor, bmpp, %A K. E. Batcher %T The Massively Parallel Processor (MPP) %J Digest of Papers, Compcon85 Thirtieth IEEE Computer society International Conference %I IEEE Computer Society %D February 25-28, 1985 %P 21-24 %A Ken Batcher %T The Architecture of Tomorrow's Massively Parallel Computer %J Frontiers of Massively Parallel Scientific Computation %R Conference Proc. 2478 %I NASA Goddard Space Flight Center %C Greenbelt, MD %D Sept. 1986 %D 1987 %P 151-157 %K MPP, %X After dinner talk. Mostly a rehash of history leading up to the MPP. %A Ken Batcher, moderator %T How to Interconnection a Million Processors in a General Purpose Parallel Machine %J Proc. Frontiers '92: Fourth Symp. on Massively Parallel Computation %C McLean, VA %I IEEE %D October 1992 %P 300 %A Ken E. Batcher %T MPP: a supersystem for satellite image processing %J AFIPS Proc. of the NCC %V 51 %D May 1982 %P 185-191 %K massively parallel processor, %K bmiya, %A Kenneth Batcher %T MPP \(em A Massively Parallel Processor %J Proceedings of the 1979 International Conference on Parallel Processing %I IEEE %D August 1979 %P 249 %K Array Processors, multiprocessors, parallel processing, maeder biblio: parallel hardware and devices, %X Summary only. %A Kenneth E. Batcher %T Sorting Networks and Their Applications %J Conference Proceedings of the 1968 Spring Joint Computer Conference %V 32 %P 307-314 %I AFIPS Press %D May 1968 %K bhibbard %K Rhighnam, algorithm, analysis, bitonic-sort, mesh, %X Reproduced in the 1984 tutorial: \fIInterconnection Network for parallel and distributed processing\fP by Wu and Feng. %A Kenneth E. Batcher %T STARAN/RADCAP hardware architecture %J Proceedings of the 1973 Sagamore Computer Conference %D August 1973 %I IEEE %P 147-152 %K Rhighnam, ICPP1, %O 621.3819544 S12p %A Kenneth E. Batcher %T The Multi-Dimensional Access Memory in STARAN %J Proceedings of the Sagamore Computer Conference (1975) %D August 1975 %I IEEE %P 167 %K Memory organizations %X Summary only. A more detailed paper was published in Feb. 1977 IEEE TOC. %A Kenneth E. Batcher %T The Flip Network in STARAN %J Proceedings of the 1976 International Conference on Parallel Processing %C Long Beach, California %D August 1976 %I IEEE %P 65-71 %r GER-16344 %K System architecture and organization, rwa, %K Rhighnam, associative, %X Reproduced in the 1984 tutorial: \fIInterconnection Network for parallel and distributed processing\fP by Wu and Feng. %A Kenneth E. Batcher %T The Multidimensional Access Memory in STARAN %J IEEE Transactions on Computers %V C-26 %P 174-177 %D February 1977 %K bhibbard %K Associative processoring, corner-turning memories, multidimensional access (MDA) memories, parallel processing, solid-state memories, correspondence, special issue on parallel processors and processing %K Rhighnam, architecture, %X A less detailed summary was published in ICPP75. %A Kenneth E. Batcher %T The Massively Parallel Processor System %J Proceedings of the 2nd AIAA Computers in Aerospace Conference %D October 1979 %P 93-97 %K MPP, bmpp, %A Kenneth E. Batcher %T Architecture of a Massively Parallel Processor %J Proceedings 7th Annual Symposium on Computer Architecture %D May 1980 %C La Baule, France %P 168-173 %K btartar %K maeder biblio: parallel hardware and devices, parallel architecture, MPP, %A Kenneth E. Batcher %Z Goodyear Aerospace %T Design of a Massively Parallel Processor %J IEEE Transactions on Computers %V C-29 %N 9 %D September 1980 %P 836-840 %K grecommended, MPP, bmpp, multiprocessors, parallel processing, existing, %X This paper is reproduced in Kuhn and Padua's (1981, IEEE) survey "Tutorial on Parallel Processing." Also reprinted in the text compiled by Kai Hwang: "Supercomputers: Design and Application," IEEE, 1984. Reproduced in Dharma P. Agrawal's (ed.) "Advanced Computer Architecture," IEEE, 1986, pp. 25-29. %X 16384 bit-serial PEs connected in a square array with strictly nearest-neighbor connections, with bit-serial processing. On eight-bit integer data, gets 6553 million additions and 1861 million multiplications pers second. On 32-bit floating-point data, addition can occur at 430 MOPS and multiplication at 216 MOPS. Considered using fancier interconnection networks, but rejected them because of slow-downs that would be caused by the required wire runs. %A Kenneth E. Batcher %T Bit-Serial Parallel Processing Systems %J IEEE Transactions on Computers %V C-31 %N 5 %D May 1982 %P 377-384 %K Airborne processors, bit-serial processors, custom VLSI chips, image processing, multidimensional access, parallel processors, radar processing, STARAN, MPP, Special issue on supersystems %K Rhighnam, analysis, architecture, associative, SIMD, %X Paper has highest VAX transfer rate I've ever seen (6 MB/s on the UNIBUS, I don't think they meant SBI). Some one was listening to their DEC salesperson. Reproduced in "Computer Architecture," D. D. Gajski, V. M. Milutinovic, H. J. Siegel, and B. P. Furht, eds., IEEE, 1987, pp. 379-386. %A Kenneth E. Batcher %T The MPP Staging Memory %J Proceedings of the 1984 International Conference on Parallel Processing %I IEEE %D August 1984 %P 496-498 %K memory systems %X The MPP staging memory is probably the most important new component to SIMD type architectures recently implemented. %A Kenneth E. Batcher %T The Massively Parallel Processor System Overview %E J. L. Potter %B The Massively Parallel Processor %I MIT Press %C Cambridge, MA %D 1985 %P 142-149 %K MPP, Hardware, %A Kenneth E. Batcher %T Array Unit %E J. L. Potter %B The Massively Parallel Processor %I MIT Press %C Cambridge, MA %D 1985 %P 150-169 %K MPP, Hardware, %A Kenneth E. Batcher %T Array Control Unit %E J. L. Potter %B The Massively Parallel Processor %I MIT Press %C Cambridge, MA %D 1985 %P 170-190 %K MPP, Hardware, %A Kenneth E. Batcher %T Staging Memory %E J. L. Potter %B The Massively Parallel Processor %I MIT Press %C Cambridge, MA %D 1985 %P 191-204 %K MPP, Hardware, %A Kenneth E. Batcher %T MPP System Software %E J. L. Potter %B The Massively Parallel Processor %I MIT Press %C Cambridge, MA %D 1985 %P 261-275 %K Software, SIMD control, bit-slice programming, MPP assembler, %A Kenneth E. Batcher %T MPP: A High-Speed Image Processor %I Academic Press %C Orlando, FL %D 1985 %B Algorithmically Specialized Parallel Computers %E Lawrence Snyder %E Leah H. Jamieson %E Dennis B. Gannon %E Howard Jay Siegel %P 59-68 %K Massively parallel processor, architecture, %X Yet another survey of the MPP. %A Kenneth E. Batcher %Z Kent State %T On Bitonic Sorting Networks %J Proceedings of the 1990 International Conference on Parallel Processing %V I, Architecture %I Penn State U. Press %C University Park, Penn %D August 1990 %P I-376--I-379 %K Generalized Interconnection Networks, %r CS-9001-34 %X ABSTRACT: A $(kn)$-key bitonic sorting network can be build from $n$ $k$-key sorters and $k$ $n$-key sorters; costs and delays of networks using different values of $n$ are examined. For merging one need only sort ascending-descending sequences of keys instead of more general bitonic sequences; the construction of networks to sort ascending-descending sequences of any size is shown. %A Kenneth E. Batcher %T Decomposition of Perfect Shuffle Networks %J Proceedings of the 1991 International Conference on Parallel Processing %V I, Architecture %I CRC Press %C Boca Raton, FL %D August 1991 %P I-255--I-262 %K permuters, perfect shuffle, decomposition, massive parallelism, shuffle-exchange, interconnection networks, %A Kenneth E. Batcher %T Low-Cost Flexible Simulation with the Static Perfect Shuffle Network %R CS-9202-02 %I Dept. of Mathematics and Computer Science, Kent State University %C Kent, Ohio 44242 %D 1992 %X ABSTRACT: The static perfect shuffle network is based on Stone's perfect shuffle network; the two-by-two switches are removed and replaced by exchange links between processors. The network could be used in a low-cost flexible simulator for other networks such as multistage cube networks and hypercubes. %A Kenneth E. Batcher %T Low-cost Flexible Simulation with the Static Perfect Shuffle Network %J Proc. Frontiers '92: Fourth Symp. on Massively Parallel Computation %C McLean, VA %I IEEE %D October 1992 %P 434-441 %A J. A. Bate %A Jon C. Muzio %T Three Cell Structures for Ternary Cellular Arrays %J IEEE Transactions on Computers %V C-26 %N 12 %D December 1977 %P 1191-1202 %K Cellular arrays, combinational switching functions, ternary full adder, ternary logic, universal arrays, Special section on microprogramming %A P. Bates %A J. Wileden %A V. Lesser %T A Debugging Tool For Distributed Systems %I COINS Dept, University of Mass. %C Amherst %R TR 82 3 %D 12/31/1982 %A P. Bates %A J. Wileden %T An Approach To High-Level Debugging Of Distributed Systems %I COINS Dept, University of Mass. %C Amherst %R TR 82 3 %D 12/31/1982 %A P. Bates %A J. Wileden %T High-Level Debugging of Distributed Systems: The Behavioral Abstract Approach %I COINS Dept, University of Mass. %C Amherst %R TR 83 2 %D 12/31/1983 %A P. Bates %A J. C. Wileden %T An approach to high-level debugging of distributed systems %B SIGPLAN Not. (USA), ACM SIGSOFT/SIGPLAN Software Engineering Symposium on High-Level Debugging %V 18 %N 8 %C Pacific Grove, CA, USA %P 107-111 %O 6 REFS Treatment PRACTICAL %D 20-23 March 1983 %K distributed processing program debugging high level debugging distributed systems behavioral abstraction Event Definition Language %X The authors consider the Behavioral Abstraction (BA) approach to high-level debugging of distributed systems. They discuss behavioral abstraction and the Event Definition Language that is the basis for a debugging tool implementing this approach. They address one of the fundamental issues arising in actually providing debugging aid through the BA approach, that of recognizing the occurrence of abstracted behaviors. They conclude the paper with an assessment of present status and outstanding problems %A P. Bates %T Debugging Heterogeneous Distributed Systems Using Event-Based Models of Behavior %J Proc. of the ACM Workshop on Parallel and Distributed Debugging ACM SIGPLAN Notices %V 24 %N 1 %P 11-22 %D January 1989 %d May 5-6, 1988 %C Madison, Wisconsin %A Peter Bates %T Distributed Debugging Tools for Heterogeneous Distributed Systems %R TR 87 2 %I COINS Dept, University of Mass. %C Amherst %D 12/31/1987 %A Peter Bates %Z U. Mass. %T Distributed Debugging Tools for Heterogeneous Systems %J 8th International Conference on Distributed Computing Systems %I IEEE Computer Society %C San Jose, CA %D June 1988 %P 308-315 %K debugging, monitoring, event based behavioral abstraction (EBBA), simple cooperative debugging, Gutenberg system, %X bates@cs.umass.edu %A Peter C. Bates %T Debugging Programs in a Distributed System Environment %R TR 86 X %I COINS Dept, University of Mass. %C Amherst %D 12/31/1986 %K Ph.D. Thesis %X Ph.D. February, 1986 %A Peter C. Bates %T Shuffle Automata: A Formal Model for Behavior Recognition in Distributed Systems %I COINS Dept, University of Mass. %C Amherst %R TR 87 2 %D 12/31/1987 %A Peter C. Bates %A Jack C. Wileden %A Victor R. Lesser %T A language to support debugging in distributed system %R Technical Report 81-7 %I Department of Computer and Information Science, University of Massachusetts %C Amherst, Massachusetts %D April 1981 %K Rdpsdis.bib Rsingh %A Peter C. Bates %A Jack C. Wileden %T EDL: A basis for distributed system debugging tools %J Proceedings of the Fifteenth Hawaii International Conference on System Science %C Hawaii %D January 1982 %P 86-93 %A Peter C. Bates %A Jack C. Wileden %Z U. Mass. %T High-Level Debugging of Distributed Systems: The Behavioral Abstraction Approach %J Journal of Systems and Software %V 3 %N 4 %D December 1983 %P 255-264 %K EDL, event definition language, %A D. J. Batey %A J. A. Padget %T Towards a Virtual Multicomputer %B Proceedings Workshop on Heterogeneous Processing WHP'93 %I IEEE %C Los Alamitos, CA %D April 1993 %P 71-76? %K tools/systems, %A Ramachendra P. Batni %A Charles R. Kime %T A Module-level Testing Approach for Combinational Networks %J IEEE Transactions on Computers %V C-25 %N 6 %D June 1976 %P 594-604 %K B-transformation, combinational networks, effective blocking technique, fault detection tests, module-level testing, Special issue on fault tolerant computing %A R. K. Batra %A D. Georgakopoulos %A M. Rusinkiewicz %T A Decentralized Deadlock-Free Concurrency Control Method for Multidatabase Transactions %J 12th International Conference on Distributed Computing Systems %I IEEE %C Yokohama, Japan %D June 1992 %P 72-80? %K Transaction Models %A C. A. Batterman %T A Distributed Facilities Management System %J Computer Software and Applications Conference (COMPSAC79) %I IEEE %D November 1979 %P 553-557 %K distributed systems %A Roberto Battiti %Z Caltech %T Collective Stereopsis on the Hypercube %J The 3rd Conference on Hypercube Concurrent Computers and Applications %V II, Applications %I ACM %C Pasadena, CA %D January 1988 %P 1000-1006 %r cccp-583 %K applications in biology, robotics, and vision, CrOS III, neural network, correspondence of random points, %A Roberto Battiti %T Surface Reconstruction and Discontinuity Detection: A Fast Hierarchical Approach on a Two-Dimensional Mesh %J Proceedings of the Fifth Distributed Memory Computing Conference %V I, Applications %I IEEE %C Charleston, SC %D April 1990 %P 184-193 %K Computer Vision, DMCC5, %A Roberto Battiti %T An Adaptive Multiscale Scheme for Real-Time Motion Field Estimation %J Proceedings of the Fifth Distributed Memory Computing Conference %V I, Applications %I IEEE %C Charleston, SC %D April 1990 %P 194-203 %K Computer Vision, DMCC5, %A Christianne Louise Baucom %T Reduced Systems and the Preconditions Conjugate Gradient Method on a Multiprocessor %R CSRD Rpt. No. 807, UILU-ENG-88-8008 %I Ctr. for Supercomputing Res. and Develop., U. Ill. %C Urbana, Ill. %D November 1988 %K algorithm, applications, masters thesis, %A G. Baudet %T Iterative Methods for Asynchronous Multiprocessors %E D. Kuck %E D. Lawrie %E A. Sameh %B High Speed Computer and Algorithm Organization %I Academic Press %C New York %P 309-310 %D 1977 %K Ricase2, %K asynchronous chaotic relaxation, %A Gerard Baudet %A David Stevenson %T Optimal Sorting Algorithms for Parallel Computers %J IEEE Transactions on Computers %V C-27 %N 1 %D January 1978 %P 84-87 %K Comparison/exchange, optimal speed-up ration, parallel algorithms, parallel computers, sorting algorithms, Correspondence %K Rhighnam, theory %A Gerard M. Baudet %T Asynchronous iterative methods for multiprocessors %J Journal of the ACM %V 25 %N 2 %D April 1978 %P 226-244 %K Chaotic relaxation multiprocessor applications %K bsatya %A Gerard M. Baudet %T The Design and Analysis of Algorithms for Asynchronous Multiprocessors %R CMU-CS-78-116, Ph.D. thesis %C Carnegie-Mellon University, Pittsburgh, PA %D April 1978 %K Chaotic relaxation %K bhibbard %A Gerard M. Baudet %A R. P. Brent %A H. T. Kung %T Parallel Execution of a Sequence of Tasks on an Asynchronous Multiprocessor %J Australian Computing Journal %V 12 %N 3 %D August 1978 %P 105-112 %K parallel algorithms, Maeder biblio: concepts, parallel programming, concurrency and synchronisation, %X Difficult to pin this reference down. Encountered more than once with different information. Don't have access to this journal. %A Barr E. Bauer %T Practical Parallel Programming %I Academic Press %D 19?? %O ISBN 0-12-082810-0 %K book, text, %X libmpc, Power C Power, Fortran. %A L. H. Bauer %T Implementation of data manipulating functions on the STARAN associative processor %D August 1974 %J Proceedings of the Sagamore Computer Conference (1974) %I Springer-Verlag %P 209-227 %K ICPP2, RADCAP - the RADC associative processor %A A. Baum %A D. Senzig %T Hardware considerations in a microcomputer multiprocessor system %J Computer Technology to Reach the People-Digest of Papers -- COMPCON Spring 75 %C San Francisco, California %D February 1975 %P 27-30 %K multiprocessor architectures and operating systems %K bsatya %A Alan M. Baum %A Donald J. McMillian %Z General Motors %T Message Passing in Parallel Real Time Continuous System Simulations %J 3rd Conference on Hypercube Concurrent Computers and Applications %V I, Architecture, Software, Computer Systems and General Issues %I ACM %C Pasadena, CA %D January 1988 %P 540-549 %K message-passing software, bundling, NCUBE, %A Daniel R. Baum %A James M. Winget %Z Silicon Graphics %T Real Time Radiosity Through Parallel Processing and Hardware Acceleration %J Computer Graphics (Proceedings of the 1990 Symposium on Interactive 3D Graphics) %V 24 %N 2 %D March 1990 %P 67-75 %X As the title says, radiosity in real time (!), using progressive refinement on a multiprocessor workstation. They discuss load balancing and other performance issues. %A Bernd Baumann %A Bernd A. Berg %A Gernot Munster %T Non-Trivial Critical Behavior in a Lattice Model of Random Surfaces %I Florida Supercomputer Center, State University %C Tallahassee, Florida %R FSU-SCRI-88-36 %D April 1988 %A K. M. Baumgartner %A B. M. Wah %T Load Balancing Protocols on a Local Computer System with Multiaccess Networks %J Proceedings of the 1987 International Conference on Parallel Processing %I Penn State %C University Park, Penn. %D August 1987 %P 851-858 %K Programming Systems %A K. M. Baumgartner %A R. M. Kling %A B. W. Wah %T Implementation of GAMMON: An Efficient Load Balancing Strategy for a Local Computer System %J Proceedings of the 1989 International Conference on Parallel Processing %V II - Software %I Penn State %C University Park, Penn %D August 1989 %P II-77--II- %K job scheduling and load balancing %A Katherine M. Baumgartner %A Benjamin W. Wah %T A Global Load Balancing Strategy for a Distributed Computer System %B Proceedings of the Workshop on the Future Trends of Distributed Computing Systems in the 1990's %D September 1988 %P 93-102 %A Katherine M. Baumgartner %A Benjamin W. Wah %T GAMMON: A Load Balancing Strategy for Local Computer Systems with Multiaccess Networks %J IEEE Transactions on Computers %V C-38 %P 1098-1109 %D August 1989 %K distributed systems, load balancing, broadcast, collision detection, multiaccess networks, %A Marc Baumslag %A Arnold L. Rosenberg %T Processor-Time Tradeoffs for Cayley Graph Interconnection Networks %J Sixth Distributed Memory Computing Conference Proceedings %I IEEE %C Portland, OR %D April/May 1991 %P 630-636 %K DMCC6, architecture, interconnection networks, %A Charles W. Bauschlicher, Jr %A Harry Partridge %Z NASA ARC and RIACS %T Strategies for Vectorizing the Sparse Matrix Vector Product on the Cray X-MP, Cray 2, and CYBER 205 %I NASA TM %D 1986 %A Alan Bawden %T CL1 Manual %I MIT AI Lab %R Working paper 254 (not for citation, internal use only) %D Sept. 1983 %K LISP, parallelism, Connection Machine %A Alan Bawden %T A Programming Language for Massively Parallel Computers %R MS Thesis %I MIT %D Sept. 1984 %K CL1, Connection machine, CGL, connection graph language, LISP %X CL1 attempts to remove the concept of pointers (hazardous in a parallel environment) and replace them with SIMD connections. %A Alan Bawden %A Philip E. Agre %T What a Parallel Programming Language has to Let You Say %R AI Memo 796 %I MIT AI Lab %D Sept. 1984 %$ 3.25 %O pages 26, AD-A147854 %K Connection Machine, programming languages, parallel computers, compiler theory, message passing %K CL1, CGL, connection graph language, LISP, coding cliches, %X We have implemented in simulation a prototype language for the Connection Machine called CL1. CL1 is an extrapolation of serial machine programming language technology: in CL1 one programs the individual processors to perform local computations and talk to the communications network. We present details of the largest of our experiments with CL1, an interpreter for Scheme (a dialect of LISP) that allows a large number of different Scheme programs to be run in parallel on the otherwise SIMD Connection Machine. Our aim was not to propose Scheme as a language for Connection Machine programming, but to gain experience using CL1 to implement an interesting and familiar algorithm. Consideration of the difficulties we encountered led us to the conclusion that CL1 programs do not capture enough of the causal structure of the processes they describe. Starting from this observation, we have designed a successor language call CGL (for Connection Graph Language). %A Capt. Chares A. Baxley, Jr. %A Maj. Frederick A. Zapka %Z Wright-Patt AFB %T The Simulation of a RISC Processor with N.MPC %J 1985 ACM Annual Conference %C Denver, CO %D October 1985 %P 224-231 %K computer architecture; RISC; N.MPC; simulation; networks, %A Brent Baxter %A Bruce Greer %T Apply: A Parallel Compiler on iWARP for Image-Processing Applications %J Sixth Distributed Memory Computing Conference Proceedings %I IEEE %C Portland, OR %D April/May 1991 %P 186-193 %K DMCC6, software technology and tools, iWARP, %A Brent Baxter %A George Cox %A Thomas Gross %A H. T. Kung %A David O'Hallaron %A Craig Peterson %A Jon Webb %A Paul Wiley %T Building Blocks for a New Generation of Application-Specific Computing Systems %R TR %I CS Dept. CMU %C Pittsburgh, PA %D 19xx %K Intel iWARP, %A Doug Baxter %A Joel Saltz %A Martin Schultz %A Stan Eisenstat %A Kay Crowley %T An Experimental Study of Methods for Parallel Preconditioning Krylov Methods %J The 3rd Conference on Hypercube Concurrent Computers and Applications %V II, Applications %I ACM %C Pasadena, CA %D January 1988 %P 1698-1711 %K differential equations and associated matrix algorithms, %A J. Baxter %A J. H. Patel %Z U. Ill. %T The LAST Algorithm: A Heuristic-Based Static Task Allocation Algorithm %J Proceedings of the 1989 International Conference on Parallel Processing %V II - Software %I Penn State %C University Park, Penn %D August 1989 %P II-217--II-222 %K coarse grain task allocation %A Jeff Baxter %A Balkrishna Ramkumar %A Janak Patel %T Compile Time Parallel Resource Allocation for Unbounded Tree Structure Task Graphs %J Proceedings of the 1992 International Conference on Parallel Processing %V I, Architecture %I CRC Press %C Boca Raton, FL %D August 1992 %P I-202--I-209 %K communications, synchronization and data mapping, %A Paul Bay %A Gianfranco Bilardi %T Deterministic On-Line Routing on Area-Universal Networks %J Proceedings of the 31st Annual Symposium on Foundations of Computer Science %D oct 1990 %P 297-306 %K fat trees, %A R. Bayer %A M. Schkolnick %T Concurrency of Operations on B-trees %J Acta Informatica %V 9 %D 1977 %P 1-22 %K Rdpsdis.bib Rsingh %X This paper is reproduced in Kuhn and Padua's (1981, IEEE) survey "Tutorial on Parallel Processing." %A R. Bayer %A H. Heller %A A. Reisner %T Parallelism and Recovery in Database Systems %J ACM Transactions on Database Systems %V 5 %N 2 %D June 1980 %P 139-156 %K Synchronization, consistency, transaction, recovery, integrity, two phase locking, deadlock, concurrency CR Categories: 4.32, 4.33 %A A. Bayliss %A E. Turkel %T Dynamics acoustics for the STAR-100 %r ICASE Report No. 79-6 %d March 7, 1979 %J Proceedings of the 3rd IMACS International Symposium on Computer Methods for Partial Differential Equations %D June 1979 %C Bethlehem , PA %A S. J. Baylor %A B. D. Rathi %Z IBM %T A Study of the Memory Reference Behavior of Engineering/Scientific Applications in Parallel Processors %J Proceedings of the 1989 International Conference on Parallel Processing %V I - Architecture (Hardware) %I Penn State %C University Park, Penn %D August 1989 %P I-78--I- %K Analysis Techniques %A S.J. Baylor %A E.A. Briggs %T The Effects of Cache Coherence on the Performance of Parallel PDE Algorithms in Multiprocessors %J Proceedings of the 1989 International Conference on Parallel Processing %V I - Architecture (Hardware) %I Penn State %C University Park, Penn %D August 1989 %P I-233--236 %K Memory Interference %A S. J. Baylor %A Y. Hsu %T The Effects of Network Delays on the Performance of MIN-Based Cache Coherence Protocols %J Proceedings of the 1991 International Conference on Parallel Processing %V I, Architecture %I CRC Press %C Boca Raton, FL %D August 1991 %P I-292--I-295 %K concise paper, %A Sandra Johnson Baylor %A Kevin P. McAuliffe %A Bharat D. Rathi %T An Evaluation of Cache Coherence Protocols for Multiprocessors %E Norihisa Suzuki %B Shared Memory Multiprocessing %I MIT Press %C Cambridge, MA %D 1992 %P 135-164 %O Chap. 6. %K cache coherency, %A Robert Baynes %T UNICOS 4.0 Experiences %J 1989 Spring Proceedings Cray User Group Meeting %I CUG %C Washington DC %D Spring 1989 %P 223-227? %K operating systems, %A Coskun Bayrak %A Ali H. Dogru %A Sukumarn V.S. Nair %T The Annotated Bibliography on Cellular Automata %R 90-CSE-30 %I Department of Computer Science and Engineering, Southern Methodist University %C Dallas, TX 75275-0122 %D 1990 %O $1.00 %Q BBN Advanced Computers %T Butterfly Scheme Reference %C Cambridge, MA %D 1988 %K MIMD, %A Peter Beadle %A Claude Pommerell %A Marco Annaratone %Z ETH %T K9: A Simulator of Distributed-Memory Parallel Processors %J Proc. Supercomputing '89 %I ACM %C Reno, NV %D November 1989 %P 765-774 %K Benchmarking & Performance Measurements, hotspots, DMPP, graphical display, %X Available to C++ license holders. %A Don Beal %A Costas Lambrinoudakis %T GPFP: An Array Processing Element for the Next Generation of Massively Parallel Supercomputer Architectures %J Proceedings Supercomputing'91 %I IEEE %C Albuquerque, New Mexico %D November 1991 %P 348-357 %K processor design, %A Gary D. Beals %T Extending Microprocessor Architectures %J Byte %V 10 %N 5 %D May 1985 %P 185-198 %K Special issue on multiprocessing %A J. K. Beard %T Optimization of Digital Signal Processors Using Array Processor and CCD Technology %J Conference Record, IEEE Int'l Conference on Acoustics, Speech and Signal Processing %D 1979 %P 857-858 %K blouie %A R. Andrew Beard %A Gary B. Lamont %Z AFIT %T Determination of Algorithm Parallelism in NP-Complete Problems for Distributed Architectures %J Proceedings of the Fifth Distributed Memory Computing Conference %V I, Applications %I IEEE %C Charleston, SC %D April 1990 %P 42-51 %K Alternate Applications, DMCC5, %A T. Beardsley %T Computing Cornucopia %J SCIAM %V 257 %N 6 %D December 1987 %P 22 %K Government is moving to exploit massively parallel machines %A R. Beardsworth %T On the Application of Array Processors to Symbol Manipulation %I Leeds University %D 1982 %K Rdap, %A S. J. Beaty %T A Study of Instruction Scheduling Using Genetic Algorithms %R PhD thesis %I Mechanical Engineering Department, Colorado State University %C Colorado %D 1991 %K parallel genetic algorithms, %A N. de\ Beaucoudrey %A A. Bellemain %A D. Phalippou %A P. Chavel %A D. Fortin %A I. Exman %A L. Rudolph %A J.-P. Schnell %A J.-P. Pocholle %T Optical Interconnections for Parallel Systems: Demonstration of an Optical Link with Multiple-Quantum-Well Opto-Electronic Arrays %E D. Etiemble %E J.-C. Syre %B PARLE '92, Parallel Architectures and Languages Europe %S LNCS %V 605 %I Springer-Verlag %C Berlin %D 1992 %P 963-964? %K poster session, %A M. Danielle Beaudry %T Performance-Related Reliability Measures for Computing Systems %J IEEE Transactions on Computers %V C-27 %N 6 %D June 1978 %P 540-547 %K Computer performance, computer reliability, graceful degradation, Systems: Design, analysis, and fault diagnosis %A F. Beaufils %A C. Reze %T A Petri Net Tool for Designing Transputer Network Applications %E D. Gassilloud %E J. C. Grossetie %B Computing with Parallel Architectures: T.Node %V 2 %S Computer and Information Science %I Kluwer %C Dordrecht %D 1991 %P 79-100 %K ELSIR, %A A. Beaumont %A G. Gupta, eds. %T Parallel Execution of Logic Programs %S LNCS %V 569 %I Springer-Verlag %C Berlin %D 1991 %K book, text, %X ICLP'91 Pre-Conference Workshop, Paris, June 1991. %A Jean-Pierre Beauvais %A Anne-Marie Deplanche %T A Task Allocation Algorithm in a Multiprocessor Real-Time System %J Proceedings of the 1993 International Conference on Parallel Processing %V II - Software %I CRC Press %C Boca Raton, FL %D August 1993 %P II-130--II-133 %K mapping/scheduling, %A P. A. Beaven %A D. W. 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No. 922 %I University of Illinois %C Urbana-Champaign %D October 1989 %K thesis, %A Maurizio Bedina %A Fausto Distante %A Mariagiovanna Sami %T Behavioral Testing of Complex Systems %J Problems in Designing Supercomputers: Technologies and Devices SCS 85, First International Conference on Supercomputing Systems %I IEEE Computer Society %P 395-403 %K Fault-Tolerant Architectures and Computations %A Roman Bednarz %A Tom Kaczynski %T Performance of DD-60 Disk Drive %J Proceedings, 27th Semi-Annual Cray User Group Meeting %I CUG %C London %D April 1991 %P 338-345? %K performance and evaluation, %A Robert F. Bedoll %Z Boeing Comp. Services %T Mass Storage Support for Supercomputing %J Proceedings Supercomputing'88 %I IEEE and ACM SIGARCH %C Orlando, FL %D November 1988 %P 217-221 %K mass storage systems, FMS File Management System, CDC, MSS, %X Not highly enlightened, very batch-oriented method of doing things. %A D. Beece %A J. Goren %A R. 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