GC/PLD

A hardware storage reclamation process derived using the DDD transformation system. The design specification is taken from William Clinger's Scheme311 implementation. The study is implemented on the project area of a Logic Engine LD-14 prototyping system.

purpose: research
dates: 1988
students: C. David Boyer, Bhaskar Bose
engineering: Robert W. Wehrmeister
faculty: Steve Johnson
information: IUCS [Johnson-Bose-Boyer-88

The picture shows the hardware realization of a "garbage collection" circuit, whose function is to recover memory regions that are no longer accessed by a process. The technology is low density Programmable Logic Devices (PLDs) and a few medium-scale integrated circuits (MSI devices). The circuit was obtained using an early version of the DDD transformation system applied to a collection algorithm due to William Clinger. This algorithm, implemented in software, was part of the Scheme311 implementation of Scheme, which ran on Apollo workstations. This device was tested (successfully) by replacing Scheme311's garbage collector with a routine that downloads the memory image to the prototype, initiates hardware garbage collection, uploads the result, and then resumes Scheme311 execution.