CMSIS-CORE  Version 3.00
CMSIS-CORE support for Cortex-M processor-based devices
Overview

CMSIS-CORE implements the basic run-time system for a Cortex-M device and gives the user access to the processor core and the device peripherals. In detail it defines:

  • Hardware Abstraction Layer (HAL) for Cortex-M processor registers with standardized definitions for the SysTick, NVIC, System Control Block registers, MPU registers, FPU registers, and core access functions.
  • System exception names to interface to system exceptions without having compatibility issues.
  • Methods to organize header files that makes it easy to learn new Cortex-M microcontroller products and improve software portability. This includes naming conventions for device-specific interrupts.
  • Methods for system initialization to be used by each MCU vendor. For example, the standardized SystemInit() function is essential for configuring the clock system of the device.
  • Intrinsic functions used to generate CPU instructions that are not supported by standard C functions.
  • A variable to determine the system clock frequency which simplifies the setup the SysTick timer.

This chapter provides details about the CMSIS-CORE and contains the following sections:


Cortex-M Reference Manuals

The Cortex-M Reference Manuals are generic user guides for devices that implement the various ARM Cortex-M processors. These manuals contain the programmers model and detailed information about the core peripherals.


Revision History of CMSIS-CORE

Version Description
V3.00 Added support for GNU GCC ARM Embedded Compiler.
Added function __ROR.
Added Register Mapping for TPIU, DWT.
Added support for SC000 and SC300 processors.
Corrected ITM_SendChar function.
Corrected the functions __STREXB, __STREXH, __STREXW for the GNU GCC compiler section.
Documentation restructured.
V2.10 Updated documentation.
Updated CMSIS core include files.
Changed CMSIS/Device folder structure.
Added support for Cortex-M0, Cortex-M4 w/o FPU to CMSIS DSP library.
Reworked CMSIS DSP library examples.
V2.00 Added support for Cortex-M4 processor.
V1.30 Reworked Startup Concept.
Added additional Debug Functionality.
Changed folder structure.
Added doxygen comments.
Added definitions for bit.
V1.01 Added support for Cortex-M0 processor.
V1.01 Added intrinsic functions for __LDREXB, __LDREXH, __LDREXW, __STREXB, __STREXH, __STREXW, and __CLREX
V1.00 Initial Release for Cortex-M3 Processor.